JPH0429253U - - Google Patents
Info
- Publication number
- JPH0429253U JPH0429253U JP7038490U JP7038490U JPH0429253U JP H0429253 U JPH0429253 U JP H0429253U JP 7038490 U JP7038490 U JP 7038490U JP 7038490 U JP7038490 U JP 7038490U JP H0429253 U JPH0429253 U JP H0429253U
- Authority
- JP
- Japan
- Prior art keywords
- frame
- frame synchronization
- circuit
- protection
- protection circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000001360 synchronised effect Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Time-Division Multiplex Systems (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Description
第１図は本考案によるフレーム同期保護回路の
一実施例を示すブロツク図、第２図は従来のフレ
ーム同期保護回路の一例を示すブロツク図、第３
図および第４図は第２図の動作説明に供する各部
の波形例を示す図である。
１……不一致パルス入力端子、２……クロツク
入力端子、１１……フレーム同期はずれ出力端子
、１２〜１６……Ｄフリツプフロツプ、１７，１
８……アンドゲート、１９……ＲＳフリツプフロ
ツプ、２０……モノマルチ。
FIG. 1 is a block diagram showing an embodiment of a frame synchronization protection circuit according to the present invention, FIG. 2 is a block diagram showing an example of a conventional frame synchronization protection circuit, and FIG. 3 is a block diagram showing an example of a conventional frame synchronization protection circuit.
4 and 4 are diagrams showing examples of waveforms of various parts for explaining the operation of FIG. 2. 1...Unmatched pulse input terminal, 2...Clock input terminal, 11...Frame synchronization output terminal, 12-16...D flip-flop, 17,1
8...And gate, 19...RS flip-flop, 20...Mono multi.
Claims (1)
をもとにフレーム同期を確立するフレーム同期回
路よりフレーム周期に同期したクロツク信号と前
記フレーム同期回路内で発生するローカルフレー
ムパルスと前記受信したデータ信号に含まれるフ
レームパルスの一致・不一致の情報を受け、与え
られた前方保護段数および後方保護段数によりフ
レーム同期はずれ状態か否かを判定し、その判定
結果を前記フレーム同期回路へ送出するフレーム
同期保護回路において、前記フレーム同期保護回
路に前記フレーム周期に同期したクロツク信号が
入力されないとき該フレーム同期保護回路を後方
保護状態に設定する手段を備えてなることを特徴
とするフレーム同期保護回路。 A clock signal synchronized with the frame period from a frame synchronization circuit that establishes frame synchronization based on the frame pulse contained in the received data signal, a local frame pulse generated within the frame synchronization circuit, and a clock signal contained in the received data signal. A frame synchronization protection circuit receives information on match/mismatch of frame pulses, determines whether the frame is out of synchronization based on a given number of forward protection stages and a given number of backward protection stages, and sends the determination result to the frame synchronization circuit, A frame synchronization protection circuit comprising means for setting the frame synchronization protection circuit in a backward protection state when a clock signal synchronized with the frame cycle is not input to the frame synchronization protection circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990070384U JP2549472Y2 (en) | 1990-07-03 | 1990-07-03 | Frame synchronization protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990070384U JP2549472Y2 (en) | 1990-07-03 | 1990-07-03 | Frame synchronization protection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0429253U true JPH0429253U (en) | 1992-03-09 |
| JP2549472Y2 JP2549472Y2 (en) | 1997-09-30 |
Family
ID=31606498
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990070384U Expired - Lifetime JP2549472Y2 (en) | 1990-07-03 | 1990-07-03 | Frame synchronization protection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2549472Y2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62147832A (en) * | 1985-12-23 | 1987-07-01 | Kokusai Electric Co Ltd | Frame synchronization method |
| JPS62216446A (en) * | 1986-03-17 | 1987-09-24 | Fujitsu Ltd | Frame synchronism protecting system |
-
1990
- 1990-07-03 JP JP1990070384U patent/JP2549472Y2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62147832A (en) * | 1985-12-23 | 1987-07-01 | Kokusai Electric Co Ltd | Frame synchronization method |
| JPS62216446A (en) * | 1986-03-17 | 1987-09-24 | Fujitsu Ltd | Frame synchronism protecting system |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2549472Y2 (en) | 1997-09-30 |
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