JPS617152U - synchronization circuit - Google Patents
synchronization circuitInfo
- Publication number
- JPS617152U JPS617152U JP9192184U JP9192184U JPS617152U JP S617152 U JPS617152 U JP S617152U JP 9192184 U JP9192184 U JP 9192184U JP 9192184 U JP9192184 U JP 9192184U JP S617152 U JPS617152 U JP S617152U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- clock
- sampling
- data
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は体考案の実施例による同期化回路のブロック図
、第２図は、本考案の実施例による同期化回路の動作を
説明するためのタイムチャート、第３図１よ、従来の同
期化回路のブロック図、第４図は従来の同期化回路の動
作を説明するためのタイムチャートである。
１・・・・・・パルス発生器、２・・・・・・クロツク
作成回路、３・・・・・・ラッチ回路、４・・・・・・
変化点検出回路、５・・・・・・クロツク整形回路、６
・・・・・・サンプリング回路、Ｆ１，Ｆ２・・・・・
・フリツプフロツプ回路。FIG. 1 is a block diagram of a synchronization circuit according to an embodiment of the invention, FIG. 2 is a time chart for explaining the operation of the synchronization circuit according to an embodiment of the invention, and FIG. FIG. 4 is a block diagram of the synchronization circuit, and is a time chart for explaining the operation of the conventional synchronization circuit. 1...Pulse generator, 2...Clock generation circuit, 3...Latch circuit, 4...
Change point detection circuit, 5... Clock shaping circuit, 6
...Sampling circuit, F1, F2...
・Flip-flop circuit.
Claims (1)
で同期化する同期化回路において、前記非同期データを
ラッチするラッチ回路と−、前記非同期データが入力さ
れこの非同期データを一定時間遅延させたデータを作成
しこの２つのデータから前記非同期データの変化点検出
をしそ．の変化点出力によりサンプリングクロツク整形
出力を行なう変化点検出回路と、このサンプリングクロ
ツク整珍出力を受け前記サンプリングクロツク整形出力
を行なうクロツク整形回路と、前記ラッチ回路のラッチ
出力と前記サンプリングクロツクとを入力して同期化デ
ータを出力するサンプリング回路と、前記ラッチ回路と
前記変化点検出回路と前記クロック整形回路のそれぞれ
の回路にクロックパルスを供給するクロツク作成回路か
らなる同期化回路。A synchronization circuit that synchronizes data that is asynchronous to a clock pulse with the clock pulse includes a latch circuit that latches the asynchronous data; Let's detect the change point of the asynchronous data from the data. a changing point detection circuit that performs a sampling clock shaping output based on the changing point output of the sampling clock; a clock shaping circuit that receives the sampling clock shaping output and outputs the sampling clock shaping output; and a clock shaping circuit that receives the sampling clock shaping output and outputs the sampling clock shaping output; 1. A synchronization circuit comprising a sampling circuit that inputs a clock and outputs synchronized data, and a clock generation circuit that supplies clock pulses to each of the latch circuit, the change point detection circuit, and the clock shaping circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9192184U JPS617152U (en) | 1984-06-20 | 1984-06-20 | synchronization circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9192184U JPS617152U (en) | 1984-06-20 | 1984-06-20 | synchronization circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS617152U true JPS617152U (en) | 1986-01-17 |
Family
ID=30648244
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9192184U Pending JPS617152U (en) | 1984-06-20 | 1984-06-20 | synchronization circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS617152U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62296636A (en) * | 1986-06-02 | 1987-12-23 | テクトロニックス・インコ−ポレイテッド | Phase selectable flip-flop |
| JPH01149521A (en) * | 1987-12-04 | 1989-06-12 | Fujitsu Ltd | System for generating clear pulse |
| JP2005278086A (en) * | 2004-03-26 | 2005-10-06 | Leader Electronics Corp | Latch and phase synchronizing circuit using the same |
-
1984
- 1984-06-20 JP JP9192184U patent/JPS617152U/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62296636A (en) * | 1986-06-02 | 1987-12-23 | テクトロニックス・インコ−ポレイテッド | Phase selectable flip-flop |
| JPH01149521A (en) * | 1987-12-04 | 1989-06-12 | Fujitsu Ltd | System for generating clear pulse |
| JP2005278086A (en) * | 2004-03-26 | 2005-10-06 | Leader Electronics Corp | Latch and phase synchronizing circuit using the same |
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