JPH04269853A - 半導体装置のリフロー方法 - Google Patents

半導体装置のリフロー方法

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Publication number
JPH04269853A
JPH04269853A JP3262343A JP26234391A JPH04269853A JP H04269853 A JPH04269853 A JP H04269853A JP 3262343 A JP3262343 A JP 3262343A JP 26234391 A JP26234391 A JP 26234391A JP H04269853 A JPH04269853 A JP H04269853A
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JP
Japan
Prior art keywords
semiconductor device
bpsg film
film
reflow
reflow method
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Pending
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JP3262343A
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English (en)
Inventor
Sung-Min Lee
成 民 李
Yoo-Suck Jung
鄭　裕　錫
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JPH04269853A publication Critical patent/JPH04269853A/ja
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】
【０００１】
【産業上の利用分野】本発明は半導体装置の多層配線工
程において配線層間の絶縁膜を平坦化するためのリフロ
ー（ｒｅｆｌｏｗ）方法に関し、特にプラズマを利用し
て同時に連続（ｉｎ−ｓｉｔｕ）状態で積層された配線
層間の絶縁膜である二重構造のＢＰＳＧ（Ｂｏｒｏｐｈ
ｏｓｐｈｏ　　Ｓｉｌｉｃａｔｅ　　Ｇｌａｓｓ）膜を
比較的に低い温度でリフローさせた後、非等方性乾式蝕
刻を通じて二重構造のＢＰＳＧ膜の上部にある高濃度層
を完全に除去し、下部にある低濃度層を一部除去するこ
とにより、配線層間の絶縁膜が効果的に平坦になるよう
にする半導体装置のリフロー方法に関する。
【０００２】
【従来の技術】一般的な従来技術１は、図１の（Ａ）〜
（Ｃ）に示す通り、通常の工程で半導体基板１上に絶縁
膜２ａを形成させた後、電極物質３を形成させる工程と
、その上に絶縁膜２ｂを形成させる工程と、シレン（Ｓ
ｉＨ４　）ガス、ジボラン（Ｂ２　Ｈ６　）ガス及びホ
スフィン（ＰＨ３　）ガスが混合されたガスを利用して
ＡＰＣＶＤ（Ａｔｍｏｓｐｈｅｒｉｃ　　Ｐｒｅｓｓｕ
ｒｅ　　Ｃｈｅｍｉｃａｌ　　Ｖａｐｏｒ　　Ｄｅｐｏ
ｓｉｔｉｏｎ）装置で硼素の濃度が３〜４ｗｔ％、燐の
濃度が５〜７ｗｔ％のＢＰＳＧ膜４を積層させる工程で
なっている。
【０００３】図１の（Ｃ）に示す通り、ネガティブ領域
５が生成されてＢＰＳＧ層４を９００℃でリフローさせ
ても効果的な平坦化がなされるに困難が伴う。更に、積
層されたＢＰＳＧ膜４内の硼素と燐の濃度が増加すると
、ＢＰＳＧ膜４のリフロー温度が低くなる反面、硼素の
濃度が増加すると、ＢＰＳＧ膜４の表面結晶化が生じる
ようになり、燐の濃度が増加すると、ＢＰＳＧ膜４の吸
湿性が強くなって酸を形成することにより、金属配線を
腐蝕させる影響が大きくなって、硼素と燐の使用濃度が
制限を受けることにより、９００℃のリフロー温度を低
めることができなくなって、比較的高いリフロー温度を
有する欠点があった。
【０００４】図１の（Ａ）〜（Ｆ）に示す通り、従来技
術２は従来技術１の（Ａ）〜（Ｃ）の製造工程で形成さ
れているＢＰＳＧ膜４上に追加する燐の濃度が９ｗｔ％
のＰＳＧ（Ｐｈｏｓｐｈｏ　　Ｓｉｌｉｃａｔｅ　　Ｇ
ｌａｓｓ）膜６を厚さが１５００〜２０００Åになるよ
う積層する工程と、９００℃で窒素ガス又はＰＯＣｌ３
　雰囲気でリフローする工程と、ＰＳＧ膜６を稀釈弗酸
（Ｈ２　Ｏ：ＨＦ＝１００：１）で蝕刻する工程からな
っている。従って、従来技術１で生じるネガティブ領域
５が消滅される長所があるが、リフロー工程によりＰＳ
Ｇ膜６内の高濃度の燐が下部のＢＰＳＧ膜４内に拡散す
ることにより、ＰＳＧ膜６を完全に蝕刻した後にも金属
配線３を腐蝕させることができ、従来技術１の通りリフ
ロー温度が比較的高い欠点があった。
【０００５】更に、図３に示す通り、従来技術１，２に
より製造された絶縁膜の平坦化程度を示す角度（θ）は
３５〜４０℃の比較的高い角度を有する欠点が発生した
。
【０００６】
【発明の目的】本発明は上記の従来のリフロー方法が有
する欠点を除去しようと発明したのであって、クラスタ
ー型（ｃｌｕｓｔｅｒ　　ｔｙｐｅ）のＰＥＣＶＤ（Ｐ
ｌａｓｍａ　　Ｅｎｈａｎｃｅｄ　　Ｃｈｅｍｉｃａｌ
　　Ｖａｐｏｒ　　Ｄｅｐｏｓｉｔｉｏｎ）装置を利用
して硼素と燐の濃度が相違する二重構造のＢＰＳＧ膜が
積層されることにより、従来技術に比べて比較的低い温
度でリフローされることができ、更に絶縁膜として効果
的であり、良好な平坦化がなされるようにする半導体装
置のリフロー方法を提供するにその目的がある。
【０００７】
【課題を解決するための手段】以下、本発明の半導体装
置のリフロー方法の一実施例を添付図面を参照して詳細
に説明する。
【０００８】上記の目的を達成するための本発明方法は
、図４の（Ａ）に示す通り、通常の工程でシリコン基板
１１上に絶縁物を形成した後、電極物質を形成して絶縁
膜を形成する工程と、図４の（Ｂ）の通り、液体である
ＴＥＯＳ（Ｔｅｔｒａ　　Ｅｔｈｙｌ　　Ｏｒｔｈｏ　
　Ｓｉｌｉｃａｔｅ）、ＴＭＰ（Ｔｒｉｍｅｔｈｙｌ　
　ｐｈｏｓｐｈｉｔｅ）、ＴＭＢ（Ｔｒｉｍｅｔｈｙｌ
　　ｂｏｒａｔｅ）ガスをクラスター型のＰＥＣＶＤ装
置内でプラズマ状態で反応させて、硼素の濃度が３〜４
ｗｔ％、燐の濃度が５〜７ｗｔ％の低濃度のＢＰＳＧ膜
４１を厚さが７０００〜９０００Åになるよう積層した
後、同時に連続（ｉｎ−ｓｉｔｕ）状態で硼素の濃度が
５〜７ｗｔ％、燐の濃度が８〜１０ｗｔ％の高濃度のＢ
ＰＳＧ膜７１を厚さが２０００〜３０００Åになるよう
積層する工程と、図４（Ｃ）の通り、積層されたＢＰＳ
Ｇ膜４１，７１を温度が８００〜８５０℃の拡散炉で３
０分間窒素、又は７５０〜８００℃の拡散炉で水蒸気雰
囲気でリフローする工程と、図４（Ｄ）の通り、クラス
ター型のＰＥＣＶＤ装置内でＣＨＦ３　２０ＳＣＣＭと
ＣＦ４　２０ＳＣＣＭガスを利用した非等方性乾式蝕刻
を施して、上部にある高濃度のＢＰＳＧ膜７１を完全に
除去し、下部に拡散されて高濃度の硼素と燐が残ってい
る低濃度のＢＰＳＧ膜４１を同時に連続（ｉｎ−ｓｉｔ
ｕ）状態で１５００〜２０００Å程除去する工程からな
っっている。
【０００９】
【効果】上記の本発明の方法は液体であるＴＥＯＳ、Ｔ
ＭＰ、ＴＭＢガスを利用して、二重構造のＢＰＳＧ膜４
１，７１を製造することにより、従来技術に比べてリフ
ロー温度を５０℃程低めることができ、クラスター型Ｐ
ＥＣＶＤ装置を用いてプラズマ状態で高温度と低温度の
二重構造を有するＢＰＳＧ膜４１，７１を同時に連続（
ｉｎ−ｓｉｔｕ）状態で積層することにより、汚染され
る機会を減少させることができ、更にリフロー温度を一
層低めることができ、プラズマを利用するため、ＢＰＳ
Ｇ膜４１の応力は引張応力でなく圧縮応力を有するよう
になって、製品の信頼度を向上させることができるよう
になる。また、雰囲気によって７５０〜８５０℃で３０
分間リフローした後には、平坦化程度を示す角度（θ）
が１０℃以下である優れた平坦化膜を得ることができ、
更にリフローした後、非等方性乾式蝕刻をすることによ
り、上部の高濃度ＢＰＳＧ膜７１を完全に除去し、下部
の低濃度ＢＰＳＧ膜４１を一部除去するようになって、
ＢＰＳＧ膜４１の表面結晶化と酸の形成を防止すること
ができる長所がある。
【図面の簡単な説明】
【図１】従来技術のリフロー方法に係る半導体装置の製
造工程図であって、（Ａ）〜（Ｃ）は従来技術１の製造
工程図。（Ａ）〜（Ｆ）は従来技術２の製造工程図。
【図２】従来技術に係るネガティブ領域の拡大図。
【図３】従来の技術により製造されたリフロー後の平坦
化程度を表示する角度（θ）を示す図面。
【図４】（Ａ）〜（Ｄ）の本発明の半導体装置のリフロ
ー方法に係る半導体装置の製造工程図である。
【符号の説明】
１１　　半導体基板 ２ａ，２ｂ　　絶縁膜 ４１　　低濃度のＢＰＳＧ膜 ７１　　高濃度のＢＰＳＧ膜

Claims (12)

    【特許請求の範囲】
  1. 【請求項１】　　半導体基板上に絶縁膜（２）を形成す
    る工程と、上記絶縁膜上部の所定領域に電極物質を形成
    する工程と、半導体基板上部にＢＰＳＧ膜を形成する工
    程と、上記ＢＰＳＧ膜をリフローして平坦化させる工程
    と、上記のリフローされたＢＰＳＧ膜を蝕刻する工程を
    具備してなることを特徴とする半導体装置のリフロー方
    法。
  2. 【請求項２】　　上記ＢＰＳＧ膜はＰＥＣＶＤ工程で形
    成することを特徴とする請求項１記載の半導体装置のリ
    フロー方法。
  3. 【請求項３】　　上記リフローはＮ２　雰囲気で８００
    〜８５０℃、水蒸気雰囲気では７５０〜８００℃の比較
    的低いリフロー温度でなることを特徴とする請求項１記
    載の半導体装置のリフロー方法。
  4. 【請求項４】　　上記ＢＰＳＧ膜は下部にＢＰＳＧ膜（
    ４１）を形成し、上記ＢＰＳＧ膜（４１）上部にＢＰＳ
    Ｇ膜（７１）を形成することを特徴とする請求項２記載
    の半導体装置のリフロー方法。
  5. 【請求項５】　　上記リフローされた半導体素子の平坦
    化程度は１０°以下であることを特徴とする請求項３記
    載の半導体装置のリフロー方法。
  6. 【請求項６】　　上記ＢＰＳＧ膜（４１，７１）はクラ
    スター型ＰＥＣＶＤ装置内で同時に連続（ｉｎ−ｓｉｔ
    ｕ）状態で形成することを特徴とする請求項２記載の半
    導体装置のリフロー方法。
  7. 【請求項７】　　上記ＢＰＳＧ膜（４１）は硼素の濃度
    が３〜４ｗｔ％であり、燐の濃度が５〜７ｗｔ％の低濃
    度のＢＰＳＧ膜であることを特徴とする請求項５記載の
    半導体装置のリフロー方法。
  8. 【請求項８】　　上記ＢＰＳＧ膜（４１）は厚さが６０
    ００〜８０００Åになるよう積層することを特徴とする
    請求項５記載の半導体装置のリフロー方法。
  9. 【請求項９】　　上記ＢＰＳＧ膜（７１）は硼素の濃度
    が４〜６ｗｔ％であり、燐の濃度が８〜１０ｗｔ％の高
    濃度のＢＰＳＧ膜であることを特徴とする請求項５記載
    の半導体装置のリフロー方法。
  10. 【請求項１０】　　上記ＢＰＳＧ膜（７１）は厚さが４
    ０００〜６０００Åになるよう形成することを特徴とす
    る請求項５記載の半導体装置のリフロー方法。
  11. 【請求項１１】　　上記ＢＰＳＧ膜（４１，７１）は非
    等方性乾式蝕刻することを特徴とする請求項５記載の半
    導体装置のリフロー方法。
  12. 【請求項１２】　　上記ＢＰＳＧ膜（４１，７１）は１
    ５００〜２０００Å程度蝕刻することを特徴とする請求
    項５記載の半導体装置のリフロー方法。
JP3262343A 1990-12-19 1991-10-09 半導体装置のリフロー方法 Pending JPH04269853A (ja)

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