JPH04268659A - Option board i/o address setting system - Google Patents

Abstract

PURPOSE:To set an I/O address by software by providing an extended slot with an I/O address decoding circuit and latching the I/O address in a latching circuit on an option board at the time of combining plural option boards with a computer main body. CONSTITUTION:An I/O decoding circuit 1 receives an extended slot number from a register part 14 and decodes an I/O write command 3a and an I/O address 5b from the computer main body to output a decode signal 1a to an extended slot ES1. Then, data 4a to set the I/O address is latched in a data latch circuit 6 by the signal 1a. When an I/O controller 12 is accessed hereafter, the I/O address 5a and latched data 6a of the latch circuit 6 are compared with each other by a comparing circuit 8. When they coincide with each other, a compare address signal 8a is outputted, and the I/O controller 12 is accessed through an address decoding circuit 10.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a computer system in which a plurality of option boards can be connected to a computer, and more particularly to an I/O address setting method that allows setting of I/O addresses of option boards from the main body side.

0002

2. Description of the Related Art An I/O address setting method for this type of option board will be explained with reference to FIG. In FIG. 2, a dip switch 16 for setting an I/O address and an I/O switch 16 for setting an I/O address are shown.
Setting I using /O address 5e and dip switch 16
A compare circuit 17 that compares with the /O address and an I/O address.
Setting I/by O address 5e and dip switch 16
The address decode circuit 18 decodes the compare address signal 17a that is output when the address is equal to the O address, and the chip select signal 18a as a decode result is sent from the address decode circuit 18 to the I/O controller 19.
is output to.

Next, the operation will be explained. After setting the DIP switch 16 of the option board B3 to the I/O address used for access by the computer main body, insert it into the expansion slot ES3. When the computer main body goes to access the I/O controller 19 on the option board B3, it outputs the I/O address 5e to the option board B3. This I/O address 5e enters the compare circuit 17 and is compared with the set I/O address set by the dip switch 16. If the comparison matches, it is determined that the option board B3 has been accessed, and the compare circuit 17 outputs the compare address signal 1.
7a is output. Address decode circuit 18 decodes compare address signal 17a and outputs chip select signal 18a to I/O controller 19. This allows the option board to be accessed from the computer main body. Note that the dip switch 16 may be a strap switch.

0004

[Problem to be solved by the invention] The above-mentioned conventional I/O
Regarding the address setting method, when multiple option boards are mounted, it is necessary to check the I/O address of each option board and set the dip switches so that the I/O address space does not overlap. However, as the number of option boards increases, the possibility of making mistakes in settings increases. If you actually start up the system by making a mistake in the settings, you have to turn off the power to the system, remove the option board from the expansion slot, and correct the dip switches, which takes time. In view of the above-mentioned problems, an object of the present invention is to provide an I/O address setting method that allows the I/O address of an option board to be set by software.

[0005]

[Means for Solving the Problems] The I/O address setting method according to the present invention is a decoding method that creates a decoded signal by decoding an I/O write command and I/O addresses assigned in advance to a plurality of expansion slots. a latch circuit for latching data using the decode signal on the decode on a plurality of option boards connected to the plurality of expansion slots; a latch signal from the latch circuit and an I/O address from the computer; It has a compare circuit that compares the data and outputs the result to the I/O address decoding circuit.

[0006]

[Operation] The I/O address setting method according to the present invention allows each option board to use a decode signal created by an I/O write command given to each expansion slot and an I/O address assigned in advance to each expansion slot. I/O by writing data to the upper latch circuit
After setting the address, the compare circuit compares the address when the computer system accesses the option board with the data written in the latch circuit.

[0007]

EXAMPLE Next, the present invention will be explained with reference to FIG. In FIG. 1, the I/O decode section D1 consists of an I/O decode circuit 1 and an expansion slot number registration section 14. The I/O decoding circuit 1 receives the expansion slot number from the expansion slot number registration unit 14, and receives the I/O decoding circuit 1 from the computer body for the expansion slot ES1.
It decodes the /O write command 3a and the I/O address 5b allocated to the expansion slot ES1 and outputs a decoded signal 1a. When the decode signal 1a is output, there is data on the data bus 4a that sets the I/O address of the option board B1, and this data is latched by the data latch circuit 6 by the decode signal 1a and becomes latched data 6a. The I/O address of option board B1 is set. Similarly, the above operation is performed for the option board B2 of the expansion slot ES2. The data set at this time is a different value from the data of the option board B1, and I/O addresses are prevented from colliding.

Next, when the computer main body goes to access the I/O controller 12 on the option board B1, the I/O address 5a is output from the computer main body to the option board B1. This I/O address 5a enters the compare circuit 8 and is compared with the latch data 6a set by the above-described operation. If the comparison results in a match, the compare circuit 8 determines that the option board B1 has been accessed, and outputs a conveyor address signal 8a. The address decode circuit 10 decodes the compare address signal 8a and converts the chip select signal 10a into an I/O
Output to the controller 12. As a result, option board B1 is accessed from the computer main body. The I/O controller 13 of the option board B2 also operates in the same way as described above and is accessed from the computer main body. In the above embodiment, there are two expansion slots,
Although this is the case where there are two option boards, the above case is the same even when there are m expansion slots and n option boards (where m is an integer greater than or equal to n).

[0009]

As explained above, according to the present invention, data is latched into a latch circuit on an option board by a decode signal created from an I/O write command and an I/O address assigned in advance to each expansion slot. By setting data as an I/O address and comparing it with the I/O address from the computer main body, the I/O address of the option board can be set using software. As a result, you no longer have to check the I/O addresses when setting them using dip switches (strap switches) as in the past, and you no longer have to waste time by turning off the power, removing the option board, and making corrections if you make a mistake. There is an effect that can be deleted.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention.

FIG. 2 is a block diagram of a conventional example.

[Explanation of symbols]

1a, 2a Decode signal 3 Command signal 3a, 3b
I/O write command 4
Data 4a, 4b Data bus 5 Addresses 5a to 5e I/O addresses 6a, 7a Latch data

Claims (2)

[Claims] Claim 1: In a computer system consisting of a computer and a plurality of function expansion option boards connected to this computer, an I/O write command and an I/O write command pre-allocated to a plurality of expansion slots are used.
/O address to create a decoded signal; a latch circuit that latches data using the decoded signal on the plurality of option boards connected to the plurality of expansion slots; and a latch from the latch circuit. An option board I/O address setting method having a compare circuit that compares a signal with an I/O address from the computer and outputs the result to an I/O address decoding circuit. [Claim 2] Option board I/ according to claim 1
Option board I/O address setting method, wherein the decoding section includes an expansion slot number registration section.