JPH0426795B2 - - Google Patents

Info

Publication number
JPH0426795B2
JPH0426795B2 JP61018841A JP1884186A JPH0426795B2 JP H0426795 B2 JPH0426795 B2 JP H0426795B2 JP 61018841 A JP61018841 A JP 61018841A JP 1884186 A JP1884186 A JP 1884186A JP H0426795 B2 JPH0426795 B2 JP H0426795B2
Authority
JP
Japan
Prior art keywords
printed circuit
circuit board
hole
conductor pattern
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61018841A
Other languages
Japanese (ja)
Other versions
JPS62176186A (en
Inventor
Masato Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Otari Electric Co Ltd
Original Assignee
Otari Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Otari Electric Co Ltd filed Critical Otari Electric Co Ltd
Priority to JP61018841A priority Critical patent/JPS62176186A/en
Publication of JPS62176186A publication Critical patent/JPS62176186A/en
Publication of JPH0426795B2 publication Critical patent/JPH0426795B2/ja
Granted legal-status Critical Current

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  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Description

【発明の詳細な説明】 〔技術分野〕 本発明は、絶縁基板上に導体を印刷したプリン
ト基板を製造するプリント基板の製造方法に関す
るもので、特にプリント基板の加工寸法の精度の
検査工程を改良したプリント基板の製造方法に関
する。
Detailed Description of the Invention [Technical Field] The present invention relates to a printed circuit board manufacturing method for manufacturing a printed circuit board in which a conductor is printed on an insulating substrate. The present invention relates to a method of manufacturing a printed circuit board.

〔発明の背景と従来の技術〕[Background of the invention and conventional technology]

プリント基板は、絶縁基板の加工が簡単なた
め、従来のように電子部品を乗せるだけではな
く、例えばモーターなどの一部を基板上に形成し
て用いている。
Since printed circuit boards are insulating substrates that are easy to process, they are used not only for mounting electronic components as in the past, but also for example, by forming parts of motors and the like on the circuit board.

このときに問題となるのがプリント基板の加工
精度である。すなわち、プリント基板上に形成さ
れた検出素子とプリント基板に設けられた取り付
け穴の相対位置の寸法精度であるとか、プリント
基板のパターン位置とプリント基板の穴の相対位
置の精度は、パターンの形成工程とプリント基板
の機械加工工程が別々に行われるため、精度維持
が困難であつた。
At this time, the problem is the processing accuracy of the printed circuit board. In other words, the dimensional accuracy of the relative position of the detection element formed on the printed circuit board and the mounting hole provided on the printed circuit board, or the accuracy of the relative position of the pattern position of the printed circuit board and the hole of the printed circuit board, depends on the formation of the pattern. Since the manufacturing process and the printed circuit board machining process were performed separately, it was difficult to maintain accuracy.

このような問題を解決する従来の手段は、例え
ば特公昭54−25226号公報に開示されているよう
に、導体パターンと同時に穴位置を示すマークを
形成し、そのマークに対して穴位置が、どのよう
にずれたかを目視によつて調べるというものがあ
つた。
A conventional means for solving such problems is to form a mark indicating the hole position at the same time as the conductor pattern, as disclosed in Japanese Patent Publication No. 54-25226, and to determine the hole position with respect to the mark. There was a method to visually check how the deviation occurred.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかし、このように、基本的に目視による検査
は自動化が困難であつた。また他の欠点としては
大きな寸法の穴では穴位置がずれたのかどうかを
判別するのが困難であつた。
However, it has been difficult to automate the visual inspection as described above. Another drawback is that with large holes, it is difficult to determine whether the hole position has shifted.

本発明はかかる従来の問題点に着目してなされ
たもので、プリント基板上の導体パターンとプリ
ント基板にあけた穴の相対位置の精度を簡単に、
しかも自動的に検査できるプリント基板の製造方
法を得ることを目的とする。
The present invention has been made by focusing on such conventional problems, and it is possible to easily improve the accuracy of the relative position of the conductor pattern on the printed circuit board and the hole drilled in the printed circuit board.
Moreover, it is an object of the present invention to obtain a method for manufacturing a printed circuit board that can be automatically inspected.

〔問題点を解決するための手段〕[Means for solving problems]

本発明はかかる目的を達成するため、基板に機
械的な加工を施したプリント基板を製造する方法
において、基板に施す加工穴を形成する外周の内
側に沿つて細い導体パターンを設けたプリント基
板を作成し、加工を施した後に前記加工によつて
前記プリント基板から分離された基板上の前記導
体パターンの導通を検査し、導通があつたときに
前記プリント基板を良品とし、導通がなかつたと
きにプリント基板を不良品とすることを特徴とす
る。
In order to achieve such an object, the present invention provides a method for manufacturing a printed circuit board in which a printed circuit board is mechanically processed. After fabrication and processing, conductivity of the conductive pattern on the board separated from the printed circuit board by the processing is inspected, and if continuity is found, the printed circuit board is considered to be a good product, and if there is no continuity, the printed circuit board is deemed to be a good product. The printed circuit board is marked as a defective product.

〔実施例〕〔Example〕

第1図は本発明の実施例である。図中1は絶縁
基板であり、図示しない導体パターンが形成され
ている。2は絶縁基板に設けた穴である。3は穴
2の外縁に沿つて形成した細い導体パターンであ
り、4及び5は導体パターン3の両端に設けた端
子である。この導体パターン3は図示しない他の
導体パターンと同時に形成されている。このよう
なプリント基板を製造する場合は、まず、導体パ
ターンの形成と穴加工を終つたプリント基板につ
いて端子間の導通を確認する。
FIG. 1 shows an embodiment of the invention. In the figure, 1 is an insulating substrate, on which a conductor pattern (not shown) is formed. 2 is a hole provided in the insulating substrate. 3 is a thin conductor pattern formed along the outer edge of the hole 2, and 4 and 5 are terminals provided at both ends of the conductor pattern 3. This conductor pattern 3 is formed simultaneously with other conductor patterns (not shown). When manufacturing such a printed circuit board, first, conduction between the terminals of the printed circuit board after forming the conductor pattern and drilling the holes is confirmed.

もし、導通が無ければ、第1図に示した符号6
のように導体パターン3に対して穴2の位置がず
れており、そのために導体パターン3が切断され
たものである。この場合は、不良品と判断する。
If there is no continuity, the symbol 6 shown in FIG.
The hole 2 is misaligned with respect to the conductor pattern 3 as shown in the figure, and the conductor pattern 3 is therefore cut. In this case, the product is determined to be defective.

また導通があれば、良品と判断する。 Also, if there is continuity, it is judged to be a good product.

第2図は本発明の他の実施例である。絶縁基板
1には穴2が加工され、符号7の部分は捨てられ
る部分である。穴2の位置を検査するパターン3
は穴2の内側に設けてある点が第1図で示した実
施例と異なる。
FIG. 2 shows another embodiment of the invention. A hole 2 is formed in the insulating substrate 1, and a portion 7 is a portion to be discarded. Pattern 3 to inspect the position of hole 2
This differs from the embodiment shown in FIG. 1 in that it is provided inside the hole 2.

さらに他の実施例としては、同じく第2図にお
いて示すように絶縁基板1の外周に導体パターン
8を設けるものが考えられる。
As another embodiment, a conductive pattern 8 may be provided around the outer periphery of the insulating substrate 1, as shown in FIG.

第1図に示した実施例は、絶縁基板1に導体パ
ターンを形成した後に穴2の加工を行つてもよ
く、また穴2の加工が終つてから導体パターンの
形成を行つてもよい。
In the embodiment shown in FIG. 1, the hole 2 may be formed after the conductor pattern is formed on the insulating substrate 1, or the conductor pattern may be formed after the hole 2 has been formed.

第2図に示した絶縁基板1の穴2の内側にパタ
ーン3を形成するには、穴2の加工を行う前に導
体パターンの形成を行なわなければならないが、
検査が終わつた後に基板1側に導体パターン3が
残らない利点がある。
In order to form the pattern 3 inside the hole 2 of the insulating substrate 1 shown in FIG. 2, the conductor pattern must be formed before the hole 2 is processed.
There is an advantage that no conductor pattern 3 remains on the substrate 1 side after the inspection is completed.

また第2図に示した基板1の外周にパターン8
を形成することにより、基板の外周に対する基板
1に形成された図示しないパターンの相対位置の
検査を容易に行える。さらにいずれの実施例であ
つても、検査用のパターンと回路用パターンを兼
用するようにしても良い。
Also, a pattern 8 is formed on the outer periphery of the substrate 1 shown in FIG.
By forming this, it is possible to easily inspect the relative position of the pattern (not shown) formed on the substrate 1 with respect to the outer periphery of the substrate. Furthermore, in any of the embodiments, the test pattern and the circuit pattern may be used together.

〔効 果〕〔effect〕

以上、本発明を実施する事により簡単に精度の
よいプリント基板を製造する事ができる効果が得
られる。
As described above, by implementing the present invention, it is possible to easily manufacture a printed circuit board with high precision.

また、プリント基板を加工することによつて製
品となるプリント基板と加工くずとに分離され、
加工くず側に検査用の導体パターンが設けられて
いるため、製品となるプリント基板側には検査用
の導体パターンが残らない。
In addition, by processing printed circuit boards, they are separated into printed circuit boards that become products and processing waste.
Since the conductor pattern for inspection is provided on the processed waste side, no conductor pattern for inspection remains on the printed circuit board side that becomes the product.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示すプリント基板
の平面図、第2図は本発明の他の実施例を示すプ
リント基板の平面図である。 1……基板、3,8……導体パターン。
FIG. 1 is a plan view of a printed circuit board showing one embodiment of the present invention, and FIG. 2 is a plan view of a printed circuit board showing another embodiment of the present invention. 1... Board, 3, 8... Conductor pattern.

Claims (1)

【特許請求の範囲】[Claims] 1 基板に機械的な加工を施したプリント基板を
製造する方法において、基板に施す加工穴を形成
する外周の内側に沿つて細い導体パターンを設け
たプリント基板を作成し、加工を施した後に前記
加工によつて前記プリント基板から分離された基
板上の前記導体パターンの導通を検査し、導通が
あつたときに前記プリント基板を良品とし、導通
がなかつたときにプリント基板を不良品とするこ
とを特徴とするプリント基板の製造方法。
1. In a method of manufacturing a printed circuit board in which a printed circuit board is mechanically processed, a printed circuit board is prepared with a thin conductive pattern along the inside of the outer periphery that forms a processed hole in the board, and after the processing is performed, the above-mentioned Inspecting the conductor pattern on the substrate separated from the printed circuit board by processing, and determining that the printed circuit board is good when there is continuity, and determining that the printed circuit board is defective when there is no continuity. A method for manufacturing a printed circuit board, characterized by:
JP61018841A 1986-01-29 1986-01-29 Manufacture of printed circuit board Granted JPS62176186A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61018841A JPS62176186A (en) 1986-01-29 1986-01-29 Manufacture of printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61018841A JPS62176186A (en) 1986-01-29 1986-01-29 Manufacture of printed circuit board

Publications (2)

Publication Number Publication Date
JPS62176186A JPS62176186A (en) 1987-08-01
JPH0426795B2 true JPH0426795B2 (en) 1992-05-08

Family

ID=11982784

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61018841A Granted JPS62176186A (en) 1986-01-29 1986-01-29 Manufacture of printed circuit board

Country Status (1)

Country Link
JP (1) JPS62176186A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5118638A (en) * 1988-03-18 1992-06-02 Fuji Electric Co., Ltd. Method for manufacturing MOS type semiconductor devices

Also Published As

Publication number Publication date
JPS62176186A (en) 1987-08-01

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