JPH0426505B2 - - Google Patents

Info

Publication number
JPH0426505B2
JPH0426505B2 JP60279096A JP27909685A JPH0426505B2 JP H0426505 B2 JPH0426505 B2 JP H0426505B2 JP 60279096 A JP60279096 A JP 60279096A JP 27909685 A JP27909685 A JP 27909685A JP H0426505 B2 JPH0426505 B2 JP H0426505B2
Authority
JP
Japan
Prior art keywords
memory
switching
bank
data
controller
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP60279096A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62139062A (ja
Inventor
Takao Yamada
Yutaka Aoyama
Chiharu Oosawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Fuji Facom Corp
Original Assignee
Fuji Electric Co Ltd
Fuji Facom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Facom Corp filed Critical Fuji Electric Co Ltd
Priority to JP60279096A priority Critical patent/JPS62139062A/ja
Publication of JPS62139062A publication Critical patent/JPS62139062A/ja
Publication of JPH0426505B2 publication Critical patent/JPH0426505B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Control By Computers (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
  • Computer And Data Communications (AREA)
  • Memory System (AREA)
JP60279096A 1985-12-13 1985-12-13 デ−タ交換方式 Granted JPS62139062A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60279096A JPS62139062A (ja) 1985-12-13 1985-12-13 デ−タ交換方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60279096A JPS62139062A (ja) 1985-12-13 1985-12-13 デ−タ交換方式

Publications (2)

Publication Number Publication Date
JPS62139062A JPS62139062A (ja) 1987-06-22
JPH0426505B2 true JPH0426505B2 (en:Method) 1992-05-07

Family

ID=17606357

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60279096A Granted JPS62139062A (ja) 1985-12-13 1985-12-13 デ−タ交換方式

Country Status (1)

Country Link
JP (1) JPS62139062A (en:Method)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8250312B2 (en) 2009-04-29 2012-08-21 Micron Technology, Inc. Configurable multi-port memory devices and methods

Also Published As

Publication number Publication date
JPS62139062A (ja) 1987-06-22

Similar Documents

Publication Publication Date Title
JP2886856B2 (ja) 二重化バス接続方式
US6308244B1 (en) Information processing apparatus with improved multiple memory access and control
JPH0426505B2 (en:Method)
US4627035A (en) Switching circuit for memory devices
JPS59206972A (ja) 共有メモリ
JPH0122653B2 (en:Method)
JPH0160864B2 (en:Method)
JPS60123952A (ja) 入出力制御方式
JPH0115900B2 (en:Method)
JP2687679B2 (ja) プログラム開発装置
JPH024020B2 (en:Method)
JP2636253B2 (ja) 拡張バス方式
JPS593776B2 (ja) マルチマイクロプロセツサ・システムにおける交信方法
JPS604498B2 (ja) 電子計算機とダイレクト・メモリ・アクセス装置の結合方法
JPS6121542A (ja) デ−タ転送装置
JPH0664561B2 (ja) 同時書込み回路
JPS63217444A (ja) 多重ポ−トメモリ
JPS58181134A (ja) デ−タ転送回路
JPS6216600B2 (en:Method)
JPS61217995A (ja) 連想記憶装置
JPH0667769A (ja) シングルチップマイクロコンピュータ
JPH11143820A (ja) データ転送方式およびバス回路
JPS60247739A (ja) マイクロプログラム制御装置
JPS625451A (ja) 記憶回路
JPS61259358A (ja) Ｄｍａ回路

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term