JPH04255237A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH04255237A
JPH04255237A JP3016133A JP1613391A JPH04255237A JP H04255237 A JPH04255237 A JP H04255237A JP 3016133 A JP3016133 A JP 3016133A JP 1613391 A JP1613391 A JP 1613391A JP H04255237 A JPH04255237 A JP H04255237A
Authority
JP
Japan
Prior art keywords
bonding
wire
ball
wiring
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP3016133A
Other languages
Japanese (ja)
Inventor
Yoshiaki Sano
義昭 佐野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3016133A priority Critical patent/JPH04255237A/en
Publication of JPH04255237A publication Critical patent/JPH04255237A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To provide the wire bonding step capable of low wiring a wire in high productivity without deteriorating the characteristics and the reliability of a semiconductor device in relation to the title manufacture of semiconductor device. CONSTITUTION:After the formation of a ball on the end of a wire 3, the first and second bonding steps are performed on the different positions of a lead 1 and later the third bonding step is performed on a semiconductor chip 2 so that the lead 1 and the semiconductor chip 2 may be wired using the wire 3.

Description

【発明の詳細な説明】[Detailed description of the invention]

【０００１】0001

【産業上の利用分野】本発明は半導体装置の製造方法、
特にワイヤボンディングの方法に関する。半導体装置の
製造において、半導体チップの電極とパッケージの内部
リードとの接続は、ワイヤボンディング法によるのが一
般的である。ワイヤボンディングの方式としてはボール
ボンディング方式、ウエッジボンディング方式等がある
が、生産性が極めて高いボールボンディング方式が広く
採用されている。但し、この方式でワイヤを低く配線す
ると信頼性等に問題があるとされているため、ワイヤを
特に低く配線する必要がある半導体装置の製造において
はウエッジボンディング方式が採用されている。[Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device,
In particular, it relates to wire bonding methods. In manufacturing semiconductor devices, wire bonding is generally used to connect electrodes of a semiconductor chip and internal leads of a package. Wire bonding methods include a ball bonding method, a wedge bonding method, and the like, but the ball bonding method is widely used because of its extremely high productivity. However, it is said that wiring the wires low using this method poses problems in reliability, etc., so the wedge bonding method is used in the manufacture of semiconductor devices where the wires need to be wired particularly low.

【０００２】0002

【従来の技術】ワイヤボンディング方法の例を図２及び
図３を参照して説明する。尚、両図中、図１と同じもの
には同一の符号を付与した。2. Description of the Related Art An example of a wire bonding method will be explained with reference to FIGS. 2 and 3. In both figures, the same parts as in FIG. 1 are given the same reference numerals.

【０００３】図２は従来のボールボンディング方式を説
明する模式図であり、（ａ）は第一ボンディングの状態
を、（ｂ）　は配線完了時の状態をそれぞれ示している
。先ずキャピラリ１１の中心穴を通したワイヤ３の先端
にボール３ａを形成する。次にキャピラリ１１を下げて
ボール３ａを半導体チップ２の電極（ボンディングパッ
ド）に圧着する（第一ボンディング）。その後キャピラ
リ１１を移動してワイヤ３の側面をリード１に圧着し（
第二ボンディング）、更にワイヤ３を第二ボンディング
個所で切断して配線を完了する。FIG. 2 is a schematic diagram illustrating a conventional ball bonding method, in which (a) shows the state of first bonding, and (b) shows the state when wiring is completed. First, a ball 3a is formed at the tip of the wire 3 passed through the center hole of the capillary 11. Next, the capillary 11 is lowered to press the ball 3a to the electrode (bonding pad) of the semiconductor chip 2 (first bonding). After that, move the capillary 11 and press the side of the wire 3 to the lead 1 (
(second bonding), and then the wire 3 is cut at the second bonding point to complete the wiring.

【０００４】この方式は、第一ボンディング後のワイヤ
が垂直方向に伸びているから配線の方向性がなく、従っ
て高速ボンディングが可能である。但し、配線高さＨ２
が大となる。[0004] In this method, since the wire after the first bonding extends in the vertical direction, there is no wiring directionality, and therefore high-speed bonding is possible. However, the wiring height H2
becomes large.

【０００５】図３はウエッジボンディング方式を説明す
る模式図であり、　（ａ）は第一ボンディングの状態を
、（ｂ）　は配線完了時の状態をそれぞれ示している。 先ずワイヤ３の先端部の側面をウエッジ１２により半導
体チップ２の電極（ボンディングパッド）に圧着する（
第一ボンディング）。次にワイヤ３の側面をウエッジ１
２によりリード１に圧着し（第二ボンディング）、更に
ワイヤ３を第二ボンディング個所で切断して配線を完了
する。FIG. 3 is a schematic diagram illustrating the wedge bonding method, in which (a) shows the state of first bonding, and (b) shows the state when wiring is completed. First, the side surface of the tip of the wire 3 is pressed onto the electrode (bonding pad) of the semiconductor chip 2 using the wedge 12 (
1st bonding). Next, wedge the side of wire 3 into wedge 1.
2 to the lead 1 (second bonding), and then the wire 3 is cut at the second bonding point to complete the wiring.

【０００６】この方式は、ワイヤを横方向から挿入して
第一ボンディングを行うから、ワイヤを低く配線するこ
とが出来る（Ｈ３が小）。但し、その挿入方向にしか配
線することが出来ないから、多方向に配線するためには
ボンディング装置に回転機構を設けて、被ボンディング
物又はボンディングヘッドを逐次回転しながら配線しな
ければならない。従ってボールボンディング方式に比し
てボンディング装置が複雑となり、又ボンディング速度
が遅い。[0006] In this method, the first bonding is performed by inserting the wire laterally, so that the wire can be wired low (H3 is small). However, since wiring can only be done in the insertion direction, in order to wire in multiple directions, the bonding device must be provided with a rotation mechanism to sequentially rotate the bonded object or the bonding head while wiring. Therefore, compared to the ball bonding method, the bonding device is more complicated and the bonding speed is slower.

【０００７】[0007]

【発明が解決しようとする課題】半導体装置によっては
、配線を特に低くすることが要求される場合がある（薄
型パッケージ、高周波素子等）。ボールボンディング方
式で低く配線するためには第一ボンディング後、ボール
の付け根でワイヤを屈曲させなければならず、この部分
にクラックを生じ易いから、従来のボールボンディング
方式で低く配線することは半導体装置の特性、信頼性の
上で好ましくない。従って、特に低い配線が必要な場合
には、生産性を犠牲にしてウエッジボンディング方式を
採用していた。[Problems to be Solved by the Invention] Depending on the semiconductor device, wiring may be required to be particularly low (thin package, high frequency element, etc.). In order to wire low with the ball bonding method, the wire must be bent at the base of the ball after the first bonding, and cracks are likely to occur in this part, so it is difficult to wire low with the conventional ball bonding method. unfavorable in terms of characteristics and reliability. Therefore, when particularly low wiring is required, the wedge bonding method has been adopted at the expense of productivity.

【０００８】本発明はこのような問題を解決して、半導
体装置の特性、信頼性を損なうことなくワイヤを低く配
線することが可能なボールボンディング方式のワイヤボ
ンディング方法を提供することを目的とする。SUMMARY OF THE INVENTION An object of the present invention is to solve these problems and provide a ball bonding wire bonding method that allows wires to be wired low without impairing the characteristics and reliability of a semiconductor device. .

【０００９】[0009]

【課題を解決するための手段】この目的は、本発明によ
れば、ワイヤ３の先端にボール３ａを形成した後、該ボ
ール３ａを内部リード１上にボンディングする第一の工
程と、一端をボンディングした該ワイヤ３を該内部リー
ド１上の第一の工程とは異なる位置にボンディングする
第二の工程と、半導体チップ２の電極上に該ワイヤ３を
ボンディングする第三の工程とを含むことを特徴とする
半導体装置の製造方法とすることで、達成される。[Means for Solving the Problems] According to the present invention, a first step of forming a ball 3a at the tip of a wire 3 and then bonding the ball 3a onto an internal lead 1; A second step of bonding the bonded wire 3 to a position different from the first step on the internal lead 1, and a third step of bonding the wire 3 onto the electrode of the semiconductor chip 2. This is achieved by a method for manufacturing a semiconductor device characterized by the following.

【００１０】0010

【作用】前述のように、ボールボンディング方式で低く
配線すると第一ボンディング個所のワイヤ（ボールの付
け根の部分）にクラックを生じ易いが、本発明によれば
、第一ボンディングと第二ボンディングとを同一のリー
ド上に行い、その後半導体チップ上に第三ボンディング
を行って、リードと半導体チップとの間を配線するもの
であるから、たとえ第一ボンディング個所のワイヤにク
ラックを生じたとしても、半導体装置の特性、信頼性に
は何ら影響を及ぼさない。[Function] As mentioned above, if the wire is wired low using the ball bonding method, cracks tend to occur in the wire at the first bonding location (the base of the ball), but according to the present invention, the first bonding and the second bonding are This is done on the same lead, and then a third bond is made on the semiconductor chip to connect the lead and the semiconductor chip, so even if a crack occurs in the wire at the first bonding location, the semiconductor It does not affect the characteristics or reliability of the device in any way.

【００１１】一般にリードのボンディング可能領域は広
いから、同一のリードに二個所のボンディングを施すこ
とが可能である。又、従来のボールボンディング方法よ
りボンディング回数が増加するが（二回→三回）、ボン
ディングの方向性がないから、ウエッジボンディングに
比して遙かに高速でボンディングすることが出来る。[0011] Generally, the bondable area of a lead is wide, so it is possible to perform bonding at two locations on the same lead. Furthermore, although the number of bonding steps is increased compared to the conventional ball bonding method (from two times to three times), since there is no directionality in bonding, it is possible to perform bonding at a much higher speed than with wedge bonding.

【００１２】0012

【実施例】本発明に基づくワイヤボンディング方法の実
施例を図１を参照して説明する。図１は本発明の実施例
を説明する模式図であり、　（ａ）は第一ボンディング
の状態を、（ｂ）　は第二ボンディングの状態を、（ｃ
）　は配線完了時の状態をそれぞれ示している。Embodiment An embodiment of the wire bonding method according to the present invention will be described with reference to FIG. FIG. 1 is a schematic diagram illustrating an embodiment of the present invention, in which (a) shows the state of the first bonding, (b) shows the state of the second bonding, and (c) shows the state of the second bonding.
) indicate the state when wiring is completed.

【００１３】ボールボンディング方式のワイヤボンダを
使用し、先ずキャピラリ１１の中心穴を通したワイヤ３
の先端にボール３ａをアーク放電により形成する。次に
キャピラリ１１を下げてボール３ａをリード１の適当な
位置に圧着する（第一ボンディング）。次にキャピラリ
１１を移動して第一ボンディング個所の半導体チップ２
寄り近傍のリード１上にワイヤ３の側面を圧着する（第
二ボンディング）。この際、ワイヤ３は第一ボンディン
グのボール３ａの付け根で屈曲させて低く配線する。又
、第二ボンディングの位置は、第一ボンディングと次に
行う第三ボンディングとを結ぶ直線上とする。次に半導
体チップ２の電極（ボンディングパッド）にワイヤ３の
側面を圧着する（第三ボンディング）。この際、ワイヤ
３は低く配線する。更にワイヤ３を第三ボンディング個
所で切断して配線を完了する。Using a ball bonding type wire bonder, the wire 3 is first passed through the center hole of the capillary 11.
A ball 3a is formed at the tip of the ball 3a by arc discharge. Next, the capillary 11 is lowered and the ball 3a is crimped onto the lead 1 at an appropriate position (first bonding). Next, the capillary 11 is moved to the semiconductor chip 2 at the first bonding location.
The side surface of the wire 3 is crimped onto the lead 1 near the lead (second bonding). At this time, the wire 3 is bent at the base of the first bonding ball 3a and wired low. Further, the position of the second bonding is on a straight line connecting the first bonding and the third bonding to be performed next. Next, the side surface of the wire 3 is crimped to the electrode (bonding pad) of the semiconductor chip 2 (third bonding). At this time, the wire 3 is routed low. Furthermore, the wire 3 is cut at the third bonding point to complete the wiring.

【００１４】このボンディング方法により直径２５μｍ
の金線をボンディングした結果、配線高さＨ１を約５０
μｍとすることが出来た。これはウエッジボンディング
方式の場合の配線高さＨ３に匹敵する。従来のボールボ
ンディング方式では配線高さＨ２は　１００〜２００　
μｍ程度必要であった。又、ボンディング速度はウエッ
ジボンディング方式の場合の三倍程度の高速が得られた
。[0014] With this bonding method, a diameter of 25 μm
As a result of bonding the gold wire, the wiring height H1 was approximately 50
It was possible to set it to μm. This is comparable to the wiring height H3 in the case of the wedge bonding method. In the conventional ball bonding method, the wiring height H2 is 100 to 200
About μm was necessary. Furthermore, the bonding speed was about three times faster than that of the wedge bonding method.

【００１５】本発明は以上の実施例に限定されることな
く、更に種々変形して実施出来る。例えば、半導体チッ
プ２のボンディングパッドが充分に広ければ、第一及び
第二ボンディングを半導体チップ２上で行い、第三ボン
ディングをリード１上とすることが出来る。更に、リー
ド１と半導体チップ２との間の配線以外の配線に本発明
を適用することが可能である。The present invention is not limited to the above embodiments, but can be implemented with various modifications. For example, if the bonding pads of the semiconductor chip 2 are sufficiently wide, the first and second bonding can be performed on the semiconductor chip 2 and the third bonding can be performed on the lead 1. Furthermore, the present invention can be applied to wiring other than the wiring between the lead 1 and the semiconductor chip 2.

【００１６】[0016]

【発明の効果】以上説明したように、本発明によれば、
半導体装置の特性、信頼性を損なうことなくワイヤを低
く配線することが可能なボールボンディング方式のワイ
ヤボンディング方法を提供することが出来、薄型パッケ
ージや高周波素子の場合等、配線を特に低くすることが
要求される半導体装置の製造効率向上に寄与する。[Effects of the Invention] As explained above, according to the present invention,
It is possible to provide a ball bonding wire bonding method that allows wires to be wired low without impairing the characteristics and reliability of semiconductor devices, and it is possible to make the wires particularly low in the case of thin packages and high-frequency devices. Contributes to improving the required manufacturing efficiency of semiconductor devices.

【図面の簡単な説明】[Brief explanation of the drawing]

【図１】　　本発明の実施例を説明する模式図であり、
　（ａ）は第一ボンディングの状態を、（ｂ）　は第二
ボンディングの状態を、（ｃ）　は配線完了時の状態を
それぞれ示している。FIG. 1 is a schematic diagram illustrating an example of the present invention,
(a) shows the state of the first bonding, (b) shows the state of the second bonding, and (c) shows the state when wiring is completed.

【図２】　　従来のボールボンディング方式を説明する
模式図であり、　（ａ）は第一ボンディングの状態を、
（ｂ）　は配線完了時の状態をそれぞれ示している。FIG. 2 is a schematic diagram illustrating a conventional ball bonding method; (a) shows the state of the first bonding;
(b) shows the state when wiring is completed.

【図３】　　ウエッジボンディング方式を説明する模式
図であり、　（ａ）は第一ボンディングの状態を、（ｂ
）　は配線完了時の状態をそれぞれ示している。FIG. 3 is a schematic diagram illustrating the wedge bonding method, in which (a) shows the state of the first bonding, and (b)
) indicate the state when wiring is completed.

【符号の説明】[Explanation of symbols]

１　　リード（内部リード） ２　　半導体チップ ３　　ワイヤ ３ａ　　ボール １１　　キャピラリ １２　　ウエッジ Ｈ１，　Ｈ２，　Ｈ３　　配線高さ 1 Lead (internal lead) 2 Semiconductor chip 3 Wire 3a Ball 11 Capillary 12 Wedge H1, H2, H3 Wiring height

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】　　ワイヤ（３）　の先端にボール（３ａ
）を形成した後、該ボール（３ａ）を内部リード（１）
　上にボンディングする第一の工程と、一端をボンディ
ングした該ワイヤ（３）　を該内部リード（１）　上の
第一の工程とは異なる位置にボンディングする第二の工
程と、半導体チップ（２）　の電極上に該ワイヤ（３）
　をボンディングする第三の工程とを含むことを特徴と
する半導体装置の製造方法。[Claim 1] A ball (3a) is attached to the tip of the wire (3).
), the ball (3a) is connected to the internal lead (1).
a first step of bonding the wire (3) with one end bonded onto the internal lead (1); a second step of bonding the wire (3) with one end bonded to the internal lead (1) at a position different from the first step; The wire (3) on the electrode of
and a third step of bonding.
JP3016133A 1991-02-07 1991-02-07 Manufacture of semiconductor device Withdrawn JPH04255237A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3016133A JPH04255237A (en) 1991-02-07 1991-02-07 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3016133A JPH04255237A (en) 1991-02-07 1991-02-07 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH04255237A true JPH04255237A (en) 1992-09-10

Family

ID=11907996

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3016133A Withdrawn JPH04255237A (en) 1991-02-07 1991-02-07 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH04255237A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003086621A (en) * 2001-09-10 2003-03-20 Rohm Co Ltd Semiconductor device and manufacturing method therefor
SG143060A1 (en) * 2005-05-10 2008-06-27 Kaijo Kk Wire loop, semiconductor device having same and wire bonding method
US8016182B2 (en) 2005-05-10 2011-09-13 Kaijo Corporation Wire loop, semiconductor device having same and wire bonding method
US8053351B2 (en) 2009-12-03 2011-11-08 Samsung Electronics Co., Ltd. Method of forming at least one bonding structure
JP2016183943A (en) * 2015-03-27 2016-10-20 株式会社フジクラ Semiconductor Pressure Sensor

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003086621A (en) * 2001-09-10 2003-03-20 Rohm Co Ltd Semiconductor device and manufacturing method therefor
JP4629284B2 (en) * 2001-09-10 2011-02-09 ローム株式会社 Semiconductor device and manufacturing method thereof
SG143060A1 (en) * 2005-05-10 2008-06-27 Kaijo Kk Wire loop, semiconductor device having same and wire bonding method
US8016182B2 (en) 2005-05-10 2011-09-13 Kaijo Corporation Wire loop, semiconductor device having same and wire bonding method
US8053351B2 (en) 2009-12-03 2011-11-08 Samsung Electronics Co., Ltd. Method of forming at least one bonding structure
JP2016183943A (en) * 2015-03-27 2016-10-20 株式会社フジクラ Semiconductor Pressure Sensor

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