JPH04237911A - Manufacture of thin film multilayer structure - Google Patents

Abstract

PURPOSE:To enable surface flattening in manufacturing a thin film multilayer structure on the surface of a substrate. CONSTITUTION:With respect to conductor patterns on each layer, the process 21 for forming an insulating layer onto the surface thereof is constituted of the process 22 for forming the first insulating layer, the processes 23 and 24 for removing the portion covering a conductor pattern in the first insulating layer by etching, the process 25 for removing the etching mask, and the process 26 for forming the second insulating layer thereafter.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing thin film multilayer structures on the surface of a substrate.

[0002] In recent years, there has been a tendency for thin film multilayer structures formed on the surface of substrates to become more multilayered. As the number of layers increases, the degree of surface unevenness increases. As the surface irregularities become larger,
The degree of adhesion of the mask deteriorates, resulting in a decrease in exposure accuracy, concentration of thermal stress, and incomplete filling of the prepreg resin.

[0003] Therefore, it is necessary to maintain the surface as flat as possible and then create multiple layers.

0004

2. Description of the Related Art Conventionally, the manufacturing process has been as shown in FIG.

First, step 1 is performed to form a first layer conductor pattern 11 on a substrate 10, as shown in FIG.

Next, in step 2, an insulating resin is applied to form an insulating layer 12, as shown in FIG.

Next, step 3 is performed to form a second layer conductor pattern 13, as shown in FIG.

Next, step 4 is performed, in which an insulating resin is applied in the same manner as in step 2, and as shown in FIG.
form.

A thin film multilayer structure 17 is formed by repeating the above steps, performing step 5 to form a conductor pattern 15, and finally performing step 6 to form a surface insulating layer 16.

0010

[Problems to be Solved by the Invention] As shown in FIG.
A difference in level will occur.

This level difference H1 increases as the number of layers of the conductor pattern increases, and for example, the adhesion of the mask deteriorates, the exposure accuracy decreases, and it becomes difficult to form a conductor pattern with desired accuracy.

[0012] Furthermore, thermal stress tends to concentrate on the step portion, which may cause a wire breakage accident.

Furthermore, when a prepreg is layered on a thin film multilayer structure, filling of the resin into the recesses 18 tends to be incomplete. The etching solution may seep into areas where the filling is incomplete, causing short circuits.

[0014] An object of the present invention is to provide a method for manufacturing a thin film multilayer structure that makes it possible to flatten the surface.

[0015]

[Means for Solving the Problem] The invention of claim 1 includes forming a first insulating layer, and forming a first insulating layer on the upper surface of the conductive pattern, and forming a first insulating layer on the upper surface of the conductive pattern. The structure is such that a portion is removed by etching, and then a second insulating layer is formed.

According to a second aspect of the invention, the above etching is performed by reactive ion etching.

[0017]

In the first aspect of the invention, removing the portion of the first insulating layer corresponding to the conductor pattern flattens the surface. The second insulating layer formed thereon has a flat surface.

In the second aspect of the invention, reactive ion etching efficiently removes a portion of the first insulating layer.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the steps of the method for manufacturing a thin film multilayer structure according to the present invention, and FIGS. 2 and 3 show the states in each step.

First, step 20 is performed. In this step 20, as shown in FIG. 2(A), a first layer conductor pattern 31 made of a thin film is formed on the surface of a substrate 30.

The first layer conductor pattern 31 has a Cu thin film 32 as its main body and a Cr layer 33 on its surface, and has a thickness t1 of about 5 μm. Cr layer 33
is for protecting the Cu thin film 32 during etching mask removal processing, which will be described later. Next, an insulating layer forming step 21 is performed.

This step 21 consists of five steps 22-26. First, step 22 is performed.

In this step 22, condensation type polyimide is applied to the first layer conductor pattern 31 by spin coating.
It is coated to a thickness t2 of 5 μm, which is the same thickness as , and heated to polymerize.

As a result, as shown in FIG. 2(B), the first insulating layer 34 covers the first layer conductor pattern 31,
It is formed on the surface of the substrate 30.

Next, step 23 is performed. In this step 23, first, a Cu film is formed on the surface of the first insulating layer 34 by sputtering, a resist film is formed on this surface,
Using a transfer mask of the pattern of the first layer conductor pattern 31, exposure is performed, development is performed, and etching is performed, and finally the resist film is removed.

Thereby, as shown in FIG. 2C, a reactive ion etching mask 35 is formed in the portion of the first insulating layer 34 that does not cover the first layer conductor pattern 31. Next, step 24 is performed.

[0027] Here, reactive ion etching is performed. As a result, as shown in FIG. 2D, a portion 34a of the first insulating layer 34 where the etching mask 35 is not formed is removed, and the surface of the first layer conductor pattern 31 is exposed.

Since reactive ion etching is performed as the etching, it can be completed in a shorter time than other etching methods, and side etching can be suppressed to a small size.

Next, step 35 is performed. Here, wet etching is performed, and as shown in FIG. 3(A), the mask 3
Remove 5.

The Cr layer 33 functions as an etching resist, and the first layer conductor pattern 31 is not eroded.

Next, step 26 is performed. In this step 26, similarly to step 22, condensation type polyimide is applied by spin coating, and then heated and polymerized.

As a result, as shown in FIG. 3(B), the second insulating layer 36 is connected to the first layer conductor pattern 31
It is formed to cover the insulating layer 34 of.

The base on which the second insulating layer 36 is formed is shown in FIG.
Since the surface is flat as shown in FIG. 3A, the surface 36a of the second insulating layer 36 formed on this surface is
The surface becomes flat as shown in (B).

[0034] Next, in the same way as steps 20 and 21 above,
The step 20-2 of forming a second layer conductor pattern and the insulating layer forming step 21-2 are performed, and these are further repeated, and finally the conductor pattern forming step 20-n of the n-th layer and the surface insulating layer forming step 20-n are performed. Perform step 21-n. In this way, for example, a three-layer thin film multilayer structure 50 shown in FIG. 3(C) is manufactured. In FIG. 3C, 38 is a second layer conductor pattern, and 39 is an insulating layer covering this second layer conductor pattern 38. In FIG. 4
0 is a conductor pattern of the third layer which is the final layer, and 41 is a surface insulating layer.

In FIG. 3B, the first insulating layer 34 and the second insulating layer 34
The insulating layer 36 functions as an insulating layer 37 for the first layer conductor pattern 31.

The surface 37a of this insulating layer 37 is a flat surface. Therefore, the Cu film that forms the basis of the second layer conductor pattern 38 can be well formed, and the mask for patterning can also be brought into good contact, and exposure can be carried out with high precision. The pattern 38 is formed with high precision.

The subsequent third layer conductor pattern 40 is also formed on the flat surface in the same way as the second layer conductor pattern 38 described above.

[0038] Thereby, the third layer conductor pattern 40 is also formed with high precision. In addition, since the surface is flattened each time a conductor pattern is formed for each layer and an insulating layer is formed to cover it, even if the number of layers increases, the conductor pattern for the final layer (see Figure 3)
In C), the step H2 on the surface after the third layer conductor pattern 40) is formed is small, corresponding to the thickness t1 of one conductor pattern.

Therefore, the step H3 on the surface 42 of the thin film multilayer structure 40 (surface insulating layer 41) is also small, corresponding to the thickness t of one conductor pattern.

[0040] Therefore, concentration of thermal stress is less likely to occur,
Conductor pattern disconnection accidents caused by concentration of thermal stress do not occur.

Further, the recesses 43 on the surface 42 of the thin film multilayer structure 50 are shallow, and when prepreg is laminated on this surface, the recesses 43 are completely filled with prepreg resin. Therefore, when etching is performed in a subsequent step, the etching solution will not penetrate.

[0042]

As explained above, according to the invention of claim 1, it is possible to form a multilayer structure while forming the conductor pattern of each layer on a flat surface, and the conductor pattern of each layer can be formed with high precision. It is possible to create multiple layers while Furthermore, the surface can be flattened, concentration of thermal stress can be avoided, and accidents such as disconnection of the conductor pattern can be prevented. Furthermore, since the surface is flattened, even when the surface is filled with prepreg resin, the resin can be completely filled.

Further, according to the second aspect of the invention, the first insulating layer can be partially removed efficiently while suppressing side etching as much as possible.

[Brief explanation of the drawing]

FIG. 1 is a diagram illustrating an embodiment of the method for manufacturing a thin film multilayer structure of the present invention.

FIG. 2 is a diagram showing states in each step of FIG. 1;

FIG. 3 is a diagram showing states in each step following FIG. 2;

FIG. 4 is a diagram showing an example of a conventional method for manufacturing a thin film multilayer structure.

FIG. 5 is a diagram showing a thin film multilayer structure manufactured by the manufacturing method of FIG. 4;

[Explanation of symbols]

20 First layer conductor pattern forming step 20-2
Second layer conductor pattern forming step 20-n Nth layer conductor pattern forming step 21, 21-2 Insulating layer forming step 21-n Surface insulating layer forming method 22 First insulating layer forming step 23 Etching mask forming step 24 Reactive ion etching step 25 Etching mask removal step 26 Second insulating layer forming step 30 Substrate 31 First layer conductor pattern 32 Cu thin film 33 Cr layer 34 First insulating layer 35 Reactive ion etching mask 36 Second insulating layer 38 Second layer conductor pattern 39 Insulating layer 40 Third layer conductor pattern 41 Surface insulating layer 42 Surface 43 Recess 50 Thin film multilayer structure

Claims (2)

[Claims] [Claim 1] A conductor pattern (3
1, 37, 40) by sequentially laminating a plurality of layers with insulating layers (34, 76) interposed therebetween, the step (21) of forming the insulating layer, and the step of covering the conductor pattern. a step (23) of forming a first insulating layer having substantially the same thickness as the conductor pattern; and a step (23) of forming an etching mask in a portion of the first insulating layer that does not cover the conductor pattern. ), an etching step (24) of performing etching to remove a portion of the first insulating layer where the etching mask is not formed to expose the conductor pattern, and a step (25) of removing the etching mask. ), and a step (26) of forming a second insulating layer on the surface of the exposed conductor pattern and the first insulating layer that remains unetched. manufacturing method. 2. A method for manufacturing a thin film multilayer structure, wherein the etching step (24) according to claim 1 is performed by reactive ion etching.