JPH0423347B2 - - Google Patents

Info

Publication number
JPH0423347B2
JPH0423347B2 JP15369881A JP15369881A JPH0423347B2 JP H0423347 B2 JPH0423347 B2 JP H0423347B2 JP 15369881 A JP15369881 A JP 15369881A JP 15369881 A JP15369881 A JP 15369881A JP H0423347 B2 JPH0423347 B2 JP H0423347B2
Authority
JP
Japan
Prior art keywords
address
read
address counter
memory
write
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15369881A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5856206A (ja
Inventor
Toshifumi Shibuya
Takashi Takeuchi
Takao Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15369881A priority Critical patent/JPS5856206A/ja
Publication of JPS5856206A publication Critical patent/JPS5856206A/ja
Publication of JPH0423347B2 publication Critical patent/JPH0423347B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/22—Signal processing not specific to the method of recording or reproducing; Circuits therefor for reducing distortions

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
JP15369881A 1981-09-30 1981-09-30 Ｐｃｍ再生装置のメラリ−・アドレス制御回路 Granted JPS5856206A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15369881A JPS5856206A (ja) 1981-09-30 1981-09-30 Ｐｃｍ再生装置のメラリ−・アドレス制御回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15369881A JPS5856206A (ja) 1981-09-30 1981-09-30 Ｐｃｍ再生装置のメラリ−・アドレス制御回路

Publications (2)

Publication Number Publication Date
JPS5856206A JPS5856206A (ja) 1983-04-02
JPH0423347B2 true JPH0423347B2 (ko) 1992-04-22

Family

ID=15568159

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15369881A Granted JPS5856206A (ja) 1981-09-30 1981-09-30 Ｐｃｍ再生装置のメラリ−・アドレス制御回路

Country Status (1)

Country Link
JP (1) JPS5856206A (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0632164B2 (ja) * 1985-02-11 1994-04-27 アムペックス コーポレーシヨン メモリ制御回路

Also Published As

Publication number Publication date
JPS5856206A (ja) 1983-04-02

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