JPH0416945B2 - - Google Patents
Info
- Publication number
- JPH0416945B2 JPH0416945B2 JP57075438A JP7543882A JPH0416945B2 JP H0416945 B2 JPH0416945 B2 JP H0416945B2 JP 57075438 A JP57075438 A JP 57075438A JP 7543882 A JP7543882 A JP 7543882A JP H0416945 B2 JPH0416945 B2 JP H0416945B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- input
- circuits
- gnd
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 claims description 35
- 239000000758 substrate Substances 0.000 claims description 11
- 238000010586 diagram Methods 0.000 description 8
- 238000000034 method Methods 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
Landscapes
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7543882A JPS58194363A (ja) | 1982-05-07 | 1982-05-07 | 半導体集積回路装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7543882A JPS58194363A (ja) | 1982-05-07 | 1982-05-07 | 半導体集積回路装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58194363A JPS58194363A (ja) | 1983-11-12 |
JPH0416945B2 true JPH0416945B2 (US06486227-20021126-C00005.png) | 1992-03-25 |
Family
ID=13576233
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7543882A Granted JPS58194363A (ja) | 1982-05-07 | 1982-05-07 | 半導体集積回路装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58194363A (US06486227-20021126-C00005.png) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62169464A (ja) * | 1986-01-22 | 1987-07-25 | Hitachi Ltd | 半導体集積回路装置 |
JP3132635B2 (ja) * | 1995-02-22 | 2001-02-05 | 日本電気株式会社 | 半導体集積回路の試験方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4950878A (US06486227-20021126-C00005.png) * | 1972-09-18 | 1974-05-17 | ||
JPS52119802A (en) * | 1976-04-01 | 1977-10-07 | Matsushita Electronics Corp | Semiconductor ic device |
JPS5420680A (en) * | 1977-07-18 | 1979-02-16 | Hitachi Ltd | Large scale integrated circuit |
-
1982
- 1982-05-07 JP JP7543882A patent/JPS58194363A/ja active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4950878A (US06486227-20021126-C00005.png) * | 1972-09-18 | 1974-05-17 | ||
JPS52119802A (en) * | 1976-04-01 | 1977-10-07 | Matsushita Electronics Corp | Semiconductor ic device |
JPS5420680A (en) * | 1977-07-18 | 1979-02-16 | Hitachi Ltd | Large scale integrated circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS58194363A (ja) | 1983-11-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20050218959A1 (en) | Semiconductor integrated circuit device | |
US6828842B2 (en) | Semiconductor integrated circuit device | |
US5875086A (en) | Semiconductor integrated circuit device equipped with protective system for directly discharging surge voltage from pad to discharge line | |
EP0316082B1 (en) | Input/output buffer for an integrated circuit | |
JP2594988B2 (ja) | 半導体集積回路装置の動作電位供給配線の配線設計方法 | |
US4979016A (en) | Split lead package | |
US4572972A (en) | CMOS Logic circuits with all pull-up transistors integrated in separate chip from all pull-down transistors | |
JPH09275191A (ja) | 半導体集積回路及びそれを使用した回路装置 | |
EP0687068A2 (en) | Output driver for use in semiconductor integrated circuit | |
JP3590535B2 (ja) | 多数の供給電圧に対処するプログラマブル・バイアスを有する出力バッファおよびその方法 | |
JPH0416945B2 (US06486227-20021126-C00005.png) | ||
JP3228589B2 (ja) | マルチチップモジュール | |
JP2917703B2 (ja) | 半導体集積回路装置 | |
US6834381B2 (en) | Redistribution metal for output driver slew rate control | |
JPH0793562B2 (ja) | 出力バッファ回路 | |
JP2842597B2 (ja) | 半導体集積回路装置 | |
JP3436632B2 (ja) | ノイズ耐性低電圧バッファ | |
JPH04336812A (ja) | デジタル回路装置 | |
JPH0377666B2 (US06486227-20021126-C00005.png) | ||
JP2915319B2 (ja) | 半導体装置 | |
JP3184101B2 (ja) | 半導体装置 | |
JPH05102826A (ja) | 半導体集積回路装置 | |
JP2001077230A (ja) | リードフレーム及びそれを用いた半導体装置実装体 | |
JPS5844741A (ja) | 半導体集積回路 | |
JPS61119071A (ja) | 半導体集積回路 |