JPH04118987A - Mounting method for chip component - Google Patents
Mounting method for chip componentInfo
- Publication number
- JPH04118987A JPH04118987A JP23708290A JP23708290A JPH04118987A JP H04118987 A JPH04118987 A JP H04118987A JP 23708290 A JP23708290 A JP 23708290A JP 23708290 A JP23708290 A JP 23708290A JP H04118987 A JPH04118987 A JP H04118987A
- Authority
- JP
- Japan
- Prior art keywords
- board
- conductive film
- chip
- component
- chip component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims description 25
- 238000009434 installation Methods 0.000 claims description 9
- 238000005476 soldering Methods 0.000 claims description 2
- 230000002093 peripheral effect Effects 0.000 abstract 1
- 239000000758 substrate Substances 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
この発明は、プリント配線基板に抵抗、コンデンサ、イ
ンダクタなどのチップ部品を実装する方法に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for mounting chip components such as resistors, capacitors, and inductors on a printed wiring board.
（従来の技術）
電子回路装置の小型化を達成するために、回路素子自体
の小型化や形態の工夫がなされているとともに、これを
実装するプリント基板の配線構造や実装方法についても
さまざまな工夫がなされている。小型で高密度な実装が
可能な素子形態として、ほぼ直方体の素子チップの両端
部に端子導電膜が被覆形成されているチップ部品が知ら
れている。これはリード線やリードフレームがなく、プ
リント配線基板の導電パターン上に端子導電膜を接する
ようにして直接設置されてはんだ付けされる。この種の
実装方法は表面実装と呼ばれており、各種の電子回路装
置に適用されている。(Prior art) In order to achieve miniaturization of electronic circuit devices, improvements have been made to the miniaturization and form of the circuit elements themselves, and various innovations have also been made to the wiring structure and mounting method of the printed circuit board on which they are mounted. is being done. 2. Description of the Related Art A chip component in which both ends of a substantially rectangular parallelepiped element chip are coated with a terminal conductive film is known as an element form that can be mounted compactly and with high density. This device does not have lead wires or lead frames, and is installed and soldered directly onto the conductive pattern of the printed wiring board with the terminal conductive film in contact with it. This type of mounting method is called surface mounting, and is applied to various electronic circuit devices.
（発明が解決しようとする課局）
チップ部品をプリント−配線基板上に直接的に密着配置
する表面実装方法によれば、回路素子のリード線やリー
ドフレームを基板の穴に通してはんだ付けする実装構造
に比べて実装後の高さ（基板の厚み方向の寸法）を大巾
に小さくすることができる。しかし基板の表面にチップ
部品を配列する構造であるため、部品数が多ければ基板
の面積を大きくしなければならず、大規模な回路装置に
なると複数の基板に分けて表面実装したものを多段に重
ねるような構造をとらざるを得ない。(The problem to be solved by the invention) According to the surface mounting method in which chip components are placed directly and closely on a printed wiring board, lead wires and lead frames of circuit elements are passed through holes in the board and soldered. Compared to a mounted structure, the height after mounting (dimension in the thickness direction of the board) can be significantly reduced. However, since the structure is such that chip parts are arranged on the surface of the board, the larger the number of parts, the larger the area of the board, and in the case of large-scale circuit devices, multiple boards are surface-mounted and then mounted in multiple stages. We have no choice but to adopt a structure that overlaps the two.
この発明は前述した従来の問題点に鑑みなされたもので
、その目的は、チップ部品をプリント配線基板に実装す
る際にその厚み寸法を従来よりさらに低く押さえること
ができ、しかも基板の厚み方向に容易に多重構造を取る
ことができようにしたチップ部品の実装方法を提供する
ことにある。This invention was made in view of the above-mentioned conventional problems, and its purpose is to be able to keep the thickness of chip components lower than before when mounting chip components on a printed wiring board, and to reduce the thickness in the direction of the thickness of the board. It is an object of the present invention to provide a method for mounting chip components that allows a multilayer structure to be easily formed.
（課題を解決するための手段）
そこでこの発明では、プリント配線基板の所定位置にチ
ップ部品が当該基板と平行な姿勢で嵌合するチップ設置
穴を形成するとともに、この穴の所定の対向２面の周辺
に配線用導電膜を形成し、前記チップ部品を前記チップ
設置穴にほぼ埋設状態で嵌合して前記端子導電膜と前記
配線用導電膜とをはんだ付けするようにした。(Means for Solving the Problem) Therefore, in the present invention, a chip installation hole is formed at a predetermined position of a printed wiring board into which a chip component is fitted in a position parallel to the board, and two predetermined opposing faces of this hole are formed. A conductive film for wiring is formed around the terminal conductive film and the conductive film for wiring is soldered by fitting the chip component into the chip installation hole in a substantially buried state.
（作 用）
前記プリント基板の前記チップ設置穴に前記チップ部品
を嵌合することでチップ部品が前記基板の配線パターン
に対して位置決めされ、その状態で前記端子導電膜と前
記はんだ用導電膜とをはんだ付けする。すると前記チッ
プ部品は前記プリント配線基板の厚み内にほぼ収まるこ
とになる。(Function) By fitting the chip component into the chip installation hole of the printed circuit board, the chip component is positioned with respect to the wiring pattern of the board, and in this state, the terminal conductive film and the solder conductive film are connected to each other. Solder. Then, the chip component will almost fit within the thickness of the printed wiring board.
（実施例）
本発明の一実施例による実装方法の要点を第１図〜第５
図にしたがって順次説明する。(Example) The main points of the mounting method according to an example of the present invention are shown in Figures 1 to 5.
The explanation will be given in order according to the figures.
まず第１図に示すように、プリント配線基板１の所定部
分に、以下に説明する１個のチップ設置穴の両端部に相
当する２個の細い長方形の穴２ａと２ｂを開口形成する
。First, as shown in FIG. 1, two thin rectangular holes 2a and 2b are formed in a predetermined portion of a printed wiring board 1, corresponding to both ends of one chip installation hole described below.
次に第２図に示すように、基板１の表面に所定パターン
で配線用導電膜３や４などを形成するが、その際にスル
ーホールはんだと同様にして前記の穴２ａと２ｂの内周
面にもそれぞれ導電膜３に連続している導電膜と導電膜
４に連続している導電膜を被覆形成する。Next, as shown in FIG. 2, conductive films 3 and 4 for wiring are formed in a predetermined pattern on the surface of the substrate 1. At this time, the inner peripheries of the holes 2a and 2b are formed in the same manner as through-hole soldering. A conductive film continuous to the conductive film 3 and a conductive film continuous to the conductive film 4 are also coated on the surfaces, respectively.
次に第３図に示すように、基板１の前記の穴２ａと２ｂ
の間の部分をも切除してチップ部品５の寸法に合わせた
１個のチップ配設穴２を形成する。Next, as shown in FIG.
The part between them is also cut out to form one chip installation hole 2 that matches the dimensions of the chip component 5.
そして第３図〜第４図に示すように、基板１゛のチップ
配置穴２にチップ部品５を嵌め込む。こうするとチップ
部品５は基板１の厚み内に埋め込まれた配置状態となり
、チップ部品５の一方ノ端子導電膜６が基板ｌの配線導
電膜３に対向し、他方の端子導電膜７が配線用導電膜４
と対向する。Then, as shown in FIGS. 3 and 4, the chip component 5 is fitted into the chip placement hole 2 of the substrate 1''. In this way, the chip component 5 is placed in a state where it is embedded within the thickness of the substrate 1, with the terminal conductive film 6 of one terminal of the chip component 5 facing the wiring conductive film 3 of the substrate l, and the other terminal conductive film 7 facing the wiring conductive film 3. Conductive film 4
to face.
次に第５図に示すように、基板１の所定部分にはんだを
デツプして、チップ配置穴２内のチップ部品５の両端、
千尋電膜６と７を基板１の配線用導電膜３と４にそれぞ
れはんだ付けする。第５図の８と９はデツプされたはん
だを示している。Next, as shown in FIG.
The Chihiro electrical films 6 and 7 are soldered to the wiring conductive films 3 and 4 of the substrate 1, respectively. 8 and 9 in FIG. 5 indicate the solder which has been deposited.
以上説明した本発明の実装方法のみによっても電子回路
装置を製作することも可能であるが、−般には従来から
の各種の実装方法と組合せて使用することになる。第６
図はその一例を示している。Although it is possible to manufacture an electronic circuit device using only the mounting method of the present invention described above, it is generally used in combination with various conventional mounting methods. 6th
The figure shows an example.
第６図において、６１と６２は最終的に２枚重されたプ
リント配線基板である。一方のプリント配線基板６１に
は本発明の実装方法によ′ってチップ部品６３が厚み内
に埋め込まれるように実装されているとともに、その上
面側にチップ部品６５が従来の表面実装方法によって実
装されている。In FIG. 6, 61 and 62 are finally two printed wiring boards stacked on top of each other. On one printed wiring board 61, a chip component 63 is mounted so as to be embedded within its thickness by the mounting method of the present invention, and a chip component 65 is mounted on the upper surface side by a conventional surface mounting method. has been done.
同じく他方のプリント配線基板６２には本発明の実装方
法によってチップ部品６４が基板の厚み内に埋め込まれ
た状態で実装されているとともに、基板６２の下面側に
表面実装方法によってチップ部品６６が取付けられてい
る。さらに基板６１と６２を２枚重ねした後に部品６７
のリード線が基板゛６１．６２の穴を貫通してはんだ付
けされている。このように本発明の実装方法を適宜に用
いることで従来よりさらに高密度な実装が可能となり、
特に基板の厚み方向の寸法を小さくすることができる。Similarly, a chip component 64 is mounted on the other printed wiring board 62 by being embedded in the thickness of the board by the mounting method of the present invention, and a chip component 66 is mounted on the lower surface side of the board 62 by a surface mounting method. It is being Furthermore, after stacking two boards 61 and 62, the component 67
The lead wires pass through the holes in the board 61 and 62 and are soldered. In this way, by appropriately using the mounting method of the present invention, higher density mounting than before is possible,
In particular, the dimension of the substrate in the thickness direction can be reduced.
（発明の効果）
以上詳細に説明したように、この発明によるチップ部品
の実装方法では、プリント配線基板に形成したチップ設
置穴内にチップ部品が嵌め込−まれで、チップ部品が基
板の厚み内に埋設された状態で実装されるので、従来の
表面実装方法に比べて実装後の基板厚み方向の寸法が極
めて小さくなるとともに、基板の穴にチップ部品を嵌め
込むことで部品か位置決めされるので、組立工程も簡単
になる。この発明の実装方法と他の実装方法とを適宜に
組合せて電子回路装置を構成すれば、全体としての実装
密度を従来より大きくすることができるとともに、特に
厚み方向の寸法を小さくすることかができ、電子回路装
置の小型化に大いに寄与する。(Effects of the Invention) As explained in detail above, in the chip component mounting method according to the present invention, the chip component is not inserted into the chip installation hole formed in the printed wiring board, and the chip component is not inserted into the thickness of the board. Since it is mounted in a buried state, the dimension in the thickness direction of the board after mounting is extremely small compared to the conventional surface mount method, and the part is positioned by fitting it into the hole in the board. The assembly process also becomes easier. If an electronic circuit device is constructed by appropriately combining the mounting method of the present invention and other mounting methods, the overall packaging density can be increased compared to the conventional method, and the dimension in the thickness direction can be particularly reduced. This greatly contributes to the miniaturization of electronic circuit devices.
第１図〜第５図は本発明の一実施例による実装方法の工
程図、第６図は本発明の実装方法と従来からの実装方法
とを組合せて電子回路装置を構成したものの概略図であ
る。
１・・・・・・プリント配線基板
２・・・・・・チップ設置穴
３．４・・・配線用導電膜
５・・・・・・チップ部品
６．７・・・端子導電膜
８．９・・・はんだ
第１図
ｂ
第２図1 to 5 are process diagrams of a mounting method according to an embodiment of the present invention, and FIG. 6 is a schematic diagram of an electronic circuit device constructed by combining the mounting method of the present invention and a conventional mounting method. be. 1...Printed wiring board 2...Chip installation hole 3.4...Wiring conductive film 5...Chip component 6.7...Terminal conductive film 8. 9...Solder Figure 1b Figure 2
Claims (1)
形成されているチップ部品をプリント配線基板に実装す
る方法であって、プリント配線基板の所定位置にチップ
部品が当該基板と平行な姿勢で嵌合するチップ設置穴を
形成するとともに、この穴の所定の対向２面の周辺に配
線用導電膜を形成し、前記チップ部品を前記チップ設置
穴にほぼ埋設状態で嵌合して前記端子導電膜と前記配線
用導電膜とをはんだ付けすることを特徴とするチップ部
品の実装方法。A method of mounting a chip component, in which a terminal conductive film is coated on both ends of a substantially rectangular parallelepiped element chip, on a printed wiring board, the chip component being fitted in a predetermined position on the printed wiring board in a position parallel to the board. A matching chip installation hole is formed, and a conductive film for wiring is formed around two predetermined opposing sides of this hole, and the chip component is fitted in the chip installation hole in a substantially buried state to form the terminal conductive film. A method for mounting a chip component, comprising soldering the conductive film for wiring and the conductive film for wiring.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2237082A JP2512828B2 (en) | 1990-09-10 | 1990-09-10 | Chip component mounting method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2237082A JP2512828B2 (en) | 1990-09-10 | 1990-09-10 | Chip component mounting method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04118987A true JPH04118987A (en) | 1992-04-20 |
| JP2512828B2 JP2512828B2 (en) | 1996-07-03 |
Family
ID=17010148
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2237082A Expired - Fee Related JP2512828B2 (en) | 1990-09-10 | 1990-09-10 | Chip component mounting method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2512828B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1265465A2 (en) * | 2001-06-06 | 2002-12-11 | Patent-Treuhand-Gesellschaft für elektrische Glühlampen mbH | Printed circuit board |
| JP2006261921A (en) * | 2005-03-16 | 2006-09-28 | Rohm Co Ltd | Structure for mounting optical communication module and mobile electronic apparatus using same |
| JP2015088962A (en) * | 2013-10-31 | 2015-05-07 | 京セラクリスタルデバイス株式会社 | Crystal device |
| JP2015088953A (en) * | 2013-10-31 | 2015-05-07 | 京セラクリスタルデバイス株式会社 | Crystal device |
| JP2016010093A (en) * | 2014-06-26 | 2016-01-18 | 京セラクリスタルデバイス株式会社 | Crystal device |
| CN108617090A (en) * | 2018-05-14 | 2018-10-02 | 维沃移动通信有限公司 | Mobile terminal and its circuit board |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5766693A (en) * | 1980-10-09 | 1982-04-22 | Tdk Electronics Co Ltd | Method of producing electronic circuit device |
| JPS60176577U (en) * | 1984-04-28 | 1985-11-22 | 日本電気ホームエレクトロニクス株式会社 | Printed board |
-
1990
- 1990-09-10 JP JP2237082A patent/JP2512828B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5766693A (en) * | 1980-10-09 | 1982-04-22 | Tdk Electronics Co Ltd | Method of producing electronic circuit device |
| JPS60176577U (en) * | 1984-04-28 | 1985-11-22 | 日本電気ホームエレクトロニクス株式会社 | Printed board |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1265465A2 (en) * | 2001-06-06 | 2002-12-11 | Patent-Treuhand-Gesellschaft für elektrische Glühlampen mbH | Printed circuit board |
| EP1265465A3 (en) * | 2001-06-06 | 2004-07-28 | Patent-Treuhand-Gesellschaft für elektrische Glühlampen mbH | Printed circuit board |
| JP2006261921A (en) * | 2005-03-16 | 2006-09-28 | Rohm Co Ltd | Structure for mounting optical communication module and mobile electronic apparatus using same |
| JP4598572B2 (en) * | 2005-03-16 | 2010-12-15 | ローム株式会社 | Mounting structure of optical communication module and portable electronic device using the same |
| JP2015088962A (en) * | 2013-10-31 | 2015-05-07 | 京セラクリスタルデバイス株式会社 | Crystal device |
| JP2015088953A (en) * | 2013-10-31 | 2015-05-07 | 京セラクリスタルデバイス株式会社 | Crystal device |
| JP2016010093A (en) * | 2014-06-26 | 2016-01-18 | 京セラクリスタルデバイス株式会社 | Crystal device |
| CN108617090A (en) * | 2018-05-14 | 2018-10-02 | 维沃移动通信有限公司 | Mobile terminal and its circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2512828B2 (en) | 1996-07-03 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |