JPH02214195A - Method of mounting electronic part - Google Patents
Method of mounting electronic partInfo
- Publication number
- JPH02214195A JPH02214195A JP3458889A JP3458889A JPH02214195A JP H02214195 A JPH02214195 A JP H02214195A JP 3458889 A JP3458889 A JP 3458889A JP 3458889 A JP3458889 A JP 3458889A JP H02214195 A JPH02214195 A JP H02214195A
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- board
- electronic part
- electronic
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 13
- 239000004020 conductor Substances 0.000 claims abstract description 31
- 238000003780 insertion Methods 0.000 claims abstract description 17
- 230000037431 insertion Effects 0.000 claims abstract description 17
- 239000000758 substrate Substances 0.000 claims description 19
- 229910000679 solder Inorganic materials 0.000 abstract description 4
- 239000000853 adhesive Substances 0.000 abstract description 3
- 230000001070 adhesive effect Effects 0.000 abstract description 3
- 239000003990 capacitor Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、ハイブリッドIC等の基板に対する電子部
品の実装方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for mounting electronic components onto a substrate such as a hybrid IC.
セラミック等からなる基板に複数の電子部品が実装され
たハイブリッドIC(混成集積回路)では、例えば、第
4図に示すように、基板2の表裏面に実装回路に対応し
て区分された導体パターン4.6.8.10,12が形
成され、導体パターン8.10は基板2の表裏面を貫通
させたスルーホールI4を通して電気的に接続されてい
る。In a hybrid IC (hybrid integrated circuit) in which multiple electronic components are mounted on a substrate made of ceramic or the like, for example, as shown in FIG. 4.6.8.10, 12 are formed, and the conductor pattern 8.10 is electrically connected through a through hole I4 penetrating the front and back surfaces of the substrate 2.
そして、基板2の導体パターン4.6間、導体パターン
6.8間及び導体パターン10.12間には、それぞれ
電子部品16.18.20がハンダ22を以て電気的に
接続されることにより実装されている。Electronic components 16, 18, and 20 are electrically connected with solder 22 between the conductor patterns 4.6, 6.8, and 10.12 of the substrate 2, respectively, to be mounted. ing.
そして、このようなハイブリッドICでは、隣接する導
体パターン4.6.8.10.12等の間隔の縮小や電
子部品16.18.20の小型化等、基板2に対する電
子部品16.18.20の実装密度を向上させ、実質的
な小型化を実現している。In such a hybrid IC, the electronic components 16.18.20 relative to the substrate 2 can be reduced in size by reducing the distance between adjacent conductor patterns 4.6.8.10.12, etc., and miniaturizing the electronic components 16.18.20. The packaging density has been improved and substantial miniaturization has been achieved.
また、実装される電子部品16.18.20として例え
ば、抵抗、コンデンサ、トランジスタ等は小型化の傾向
を強め、基板2に対して1つの電子部品が占める面積の
狭小化が進められているが、基板上に電子部品が占める
面積は、各電子部品の投影面積にそのハンダ付はエリア
を加えたものとなり、基板に対して電子部品が占める面
積は相当大きなものとなる。In addition, electronic components 16, 18, 20 to be mounted, such as resistors, capacitors, transistors, etc., are becoming increasingly smaller, and the area occupied by one electronic component on the board 2 is becoming smaller. The area occupied by the electronic components on the board is the sum of the projected area of each electronic component and its soldering area, and the area occupied by the electronic components on the board is quite large.
そして、抵抗やコンデンサ等の小型化された電子部品で
は、その長さや幅が基板の厚さと同等ないしそれ以下に
なるものが実用化されている。Furthermore, miniaturized electronic components such as resistors and capacitors whose lengths and widths are equal to or less than the thickness of the substrate have been put into practical use.
そこで、この発明は、基板の厚みを電子部品の実装空間
として利用することにより、基板に対する電子部品の実
装密度を向上させた電子部品の実装方法の提供を目的と
する。SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a method for mounting electronic components in which the density of mounting electronic components on a board is improved by utilizing the thickness of the board as a mounting space for the electronic components.
この発明の電子部品の実装方法は、電子部品を挿入する
挿入部を基板に形成し、前記基板の表面に設置された導
体パターンに前記電子部品の電極を接続することを特徴
とするものである。The electronic component mounting method of the present invention is characterized in that an insertion portion into which the electronic component is inserted is formed on a substrate, and electrodes of the electronic component are connected to a conductive pattern placed on the surface of the substrate. .
また、この発明の電子部品の実装方法は、前記電子部品
を挿入する前記挿入部を貫通孔で形成し、この貫通孔に
挿入した前記電子部品の電極を前記基板の表裏面に設置
された導体パターンに接続することを特徴とするもので
ある。Further, in the electronic component mounting method of the present invention, the insertion portion into which the electronic component is inserted is formed as a through hole, and the electrodes of the electronic component inserted into the through hole are connected to conductors installed on the front and back surfaces of the substrate. It is characterized by being connected to a pattern.
この発明の電子部品の実装方法によれば、基板に形成さ
れた挿入部に電子部品を挿入し、この電子部品の電極を
挿入部の近傍に設置されている導体パターンに接続する
ことにより、基板の内部に電子部品が実装される。According to the electronic component mounting method of the present invention, the electronic component is inserted into the insertion section formed on the board, and the electrodes of the electronic component are connected to the conductor pattern installed near the insertion section, thereby mounting the electronic component on the board. Electronic components are mounted inside.
また、挿入部として基板に形成された貫通孔に電子部品
を挿入すれば、基板の内部に電子部品を実装できるとと
もに、基板の表裏面に形成されている導体パターンに電
子部品の電極を接続することができ、基板の表裏面に形
成されている導体パターン間が貫通孔に設置されている
電子部品を介して電気的に接続されるので、従前のスル
ーホールとしての機能が得られる。In addition, by inserting an electronic component into a through hole formed in the board as an insertion part, the electronic component can be mounted inside the board, and the electrodes of the electronic component can be connected to the conductor patterns formed on the front and back surfaces of the board. Since the conductor patterns formed on the front and back surfaces of the board are electrically connected via the electronic component installed in the through hole, the function of a conventional through hole can be obtained.
第1図は、この発明の電子部品の実装方法の第1実施例
を示す。FIG. 1 shows a first embodiment of the electronic component mounting method of the present invention.
第1図の(A)に示すように、セラミック等の絶縁材料
で形成された基板2の表裏面には、構成すべき電子回路
に対応して導体パターン4.6.8.1O112が印刷
及び焼成によって形成される。導体パターン4.6間、
導体パターン6.8間、また、導体パターン1O112
間には、抵抗、コイル、コンデンサ等の受動部品やトラ
ンジスタやダイオード等の能動部品のチップ型の電子部
品が実装されることを予定し、それぞれの間隔は実装す
べき電子部品の電極間隔に対応している。As shown in FIG. 1A, conductive patterns 4.6.8.1O112 are printed and printed on the front and back surfaces of the substrate 2 made of an insulating material such as ceramic, corresponding to the electronic circuit to be constructed. Formed by firing. Between the conductor patterns 4 and 6,
Between conductor patterns 6 and 8, and between conductor patterns 1O112
Chip-type electronic components such as passive components such as resistors, coils, and capacitors, and active components such as transistors and diodes are planned to be mounted in between, and the spacing between each component corresponds to the electrode spacing of the electronic components to be mounted. are doing.
次に、第1図の(B)に示すように、基板2の導体パタ
ーン6.8間には、電子部品を挿入する挿入部としての
貫通孔24を形成する。この貫通孔24は、例えば、導
体パターン6.8の形成の後に形成し、その壁面には導
体パターンを形成しない。また、この貫通孔24は、導
体パターン6.8間に接続すべき電子部品が設置可能な
口径とする。Next, as shown in FIG. 1B, a through hole 24 is formed between the conductive patterns 6 and 8 of the substrate 2 as an insertion portion into which an electronic component is inserted. This through hole 24 is formed, for example, after the formation of the conductive pattern 6.8, and no conductive pattern is formed on its wall surface. Further, the through hole 24 has a diameter that allows installation of an electronic component to be connected between the conductor patterns 6.8.
次に、第1図の(C)に示すように、導体パターン4.
6間には接続すべき電子部品16が設置され、また、貫
通孔24には電子部品18が挿入される。そして、第1
図の(D)に示すように、導体パターン4.6間には電
子部品16の電極26.28、導体パターン6.8間に
は電子部品18の電極30.32、また、導体パターン
10.12間には電子部品20の電極34.36が対応
するように固定手段としての接着剤38を用いて各電子
部品16.181.20を基板2の表裏面又は貫通孔2
4内に固定する。Next, as shown in FIG. 1(C), a conductor pattern 4.
An electronic component 16 to be connected is installed between the holes 6 and 6, and an electronic component 18 is inserted into the through hole 24. And the first
As shown in (D) of the figure, electrodes 26.28 of the electronic component 16 are located between the conductive patterns 4.6, electrodes 30.32 of the electronic component 18 are located between the conductive patterns 6.8, and the conductive patterns 10. Each electronic component 16, 181, 20 is attached to the front and back surfaces of the substrate 2 or the through hole 2 using an adhesive 38 as a fixing means so that the electrodes 34, 36 of the electronic component 20 correspond to the gaps between the 12 and 12.
Fixed within 4.
次に、第1図の(E)に示すように、ハンダ付けを行い
、導体パターン4.6に電子部品16の電極26.28
、導体パターン6.8に電子部品18の電極30.32
、導体パターン10.12に電子部品20の電極34.
36がそれぞれハンダ22によって電気的に接続される
ことにより、ハイブリッドICが形成される。Next, as shown in FIG.
, the electrodes 30.32 of the electronic component 18 are placed on the conductor pattern 6.8.
, the electrodes 34. of the electronic component 20 are attached to the conductive patterns 10.12.
36 are electrically connected by solder 22, thereby forming a hybrid IC.
このようなハイブリッドICでは、第4図に示したハイ
ブリッドICとを比較すると、第4図のハイブリッドI
Cで基板2の表面に設置されていた電子部品18が貫通
孔24内に設置され、その分だけ基板2の面積を有効に
利用でき、基板2に対する電子部品の実装密度を向上さ
せることができる。When comparing such a hybrid IC with the hybrid IC shown in FIG. 4, the hybrid IC shown in FIG.
The electronic component 18 that was installed on the surface of the board 2 in C is installed in the through hole 24, and the area of the board 2 can be used effectively accordingly, and the mounting density of electronic components on the board 2 can be improved. .
次に、第2図は、この発明の電子部品の実装方法の第2
実施例を示す。Next, FIG. 2 shows a second method of mounting electronic components according to the present invention.
An example is shown.
第2図の(A)に示すように、基板2の表裏面には、形
成すべき電子回路に対応して導体パターン4.6.10
.12が形成され、この場合、導体パターン6、IOが
重なるように形成する。As shown in FIG. 2(A), conductive patterns 4, 6, and 10 are provided on the front and back surfaces of the substrate 2, corresponding to the electronic circuits to be formed.
.. 12 is formed, and in this case, the conductor patterns 6 and IO are formed so as to overlap.
次に、第2図の(B)に示すように、基板2の表裏面の
導体パターン6.10間に電子部品を挿入する挿入部と
しての貫通孔24を形成し、その口径は、導体パターン
6.10間に接続すべき電子部品が設置可能な大きさに
設定する。Next, as shown in FIG. 2(B), a through hole 24 is formed between the conductor patterns 6 and 10 on the front and back surfaces of the board 2 as an insertion part for inserting an electronic component, and the diameter of the through hole 24 is determined by the diameter of the conductor pattern. 6. Set the size between 10 and 10 so that the electronic components to be connected can be installed.
次に、第2図の(C)に示すように、導体パターン4.
6間には接続すべき電子部品16を設置し、また、貫通
孔24には導体パターン6.10間に接続すべき電子部
品18を挿入する。そして、第2図の(D)に示すよう
に、各電子部品1G、18.20を固定手段としての接
着剤38を用いて基板2の表裏面又は貫通孔24内に固
定する。Next, as shown in FIG. 2(C), the conductor pattern 4.
An electronic component 16 to be connected is placed between the conductor patterns 6 and 10, and an electronic component 18 to be connected is inserted into the through hole 24 between the conductor patterns 6 and 10. Then, as shown in FIG. 2(D), each electronic component 1G, 18, 20 is fixed on the front and back surfaces of the substrate 2 or in the through hole 24 using an adhesive 38 as a fixing means.
次に、第2図の(E)に示すように、ハンダ付けを行い
、導体パターン4.6に電子部品16の電極26.28
、導体パターン6.10に電子部品18の電極30.3
3、導体パターン10.12に電子部品20の電極34
.36がそれぞれハンダ22によって電気的に接続され
る。Next, as shown in FIG.
, the electrode 30.3 of the electronic component 18 is placed on the conductor pattern 6.10.
3. Electrode 34 of electronic component 20 on conductor pattern 10.12
.. 36 are electrically connected by solder 22, respectively.
このようにすれば、第4図のハイブリッドICで基板2
の表面に設置されていた電子部品18が貫通孔24内に
設置され、その電子部品18を通して導体パターン6.
10間が接続されるので、電子部品18の設置面積を基
板2上から削減できるとともに、電子部品18でスルー
ホールを構成できる。In this way, the hybrid IC shown in Fig. 4 can be used on the board 2.
The electronic component 18 that had been installed on the surface of the 6.
10 are connected, the installation area of the electronic component 18 on the board 2 can be reduced, and the electronic component 18 can form a through hole.
次に、第3図は、この発明の電子部品の実装方法の第3
実施例を示す。Next, FIG. 3 shows the third method of mounting electronic components according to the present invention.
An example is shown.
第3図の(A)に示すように、基板2の表裏面に導体パ
ターン4.6.7.10.12が形成され、導体パター
ン6.7間に挿入部としての凹部25を形成し、この凹
部25に第3図の(B)に示すように、電子部品18を
設置し、この電子部品18の電極30.32を導体パタ
ーン6.7に接続してもよい。As shown in FIG. 3A, conductor patterns 4,6,7,10,12 are formed on the front and back surfaces of the substrate 2, and a recess 25 as an insertion part is formed between the conductor patterns 6,7, As shown in FIG. 3B, the electronic component 18 may be placed in the recess 25, and the electrodes 30.32 of the electronic component 18 may be connected to the conductive pattern 6.7.
このように、電子部品18を挿入する挿入部を一方が閉
塞された凹部25で形成すれば、ハンダ付は前に電子部
品18を固定する必要がなく、歩留りを高めることがで
きる。In this way, if the insertion portion into which the electronic component 18 is inserted is formed by the recess 25 with one side closed, there is no need to fix the electronic component 18 before soldering, and the yield can be increased.
〔発明の効果]
以上説明したように、この発明によれば、次のような効
果が得られる。[Effects of the Invention] As explained above, according to the present invention, the following effects can be obtained.
(a) 基板に形成された挿入部に電子部品を設置し
て電気的に接続するので、基板に対する電子部品の実装
密度を向上させることができるとともに、基板面積の縮
小化やハイブリッドICの小型化を実現できる。(a) Since electronic components are installed and electrically connected to the insertion portion formed on the board, it is possible to improve the mounting density of electronic components on the board, and also to reduce the board area and miniaturize hybrid ICs. can be realized.
(b) 基板に形成された1通孔に電子部品を設置し
、基板の表裏面に設置されでいる導体パターン間に電子
部品の電極を接続するので、基板の表裏面の導体パター
ン間が電子部品を介して電気的に接続されることになり
、基板内に設置された電子部品に従来のスルーホールの
機能を行わせることができ、基板からスルーホールを削
減でき、基板に対する電子部品の実装有効面積を拡大す
ることができる。(b) An electronic component is installed in one through hole formed on the board, and the electrodes of the electronic component are connected between the conductive patterns installed on the front and back surfaces of the board, so that electronic components are connected between the conductive patterns on the front and back surfaces of the board. Electrical connections will be made through the components, allowing the electronic components installed within the board to perform the function of conventional through holes, reducing the number of through holes from the board, and making it easier to mount electronic components on the board. The effective area can be expanded.
第1図はこの発明の電子部品の実装方法の第1実施例を
示す図、第2図はこの発明の電子部品の実装方法の第2
実施例を示す図、第β図はこの発明の電子部品の実装方
法の第3実施例を示す図、第4図は従来のハイブリッド
ICにおける基板に対する電子部品の実装形態を示す断
面図である。
2・・・基板
4.6.8.10.12・・・導体パターン16.18
.20・・・電子部品
24・・・貫通孔(挿入部)
26.28.30.32.34.36・・・電極第
■
図
第
図
第
図FIG. 1 is a diagram showing a first embodiment of the electronic component mounting method of the present invention, and FIG. 2 is a diagram showing a second embodiment of the electronic component mounting method of the present invention.
FIG. 3 is a diagram showing a third embodiment of the electronic component mounting method of the present invention, and FIG. 4 is a sectional view showing a mounting form of electronic components on a board in a conventional hybrid IC. 2... Substrate 4.6.8.10.12... Conductor pattern 16.18
.. 20...Electronic component 24...Through hole (insertion part) 26.28.30.32.34.36...Electrode No.
Claims (2)
板の表面に設置された導体パターンに前記電子部品の電
極を接続することを特徴とする電子部品の実装方法。1. 1. A method for mounting an electronic component, comprising: forming an insertion section on a substrate into which the electronic component is inserted; and connecting electrodes of the electronic component to a conductive pattern placed on the surface of the substrate.
し、この貫通孔に挿入した前記電子部品の電極を前記基
板の表裏面に設置された導体パターンに接続することを
特徴とする請求項1記載の電子部品の実装方法。2. 1. The insertion portion into which the electronic component is inserted is formed by a through hole, and the electrodes of the electronic component inserted into the through hole are connected to conductor patterns installed on the front and back surfaces of the substrate. How to mount the electronic components described.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3458889A JPH02214195A (en) | 1989-02-14 | 1989-02-14 | Method of mounting electronic part |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3458889A JPH02214195A (en) | 1989-02-14 | 1989-02-14 | Method of mounting electronic part |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02214195A true JPH02214195A (en) | 1990-08-27 |
Family
ID=12418486
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3458889A Pending JPH02214195A (en) | 1989-02-14 | 1989-02-14 | Method of mounting electronic part |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02214195A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006302851A (en) * | 2005-03-23 | 2006-11-02 | Kyocera Corp | Ceramic container, and battery using this, or electric double layer capacitor, and electric circuit board |
JP2015090924A (en) * | 2013-11-06 | 2015-05-11 | 株式会社豊田自動織機 | Semiconductor device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62120100A (en) * | 1985-11-20 | 1987-06-01 | 日立フェライト株式会社 | Method of mounting chip parts on printed wiring board |
JPS6320469B2 (en) * | 1983-06-06 | 1988-04-27 | Takiron Co |
-
1989
- 1989-02-14 JP JP3458889A patent/JPH02214195A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6320469B2 (en) * | 1983-06-06 | 1988-04-27 | Takiron Co | |
JPS62120100A (en) * | 1985-11-20 | 1987-06-01 | 日立フェライト株式会社 | Method of mounting chip parts on printed wiring board |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006302851A (en) * | 2005-03-23 | 2006-11-02 | Kyocera Corp | Ceramic container, and battery using this, or electric double layer capacitor, and electric circuit board |
JP2015090924A (en) * | 2013-11-06 | 2015-05-11 | 株式会社豊田自動織機 | Semiconductor device |
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