JPH0410743B2 - - Google Patents

Info

Publication number
JPH0410743B2
JPH0410743B2 JP60241159A JP24115985A JPH0410743B2 JP H0410743 B2 JPH0410743 B2 JP H0410743B2 JP 60241159 A JP60241159 A JP 60241159A JP 24115985 A JP24115985 A JP 24115985A JP H0410743 B2 JPH0410743 B2 JP H0410743B2
Authority
JP
Japan
Prior art keywords
wiring board
chip
sealing resin
resin layer
electronic circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60241159A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62101053A (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP60241159A priority Critical patent/JPS62101053A/ja
Publication of JPS62101053A publication Critical patent/JPS62101053A/ja
Publication of JPH0410743B2 publication Critical patent/JPH0410743B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP60241159A 1985-10-28 1985-10-28 薄型電子回路ユニツト Granted JPS62101053A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60241159A JPS62101053A (ja) 1985-10-28 1985-10-28 薄型電子回路ユニツト

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60241159A JPS62101053A (ja) 1985-10-28 1985-10-28 薄型電子回路ユニツト

Publications (2)

Publication Number Publication Date
JPS62101053A JPS62101053A (ja) 1987-05-11
JPH0410743B2 true JPH0410743B2 (cs) 1992-02-26

Family

ID=17070137

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60241159A Granted JPS62101053A (ja) 1985-10-28 1985-10-28 薄型電子回路ユニツト

Country Status (1)

Country Link
JP (1) JPS62101053A (cs)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6124546A (en) * 1997-12-03 2000-09-26 Advanced Micro Devices, Inc. Integrated circuit chip package and method of making the same
JP5343315B2 (ja) * 2006-12-20 2013-11-13 富士通株式会社 実装構造及び半導体装置
JP6602255B2 (ja) * 2016-05-09 2019-11-06 オリンパス株式会社 医療機器用電子基板

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58182854A (ja) * 1982-04-21 1983-10-25 Hitachi Ltd レジン封止型半導体装置およびその製造方法
JPS5988853A (ja) * 1982-11-12 1984-05-22 Nec Corp Ｌｓｉパツケ−ジ

Also Published As

Publication number Publication date
JPS62101053A (ja) 1987-05-11

Similar Documents

Publication Publication Date Title
US6780677B2 (en) Process for mounting electronic device and semiconductor device
JP2816028B2 (ja) 半導体装置の製造方法
US6734535B1 (en) Semiconductor device, method of manufacture thereof, circuit board, and electronic instrument
JP3914654B2 (ja) 半導体装置
JPH10163386A (ja) 半導体装置、半導体パッケージおよび実装回路装置
US20030173679A1 (en) Stacked dice standoffs
US20040089943A1 (en) Electronic control device and method for manufacturing the same
WO2010087856A1 (en) Integrated-circuit attachment structure with solder balls and pins
US6368894B1 (en) Multi-chip semiconductor module and manufacturing process thereof
US6097085A (en) Electronic device and semiconductor package
US6201298B1 (en) Semiconductor device using wiring tape
US5530289A (en) Semiconductor device and method of manufacturing the same
JP3061059B2 (ja) Ｉｃパッケージ
US20070252263A1 (en) Memory package structure
JPH0410743B2 (cs)
JP2004289017A (ja) 樹脂封止型半導体装置
JPH08274214A (ja) 半導体装置
JPH10116936A (ja) 半導体パッケージ
JP2756791B2 (ja) 樹脂封止型半導体装置
JPH1126634A (ja) 半導体装置
JP2712967B2 (ja) 半導体装置
KR200292794Y1 (ko) 가요성회로기판 및 이를 이용한 반도체패키지
JP2970595B2 (ja) Ｂｇａ型半導体装置
KR19980027872A (ko) 칩 카드
JPH06101493B2 (ja) プラスチツクチツプキヤリア

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term