JPH0382060A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0382060A JPH0382060A JP1218968A JP21896889A JPH0382060A JP H0382060 A JPH0382060 A JP H0382060A JP 1218968 A JP1218968 A JP 1218968A JP 21896889 A JP21896889 A JP 21896889A JP H0382060 A JPH0382060 A JP H0382060A
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- ceramic substrate
- semiconductor element
- substrate frame
- external terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 27
- 239000000919 ceramic Substances 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 238000007789 sealing Methods 0.000 claims abstract description 6
- 239000011347 resin Substances 0.000 abstract description 2
- 229920005989 resin Polymers 0.000 abstract description 2
- 229910000679 solder Inorganic materials 0.000 abstract description 2
- 229910001111 Fine metal Inorganic materials 0.000 abstract 1
- 230000017525 heat dissipation Effects 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 239000007767 bonding agent Substances 0.000 description 3
- 230000005855 radiation Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置に関し、特に放熱板を有するセラミ
ックパッケージの構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to the structure of a ceramic package having a heat sink.
従来、この種の半導体装置は、第３図に示すように、半
導体素子３を搭載する放熱板２が外部端子６とは反対の
側においてセラミック基板１に接合されており、放熱フ
ィン７が放熱板２に接合剤８で接着された構造となって
いた。Conventionally, in this type of semiconductor device, as shown in FIG. 3, a heat sink 2 on which a semiconductor element 3 is mounted is bonded to a ceramic substrate 1 on the side opposite to an external terminal 6, and a heat sink fin 7 serves as a heat sink. It had a structure in which it was bonded to a plate 2 with a bonding agent 8.
上述した従来の半導体装置は、放熱板２が外部端子６と
は反対側に接合されているため、金属細線４を形成する
際に外部端子６が障害となったり、キャップ５ａを封止
する際にシールバスが不充分となることがあり、特に大
きなサイズの半導体素子３を搭載することは不可能であ
る。また、外部端子６のレイアウト上の問題からも搭載
する半導体素子３のサイズは大きく制限されるという欠
点がある。In the conventional semiconductor device described above, since the heat sink 2 is bonded to the side opposite to the external terminal 6, the external terminal 6 becomes an obstacle when forming the thin metal wire 4, and when sealing the cap 5a. In some cases, the sealing bath may become insufficient, making it impossible to mount a particularly large-sized semiconductor element 3. Furthermore, there is a drawback that the size of the semiconductor element 3 to be mounted is greatly limited due to layout problems of the external terminals 6.
したがって本発明の目的は、大きな半導体素子も搭載す
ることのできる放熱板を有する半導体装置を提供するこ
とにある。Accordingly, an object of the present invention is to provide a semiconductor device having a heat sink on which a large semiconductor element can be mounted.
本発明の半導体装置は、セラミック基板と、外部から導
通を持たせるための外部端子と、半導体素子と、この半
導体素子を搭載するための外部端子と同じ側でセラミッ
ク基板に接合されている放熱板と、半導体素子の電極と
外部端子とをセラミック基板内の導電層を介して接続す
るための金属細線と、気密封止のためのキャップとを有
している。A semiconductor device of the present invention includes a ceramic substrate, an external terminal for providing conduction from the outside, a semiconductor element, and a heat sink bonded to the ceramic substrate on the same side as the external terminal for mounting the semiconductor element. , a thin metal wire for connecting the electrode of the semiconductor element and an external terminal via a conductive layer in the ceramic substrate, and a cap for airtight sealing.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図を参照すると、本発明の一実施例の半導体装置は
、セラミック基板１の中央部に放熱板２が接合され、そ
の上に半導体素子３が搭載されており、半導体素子３は
金属細線４とセラミック基板１内の図示されていない内
部配線を介し″て外部端子６と電気的に接続され、キャ
ップ５によって気密封止されている。外部端子６と放熱
板２とはセラミック基板１の同じ側に設けられている。Referring to FIG. 1, a semiconductor device according to an embodiment of the present invention includes a heat sink 2 bonded to the center of a ceramic substrate 1, and a semiconductor element 3 mounted thereon. 4 and an external terminal 6 through internal wiring (not shown) in the ceramic substrate 1, and hermetically sealed with a cap 5.The external terminal 6 and the heat sink 2 are located on the same side.
放熱板２の外側には放熱フィン７が半田あるいは樹脂等
の接合剤８によって接合されている。この半導体装置は
、放熱フィン７を避ける形で穴を開けられたプリント基
板９に実装される。A radiation fin 7 is bonded to the outside of the radiation plate 2 with a bonding agent 8 such as solder or resin. This semiconductor device is mounted on a printed circuit board 9 that has holes made in a manner that avoids the radiation fins 7.
次に第２図を参照すると、本発明の第２の実施例では、
放熱板２の厚さをスタンドオフの値と同等にし、放熱フ
ィンを接合しない点で第１の実施例と異なり、他は第１
の実施例と同じである。この実施例では、実装時に放熱
板２をプリント基板９に直接接触させ、プリント基板９
に熱を放散させる構造であるため、プリント基板９に開
口部を設ける必要がないという利点がある。Referring now to FIG. 2, in a second embodiment of the invention:
It differs from the first embodiment in that the thickness of the heat dissipation plate 2 is made equal to the standoff value and the heat dissipation fins are not bonded;
This is the same as the embodiment. In this embodiment, the heat sink 2 is brought into direct contact with the printed circuit board 9 during mounting.
Since the structure is such that heat is dissipated, there is an advantage that there is no need to provide an opening in the printed circuit board 9.
以上説明したように本発明は、放熱板２を外部端子６と
同じ基板底面側に接合して、半導体素子３や金属細線４
を表面側に設けるため熱放散性が良くかつ大きなサイズ
のチップを搭載できる効果がある。As explained above, in the present invention, the heat dissipation plate 2 is bonded to the same bottom surface side of the substrate as the external terminal 6, and the semiconductor element 3 and the thin metal wire 4 are
Since it is provided on the front side, it has good heat dissipation properties and has the effect of allowing large chips to be mounted.
第１図は本発明の第１の実施例の半導体装置をプリント
板へ実装した状態を示す縦断面図、第２図は本発明の第
２の実施例をプリント板へ実装した状態の縦断面図、第
３図は従来の半導体装置の縦断面図である。
ｌ・・・セラミック基板、２・・・放熱板、３・・・半
導体素子、４・・・金属細線、５，５ａ・・・キャップ
、６・・・外部端子、７・・・放熱フィン、８・・・接
合剤、９・・・プリント基板。FIG. 1 is a vertical cross-sectional view showing a state in which a semiconductor device according to a first embodiment of the present invention is mounted on a printed board, and FIG. 2 is a vertical cross-sectional view showing a state in which a semiconductor device according to a second embodiment of the present invention is mounted on a printed board. 3 are longitudinal sectional views of a conventional semiconductor device. l... Ceramic substrate, 2... Heat sink, 3... Semiconductor element, 4... Metal thin wire, 5, 5a... Cap, 6... External terminal, 7... Heat sink, 8... Bonding agent, 9... Printed circuit board.
Claims (1)
放熱板に搭載した半導体素子と、前記セラミック基板枠
を気密封止するキャップと、前記セラミック基板枠の前
記放熱板が接合されているのと同じ側から導出された外
部端子とを含むことを特徴とする半導体装置。A ceramic substrate frame, a heat sink bonded to the center thereof, a semiconductor element mounted on the heat sink, a cap for hermetically sealing the ceramic substrate frame, and the heat sink of the ceramic substrate frame are bonded. and an external terminal led out from the same side.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1218968A JPH0382060A (en) | 1989-08-24 | 1989-08-24 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1218968A JPH0382060A (en) | 1989-08-24 | 1989-08-24 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0382060A true JPH0382060A (en) | 1991-04-08 |
Family
ID=16728180
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1218968A Pending JPH0382060A (en) | 1989-08-24 | 1989-08-24 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0382060A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH098187A (en) * | 1995-06-13 | 1997-01-10 | Bull Sa | Method of cooling integrated circuit |
| EP0712158A3 (en) * | 1994-11-11 | 1997-03-26 | Seiko Epson Corp | Resin sealing type semiconductor device with cooling member and method of making the same |
| KR100900939B1 (en) * | 2006-12-07 | 2009-06-08 | 주식회사 전진전기 | Set-type led lamp |
| US20100089625A1 (en) * | 2007-04-24 | 2010-04-15 | Claus Peter Kluge | Component having a ceramic base with a metalized surface |
| CN102347438A (en) * | 2011-10-29 | 2012-02-08 | 华南师范大学 | Light-emitting diode illumination device using diamond powder-copper powder composite material to radiate heat |
| JP2016174094A (en) * | 2015-03-17 | 2016-09-29 | 住友電工デバイス・イノベーション株式会社 | Semiconductor assembly |
| WO2020158085A1 (en) * | 2019-01-30 | 2020-08-06 | 京セラ株式会社 | Mounting structure |
-
1989
- 1989-08-24 JP JP1218968A patent/JPH0382060A/en active Pending
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0712158A3 (en) * | 1994-11-11 | 1997-03-26 | Seiko Epson Corp | Resin sealing type semiconductor device with cooling member and method of making the same |
| KR100414254B1 (en) * | 1994-11-11 | 2004-03-30 | 세이코 엡슨 가부시키가이샤 | Resin-sealed semiconductor device and manufacturing method |
| JPH098187A (en) * | 1995-06-13 | 1997-01-10 | Bull Sa | Method of cooling integrated circuit |
| US5831825A (en) * | 1995-06-13 | 1998-11-03 | Bull, S.A. | Integrated circuit IC package and a process for cooling an integrated circuit mounted in an IC package |
| KR100900939B1 (en) * | 2006-12-07 | 2009-06-08 | 주식회사 전진전기 | Set-type led lamp |
| US20100089625A1 (en) * | 2007-04-24 | 2010-04-15 | Claus Peter Kluge | Component having a ceramic base with a metalized surface |
| US8980398B2 (en) * | 2007-04-24 | 2015-03-17 | CeramTee GmbH | Component having a ceramic base with a metalized surface |
| CN102347438A (en) * | 2011-10-29 | 2012-02-08 | 华南师范大学 | Light-emitting diode illumination device using diamond powder-copper powder composite material to radiate heat |
| JP2016174094A (en) * | 2015-03-17 | 2016-09-29 | 住友電工デバイス・イノベーション株式会社 | Semiconductor assembly |
| WO2020158085A1 (en) * | 2019-01-30 | 2020-08-06 | 京セラ株式会社 | Mounting structure |
| JPWO2020158085A1 (en) * | 2019-01-30 | 2021-10-14 | 京セラ株式会社 | Mounting structure |
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