JPH04114455A - Semiconductor device and mounting structure thereof - Google Patents
Semiconductor device and mounting structure thereofInfo
- Publication number
- JPH04114455A JPH04114455A JP23316390A JP23316390A JPH04114455A JP H04114455 A JPH04114455 A JP H04114455A JP 23316390 A JP23316390 A JP 23316390A JP 23316390 A JP23316390 A JP 23316390A JP H04114455 A JPH04114455 A JP H04114455A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- semiconductor device
- circuit board
- printed circuit
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 204
- 239000003566 sealing material Substances 0.000 claims abstract description 10
- 238000007789 sealing Methods 0.000 claims abstract description 7
- 239000002184 metal Substances 0.000 claims description 18
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 238000005476 soldering Methods 0.000 claims description 13
- 239000008393 encapsulating agent Substances 0.000 claims 2
- 239000003822 epoxy resin Substances 0.000 abstract description 6
- 229920000647 polyepoxide Polymers 0.000 abstract description 6
- 238000000034 method Methods 0.000 abstract description 4
- 239000004033 plastic Substances 0.000 abstract description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract description 3
- 239000010931 gold Substances 0.000 abstract description 2
- 229910052737 gold Inorganic materials 0.000 abstract description 2
- 230000000694 effects Effects 0.000 description 22
- 230000017525 heat dissipation Effects 0.000 description 19
- 229910000679 solder Inorganic materials 0.000 description 18
- 239000012298 atmosphere Substances 0.000 description 6
- 230000005855 radiation Effects 0.000 description 6
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 230000000191 radiation effect Effects 0.000 description 4
- 239000000565 sealant Substances 0.000 description 4
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000000149 penetrating effect Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は半導体装置及びその実装構造、更に詳しくはワ
イヤボンディング方式或いはＴＡＢ方式の半導体装置と
そのプリント基板への実装に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device and its mounting structure, and more particularly to a wire bonding type or TAB type semiconductor device and its mounting on a printed circuit board.
［従来の技術］
第８図は従来のワイヤボンディング方式の半導体装置の
実装構造を示す断面図である。図において、半導体素子
１をリードフレーム２のダイパッド３に接着剤である銀
入すエポキシペーストで取り付けて搭載し、半導体素子
１の各ボンディングパッドとこれに対応したリードフレ
ーム２のインナリード４とを金線のワイヤ５で接続し、
ついで半導体素子１とその周辺のインナリード４とをエ
ポキシ樹脂の如きプラスチック或いはセラミックの封止
材によりパッケージ６して封止する。そして、パッケー
ジ６の外側において各インナリード４をリードフレーム
２から切り離し、パッケージ６から突出したインナリー
ド４を折曲げてアウタリードとなるリード端子７とし、
半導体装置１ｏが製造される。[Prior Art] FIG. 8 is a sectional view showing a mounting structure of a conventional wire bonding type semiconductor device. In the figure, a semiconductor element 1 is attached and mounted on a die pad 3 of a lead frame 2 using a silver-filled epoxy paste adhesive, and each bonding pad of the semiconductor element 1 is connected to a corresponding inner lead 4 of the lead frame 2. Connect with gold wire 5,
Next, the semiconductor element 1 and the inner leads 4 around it are sealed in a package 6 using a plastic or ceramic sealing material such as epoxy resin. Then, each inner lead 4 is separated from the lead frame 2 on the outside of the package 6, and the inner lead 4 protruding from the package 6 is bent to form a lead terminal 7 serving as an outer lead.
A semiconductor device 1o is manufactured.
上記のようにして製造された半導体装置１ｏはプリント
基板１１に搭載され、そのリード端子７をプリント基板
１１の表面に形成したリード端子接続用導電パターン１
２にそれぞれ半田１３により半田付けして半導体装置１
０をプリント基板１１に実装している。The semiconductor device 1o manufactured as described above is mounted on a printed circuit board 11, and the lead terminals 7 are formed on the surface of the printed circuit board 11 with a conductive pattern 1 for connecting lead terminals.
Semiconductor device 1 is soldered to 2 with solder 13, respectively.
0 is mounted on the printed circuit board 11.
Ｃ発明が解決しようとする課題］
プリント基板１１に実装されている半導体装置１゜は半
導体素子１及びダイパッド３がパッケージ６で封止され
ており、半導体装置１ｏの半導体素子１で発熱した熱の
外部への放熱はワイヤ５及びリード端子７を通して外部
のプリント基板１１に放熱する経路については熱抵抗が
小さいが、パッケージ６を通して外部に放熱する経路は
発熱する半導体素子１がパッケージ６で封止され、その
パッケージ６の周囲が熱伝導の悪い大気に囲まれている
ために熱抵抗が大きく、半導体素子１で発熱した熱の放
熱効果が全体として良好でないという課題があった。Problems to be Solved by the Invention C] In the semiconductor device 1゜ mounted on the printed circuit board 11, the semiconductor element 1 and the die pad 3 are sealed with a package 6, and the heat generated by the semiconductor element 1 of the semiconductor device 1o is dissipated. As for heat radiation to the outside, the thermal resistance is low for the heat radiation path to the external printed circuit board 11 through the wire 5 and the lead terminal 7, but the heat radiation path to the outside through the package 6 is such that the heat generating semiconductor element 1 is sealed with the package 6. Since the package 6 is surrounded by the atmosphere with poor thermal conductivity, the thermal resistance is large, and the heat dissipation effect of the heat generated by the semiconductor element 1 is not good as a whole.
本発明は上記の課題を解決するべくなされたもので、プ
リント基板に半導体装置を実装しても半導体装置の外部
への放熱効果が良好な半導体装置及びその実装構造を得
ることを目的としたものである。The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to obtain a semiconductor device and its mounting structure in which the heat dissipation effect to the outside of the semiconductor device is good even when the semiconductor device is mounted on a printed circuit board. It is.
［課題を解決するための手段］
本発明に係る半導体装置及びその実装構造は、半導体素
子をリードフレームのダイパッド上に搭載し、半導体素
子のボンディングパッドとリードフレームのインナリー
ドとをワイヤで接続し、リードフレームのダイパッド裏
面が外部に露出するように半導体素子とリードフレーム
を封止材で封止してなる半導体装置を形成するようにし
、その半導体装置と、リード端子接続用導電パターンが
形成されたプリント基板とを有し、半導体装置のリード
端子をプリント基板のリード端子接続用導電パターンに
半田付けで接続し、半導体装置のダイパッド裏面をプリ
ント基板に機械的接合手段で接合するようにしたもので
ある。[Means for Solving the Problems] A semiconductor device and its mounting structure according to the present invention include mounting a semiconductor element on a die pad of a lead frame, and connecting a bonding pad of the semiconductor element and an inner lead of the lead frame with a wire. , a semiconductor device is formed by sealing the semiconductor element and the lead frame with a sealing material so that the back surface of the die pad of the lead frame is exposed to the outside, and the semiconductor device and a conductive pattern for connecting lead terminals are formed. The semiconductor device has a printed circuit board, the lead terminals of the semiconductor device are connected to the conductive pattern for connecting the lead terminals of the printed circuit board by soldering, and the back surface of the die pad of the semiconductor device is bonded to the printed circuit board by mechanical bonding means. It is.
また、プリント基板はその表面に形成されたす−ド端子
用導電パターンと、その基板本体を貫通して設けられた
ダイパッド接合用金属プレートとを有するように構成し
てもよい。Further, the printed circuit board may be configured to have a conductive pattern for a fast terminal formed on the surface thereof, and a metal plate for bonding a die pad provided through the main body of the circuit board.
更に、もう一つの半導体装置の実装構造は、フィルムキ
ャリアのデバイスホール内に半導体素子を配設し、半導
体素子のボンディングパッドにフィルムキャリアのフィ
ンガーに設けたバンプを接続し、前記フィンガーを切断
した後に半導体素子の裏面が外部に露出するように半導
体素子及びフィンガーの一部を封止材で封止し、又は半
導体素子裏面が外部に露出するように半導体素子及びフ
ィンガーの一部を封止材で封止した後に前記フィンガー
を切断してなる半導体装置を形成するようにし、その半
導体装置と、フィンガー端子接続用導電パターンが形成
されたプリント基板とを有し、半導体装置のフィンガー
端子をプリント基板のフィンガー端子接続用導電パター
ンに半田付けで接続し、半導体装置の半導体素子裏面を
プリント基板に機械的接合手段で接合するようにしたも
のである。Furthermore, another mounting structure for a semiconductor device is to arrange a semiconductor element in a device hole of a film carrier, connect a bump provided on a finger of the film carrier to a bonding pad of the semiconductor element, and then cut the finger. The semiconductor element and a part of the finger are sealed with a sealant so that the back side of the semiconductor element is exposed to the outside, or the semiconductor element and a part of the finger are sealed with a sealant so that the back side of the semiconductor element is exposed to the outside. After sealing, the fingers are cut to form a semiconductor device, which includes the semiconductor device and a printed circuit board on which a conductive pattern for connecting finger terminals is formed, and the finger terminals of the semiconductor device are connected to the printed circuit board. It is connected to the conductive pattern for finger terminal connection by soldering, and the back surface of the semiconductor element of the semiconductor device is bonded to the printed circuit board by mechanical bonding means.
また、プリント基板はその表面に形成されたフィンガー
端子接続用導電パターンと、その基板本体を貫通して設
けられた半導体素子接合用金属プレートとを有するよう
に構成してもよい。Further, the printed circuit board may be configured to have a conductive pattern for connecting finger terminals formed on the surface thereof, and a metal plate for bonding a semiconductor element provided through the main body of the circuit board.
［作 用］
本発明においては、リードフレームのダイパッド上に搭
載した半導体素子のボンディングバットとリードフレー
ムのインナリードとをワイヤで接続し、リードフレーム
のダイパッド裏面か外部に露出するように半導体素子と
リードフレームを封止材で封止してなる半導体装置を形
成したから、その半導体装置のリード端子をプリント基
板のリード端子接続用導電パターンに半田付けて接続し
て半導体装置をプリント基板に実装した場合に、半導体
装置の半導体素子で発熱した熱は、ワイヤ及びリード端
子を通してプリント基板に放熱する経路をとると共に、
裏面が外部に露出しているダイパッドから直接外部に放
熱する経路をとるため、従来のダイパッドも封止されて
いるものと比べ放熱効果が向上した。また、その半導体
装置のり一ド端子をプリント基板のリード端子接続用導
電パターンに半田付けで接続し、半導体装置のダイパッ
ド裏面をプリント基板の表面に機械的接合手段で接合し
て半導体装置をプリント基板に実装するようにしたから
、半導体装置の半導体素子で発熱した熱は、ワイヤ及び
リード端子を通してプリント基板に放熱する経路をとる
と共にダイパッドから機械的接合手段を介してプリント
基板に放熱する経路をとり、いずれの経路も半導体素子
の熱が熱抵抗の大きい大気を介さず、直接伝導で外部の
プリント基板に伝わるため、熱抵抗が著しく低下する。[Function] In the present invention, the bonding butt of the semiconductor element mounted on the die pad of the lead frame and the inner lead of the lead frame are connected with a wire, and the semiconductor element and the inner lead of the lead frame are connected so that the back surface of the die pad of the lead frame is exposed to the outside. After forming a semiconductor device by sealing the lead frame with a sealing material, the semiconductor device was mounted on the printed circuit board by soldering and connecting the lead terminals of the semiconductor device to the conductive patterns for connecting lead terminals on the printed circuit board. In this case, the heat generated by the semiconductor element of the semiconductor device takes a route to be radiated to the printed circuit board through wires and lead terminals, and
Because the heat is dissipated directly to the outside from the die pad whose back side is exposed to the outside, the heat dissipation effect is improved compared to conventional die pads that are also sealed. In addition, the semiconductor device is attached to the printed circuit board by connecting the semiconductor device's glued terminals to the conductive pattern for connecting lead terminals on the printed circuit board by soldering, and by mechanically bonding the back side of the die pad of the semiconductor device to the front surface of the printed circuit board. Since the heat generated by the semiconductor element of the semiconductor device is mounted on the PC board, the heat generated by the semiconductor element of the semiconductor device takes a route to be radiated to the printed circuit board through wires and lead terminals, and a route is taken to radiate the heat from the die pad to the printed circuit board via mechanical bonding means. In either route, the heat of the semiconductor element is directly conducted to the external printed circuit board without passing through the atmosphere, which has a high thermal resistance, so the thermal resistance is significantly reduced.
また、ダイパッド裏面をプリント基板の基板本体を貫通
して設けられたダイパッド接合用金属プレートに機械的
接合手段で接合することにより、ダイパッド接合用金属
プレートが大きな放熱効果を有するため、ダイパッドか
ら機械的接合手段を介してプリント基板に放熱する経路
の放熱効果がより一層向上する。In addition, by mechanically bonding the back surface of the die pad to the die pad bonding metal plate provided through the main body of the printed circuit board, the die pad bonding metal plate has a large heat dissipation effect. The heat radiation effect of the heat radiation path to the printed circuit board via the bonding means is further improved.
更に、半導体素子のボンディングパッドとフィルムキャ
リアのフィンガーに設けたバンプとを接続し、半導体素
子裏面が外部に露出するように半導体素子とフィルムキ
ャリアのフィンガーを封止材で封止してなる半導体装置
を形成したから、その半導体装置のリード端子をプリン
ト基板のリード接続用導電パターンに半田付けで接続し
て半導体装置をプリント基板に接続した場合に、半導体
装置の半導体素子で発熱した熱はフィンガー及びフィン
ガー端子を通してプリント基板に放熱する経路をとると
共に裏面が外部に露出している半導体素子から直接外部
に放熱する経路をとるため、従来の半導体素子が封止材
で封止されているものと比べ放熱効果が向上した。また
、その半導体装置のフィンガー端子をプリント基板のフ
ィンガー端子接続用導電パターンに半田付けで接続し、
半導体装置の半導体素子裏面をプリント基板の表面に機
械的接合手段で接合して半導体装置をプリント基板に実
装するようにしたから、半導体装置の半導体素子で発熱
した熱はフィンガー及びフィンガー端子を通してプリン
ト基板に放熱する経路をとると共に機械的接合手段を介
してプリント基板に放熱する経路をとり、いずれの経路
も半導体素子の熱が熱抵抗の大きい大気を介させず、直
接伝導で外部のプリント基板に伝わるため、熱抵抗が著
しく低下する。また、半導体素子裏面をプリント基板の
基板本体を貫通して設けられたフィンガー端子接合用金
属プレートに機械的接合手段で接合することにより、フ
ィンガー端子接合用金属プレートが大きな放熱効果を有
するため、機械的接合手段を介してプリント基板に放熱
する経路の放熱効果がより一層向上する。Furthermore, a semiconductor device is provided in which the bonding pad of the semiconductor element and the bump provided on the finger of the film carrier are connected, and the semiconductor element and the finger of the film carrier are sealed with a sealing material so that the back surface of the semiconductor element is exposed to the outside. Therefore, when the semiconductor device is connected to the printed circuit board by soldering the lead terminals of the semiconductor device to the lead connection conductive patterns of the printed circuit board, the heat generated by the semiconductor element of the semiconductor device is transferred to the fingers and The heat is radiated to the printed circuit board through the finger terminals, and the heat is radiated directly to the outside from the semiconductor element whose back side is exposed to the outside, compared to conventional semiconductor elements that are sealed with a sealant. Improved heat dissipation effect. In addition, the finger terminals of the semiconductor device are connected to the conductive pattern for finger terminal connection on the printed circuit board by soldering.
Since the semiconductor device is mounted on the printed circuit board by mechanically bonding the back side of the semiconductor element of the semiconductor device to the front surface of the printed circuit board, the heat generated by the semiconductor element of the semiconductor device is transferred to the printed circuit board through the fingers and finger terminals. A route is taken to radiate heat to the external printed circuit board via mechanical bonding means, and a route is taken to radiate heat to the printed circuit board via mechanical bonding means. As a result, thermal resistance is significantly reduced. In addition, by mechanically bonding the back surface of the semiconductor element to the metal plate for finger terminal bonding provided through the main body of the printed circuit board, the metal plate for bonding finger terminals has a large heat dissipation effect. The heat radiation effect of the heat radiation path to the printed circuit board via the target bonding means is further improved.
［実施例コ 第１図は本発明の一実施例を示す断面図である。[Example code] FIG. 1 is a sectional view showing an embodiment of the present invention.
図において、従来例と同一の構成は同一符号を付して重
複した構成の説明を省略する。本実施例では、リードフ
レーム２のダイパッド３に搭載された半導体素子１の各
ボンディングパッドとこれに対応したリードフレーム２
のインナリード４とを金線のワイヤ５で接続し、半導体
素子１とその周辺のインナリード４とをエポキシ樹脂の
如きプラスチックの封止材により、ダイパッド３の裏面
が外部に露出するようにパッケージ１６シて封止する。In the figure, components that are the same as those of the conventional example are given the same reference numerals, and explanations of duplicated components will be omitted. In this embodiment, each bonding pad of the semiconductor element 1 mounted on the die pad 3 of the lead frame 2 and the corresponding lead frame 2 are
The semiconductor element 1 and the inner leads 4 around it are packaged using a plastic sealant such as epoxy resin so that the back surface of the die pad 3 is exposed to the outside. 16 times and seal.
そして、パッケージ１６の外側において各インナリード
４をリードフレーム２から切り離し、）く・ソケージ１
６から突出したインナリード４を折曲げてアウタリード
となるリード端子７とし、ワイヤボンディング方式の半
導体装置２０が製造される。Then, each inner lead 4 is separated from the lead frame 2 on the outside of the package 16, and
The inner lead 4 protruding from the inner lead 6 is bent to form a lead terminal 7 serving as an outer lead, and a wire bonding type semiconductor device 20 is manufactured.
この半導体装置２０をプリント基板１１に搭載し、半導
体装置２０のリード端子７をプリント基板１１の表面に
形成されているリード端子接続用導電ノ＜ターン１２に
それぞれ半田１３により半田付けして半導体装置２０を
プリント基板１１に実装している。This semiconductor device 20 is mounted on a printed circuit board 11, and the lead terminals 7 of the semiconductor device 20 are soldered to conductive turns 12 for connecting lead terminals formed on the surface of the printed circuit board 11 with solder 13, thereby forming a semiconductor device. 20 is mounted on the printed circuit board 11.
上記のように構成された半導体装置をプリント基板１１
に実装した場合、半導体装置２０の半導体素子１で発熱
した熱はワイヤ５及びリード端子７を通してプリント基
板１１に放熱する経路をとると共に、裏面が外部に露出
しているダイバ・ソド３から直接外部に放熱する経路を
とるため、従来のダイパッド３がパッケージ１６により
封止されているものに比べ放熱効果が向上した。The semiconductor device configured as described above is mounted on a printed circuit board 11.
When the semiconductor element 1 of the semiconductor device 20 is mounted, the heat generated by the semiconductor element 1 of the semiconductor device 20 takes a route to be radiated to the printed circuit board 11 through the wire 5 and the lead terminal 7, and is also directly released from the diver board 3 whose back side is exposed to the outside. Since a heat radiation path is taken, the heat radiation effect is improved compared to the conventional die pad 3 sealed by the package 16.
第２図は本発明のもう一つの実施例を示す平面図である
。この実施例は、第１図に示す実施例の半導体装置２０
の裏面を機械的接合手段であるエポキシ樹脂等の接着剤
１４でプリント基板１１の表面に直接接合させるように
したものである。FIG. 2 is a plan view showing another embodiment of the invention. This embodiment is based on the semiconductor device 20 of the embodiment shown in FIG.
The back surface of the printed circuit board 11 is directly bonded to the surface of the printed circuit board 11 using an adhesive 14 such as epoxy resin, which is a mechanical bonding means.
この実施例では、半導体装置２０の半導体素子１で発熱
した熱はワイヤ５及びリード端子７を通してプリント基
板１１に放熱する経路をとると共に、ダイパッド３及び
接着剤１４を介してプリント基板に放熱する経路をとり
、いずれの経路も半導体素子１の熱が熱抵抗の大きい大
気を介さず、直接伝導でプリント基板１１に伝わるため
、熱抵抗が著しく低下して半導体素子１の放熱効果が向
上した。In this embodiment, the heat generated by the semiconductor element 1 of the semiconductor device 20 takes a route to be radiated to the printed circuit board 11 through the wire 5 and the lead terminal 7, and is also radiated to the printed circuit board via the die pad 3 and the adhesive 14. In either route, the heat of the semiconductor element 1 is transmitted to the printed circuit board 11 by direct conduction without passing through the atmosphere, which has a high thermal resistance, so that the thermal resistance is significantly reduced and the heat dissipation effect of the semiconductor element 1 is improved.
第３図は本発明の更にもう一つの実施例を示す平面図、
第４図は第３図のＡ−Ａ線断面図、第５図は第３図のＢ
−Ｂ線断面図である。FIG. 3 is a plan view showing yet another embodiment of the present invention;
Figure 4 is a sectional view taken along the line A-A in Figure 3, and Figure 5 is a cross-sectional view taken along line B in Figure 3.
-B sectional view.
この実施例はプリント基板１１の表面にリード接続用導
電パターンの他にダイパッド接続用導電パターン１５を
形成しておき、半導体装置２０のリード端子７をプリン
ト基板１１のリード端子接続用導電パターン１２にそれ
ぞれ半田１３により半田付けすると共に半導体装置２０
の外部に露出し、予め／％ンダメッキが施されている裏
面をプリント基板１１のダイパッド接続用導電パターン
１５に機械的接続手段である半田１７により半田付けし
て半導体装置２０をプリント基板１１に実装している。In this embodiment, in addition to the conductive pattern for lead connection, a conductive pattern 15 for die pad connection is formed on the surface of the printed circuit board 11, and the lead terminal 7 of the semiconductor device 20 is connected to the conductive pattern 12 for lead terminal connection of the printed circuit board 11. The semiconductor device 20 is soldered with solder 13, respectively.
The semiconductor device 20 is mounted on the printed circuit board 11 by soldering the externally exposed back surface, which has been subjected to solder plating in advance, to the conductive pattern 15 for connecting the die pad of the printed circuit board 11 using solder 17, which is a mechanical connection means. are doing.
この実施例では半導体装置２０のリード端子７がプリン
ト基板１１のリード端子接続用導電パターン１２と半田
１３を介して接続固定されるだけでなく、半導体装置２
０の半導体素子１が取り付けられているダイパッド３の
外部に露出している裏面がプリント基板１１のダイパッ
ド接続用導電パターン１４と半田１５を介して接続固定
されて、半導体装置２０がプリント基板１１に実装され
ているから、半導体装置２０の半導体素子１で発熱した
熱はワイヤ５及びリード端子７を通してプリント基板１
１に放熱する経路をとると共に、ダイパッド３及び半田
１３を介してプリント基板１１に放熱する経路をとり、
いずれの経路も半導体素子１の熱が熱抵抗の大きい大気
を介さず、直接伝導でプリント基板１１に伝わるため、
熱抵抗が著しく低下して半導体素子１の放熱効果が向上
した。In this embodiment, the lead terminals 7 of the semiconductor device 20 are not only connected and fixed to the conductive pattern 12 for lead terminal connection of the printed circuit board 11 via the solder 13, but also
The externally exposed rear surface of the die pad 3 to which the semiconductor element 1 of 0 is attached is connected and fixed to the die pad connecting conductive pattern 14 of the printed circuit board 11 via the solder 15, and the semiconductor device 20 is attached to the printed circuit board 11. Since the semiconductor device 20 is mounted, the heat generated by the semiconductor element 1 of the semiconductor device 20 is transferred to the printed circuit board 1 through the wire 5 and the lead terminal 7.
1, and also take a route to radiate heat to the printed circuit board 11 via the die pad 3 and solder 13,
In either route, the heat of the semiconductor element 1 is transmitted to the printed circuit board 11 by direct conduction without passing through the atmosphere, which has a high thermal resistance.
Thermal resistance was significantly reduced, and the heat dissipation effect of the semiconductor element 1 was improved.
第６図は第３図乃至第５図の実施例の変形例を示す断面
図で、この変形例ではプリント基板１１における半導体
装置２０のダイパッド３が接合される位置に銅のダイパ
ッド接合用金属プレート１７を基板本体を貫通させて設
けている。そして、ダイパッド３の裏面をダイパッド接
合用金属プレート１８に半田１７により半田付けして接
続固定しており、ダイパッド接合用金属プレート１８自
体が大きな放熱効果を有するため、ダイパッド３の裏面
をプリント基板１１のダイパッド接続用導電パターン１
５に接続した場合に比べて半導体素子１の放熱効果がよ
り一層向上したものとなっている。FIG. 6 is a sectional view showing a modification of the embodiment shown in FIGS. 3 to 5. In this modification, a copper die pad bonding metal plate is placed at a position on the printed circuit board 11 where the die pad 3 of the semiconductor device 20 is bonded. 17 is provided to penetrate the substrate body. The back side of the die pad 3 is connected and fixed to the die pad bonding metal plate 18 by solder 17, and since the die pad bonding metal plate 18 itself has a large heat dissipation effect, the back side of the die pad 3 is connected to the printed circuit board 18. Conductive pattern 1 for connecting die pad
The heat dissipation effect of the semiconductor element 1 is further improved compared to the case where the semiconductor element 1 is connected to the semiconductor element 5.
第７図は本発明の更にまたもう一つの実施例を示す断面
図である。FIG. 7 is a sectional view showing yet another embodiment of the present invention.
この実施例はフィルムキャリア３０のデバイスホール内
に半導体素子１を配設し、半導体素子１のボンディング
パッドにフィルムキャリア３０のフィンガー３１に設け
たバンプ３２を接続し、フィンガー８１を切断し、半導
体素子１及びフィンガー３１の一部をエポキシ樹脂の如
くプラスチックにより、半導体素子１の裏面が外部に露
出するようにパッケージ３６シて封止する。そして、パ
ッケージ３６がら突出したフィンガー３１を折曲げてフ
ィンガー端子３７とし、ＴＡＢ方式の半導体装置４ｏが
製造される。In this embodiment, a semiconductor element 1 is arranged in a device hole of a film carrier 30, a bump 32 provided on a finger 31 of the film carrier 30 is connected to a bonding pad of the semiconductor element 1, a finger 81 is cut, and the semiconductor element 1 and a part of the fingers 31 are sealed in a package 36 using plastic such as epoxy resin so that the back surface of the semiconductor element 1 is exposed to the outside. Then, the fingers 31 protruding from the package 36 are bent to form finger terminals 37, and a TAB type semiconductor device 4o is manufactured.
この半導体装置４０をプリント基板４１に搭載し、半導
体装置４０のフィンガー端子３７をプリント基板４１の
表面に形成されているフィンガー端子接続用導電パター
ン４２にそれぞれ半田４３により半田付けすると共に半
導体装置４ｏの半導体素子１の外部に露出し、予め金が
蒸着されている裏面をプリント基板４１の表面に形成さ
れている半導体素子接続用導電パターン４４に機械的接
合手段である半田４５により半田付けして半導体装置４
ｏをプリント基板４１に実装している。This semiconductor device 40 is mounted on a printed circuit board 41, and the finger terminals 37 of the semiconductor device 40 are soldered to the conductive patterns 42 for connecting finger terminals formed on the surface of the printed circuit board 41 with solder 43, and the semiconductor device 4o is The back surface of the semiconductor element 1, which is exposed to the outside and on which gold has been vapor-deposited in advance, is soldered to the conductive pattern 44 for connecting the semiconductor element formed on the front surface of the printed circuit board 41 using solder 45, which is a mechanical bonding means. Device 4
o is mounted on a printed circuit board 41.
この実施例では、半導体装置４ｏの半導体素子１の外部
に露出している裏面がプリント基板４１の半導体素子接
続用導電パターン４４と半田４５を介して接続固定され
て半導体装置４ｏがプリント基板４１に実装されている
から、半導体装置４ｏの半導体素子１で発熱した熱はフ
ィンガー３１及びフィンガー端子３７を通してプリント
基板４１に放熱する経路をとると共に半田４５を介して
プリント基板４１に放熱する経路をとり、いずれの経路
も半導体素子１の熱が熱抵抗の大きい大気を介さず、直
接伝導でプリント基板４１に伝わるため、熱抵抗が著し
く低下して半導体素子１の放熱効果が向上したものとし
ている。なお、半導体装置を４０のフィンガー端子３７
をプリント基板４１のフィンガー端子接続用導電パター
ン４２に半田付けして半導体装置４ｏをプリント基板４
１に実装した場合にも第１図の実施例と同様に放熱効果
が向上することはいうまでもない。In this embodiment, the back surface of the semiconductor element 1 of the semiconductor device 4o exposed to the outside is connected and fixed to the semiconductor element connecting conductive pattern 44 of the printed circuit board 41 via the solder 45, and the semiconductor device 4o is attached to the printed circuit board 41. Since the semiconductor device 4o is mounted, the heat generated by the semiconductor element 1 of the semiconductor device 4o takes a route to be radiated to the printed circuit board 41 through the finger 31 and the finger terminal 37, and also to the printed circuit board 41 through the solder 45. In either route, the heat of the semiconductor element 1 is transmitted to the printed circuit board 41 by direct conduction without passing through the atmosphere, which has a high thermal resistance, so that the thermal resistance is significantly reduced and the heat dissipation effect of the semiconductor element 1 is improved. Note that the semiconductor device is connected to 40 finger terminals 37.
The semiconductor device 4o is connected to the printed circuit board 4 by soldering it to the conductive pattern 42 for finger terminal connection of the printed circuit board 41.
It goes without saying that even when mounted in the embodiment shown in FIG.
上記実施例では、フィンガー３１を切断したあとで、パ
ッケージ３６で封止をする場合について説明したが、半
導体素子１及びフィンガー３１の一部をパッケージ３６
で封止した後にフィンガー３１を切断して半導体装置４
０を製造する場合にも適用することはいうまでもない。In the above embodiment, the case where the finger 31 is cut and then sealed with the package 36 has been described.
After sealing, the fingers 31 are cut and the semiconductor device 4 is sealed.
Needless to say, this method can also be applied to the case of manufacturing 0.
なお、この実施例では半導体素子１の外部に露出してい
る裏面が半田４５を介してプリント基板４１の半導体素
子接続用導電パターン４４と接続固定され、機械的に接
合されているが、半導体素子１の裏面をエポキシ樹脂等
の接着剤でプリント基板４１の表面に直接接合させるよ
うにしてもよく、半田４５による接合と略同様の半導体
素子１の放熱効果を有する。In this embodiment, the back surface of the semiconductor element 1 exposed to the outside is connected and fixed to the conductive pattern 44 for connecting the semiconductor element of the printed circuit board 41 via the solder 45, and is mechanically bonded. The back surface of the semiconductor element 1 may be directly bonded to the surface of the printed circuit board 41 with an adhesive such as an epoxy resin, and the heat dissipation effect of the semiconductor element 1 is substantially the same as that of bonding with the solder 45.
また、プリント基板４１における半導体装置４ｏの半導
体素子１が接合される位置に第４図に示すダイパッド接
合用金属プレート１７と同様な半導体素子接合用金属プ
レートを基板本体を貫通させて設け、半導体素子１の裏
面をその半導体素子接合用金属プレートに半田により半
田付けして接続固定するようにすれば、半導体素子１の
放熱効果がより一層向上することはいうまでもない。Further, a metal plate for semiconductor element bonding similar to the die pad bonding metal plate 17 shown in FIG. 4 is provided at a position on the printed circuit board 41 where the semiconductor element 1 of the semiconductor device 4o is bonded, penetrating the substrate body, and the semiconductor element It goes without saying that the heat dissipation effect of the semiconductor element 1 can be further improved if the back surface of the semiconductor element 1 is connected and fixed by soldering to the metal plate for joining the semiconductor element.
［発明の効果］
本発明は以上説明したとおり、ワイヤボンディング方式
でダイパッド裏面が外部に露出するように半導体素子と
リードフレームを封止材で封止してなる半導体装置を形
成したので、その半導体装置のリード端子をプリント基
板のリード端子接続用導電パターンに半田付けで接続し
て半導体装置を実装した場合に半導体装置の半導体素子
で発熱した熱はワイヤ及びリード端子を通してプリント
基板に放熱する経路をとると共に裏面が外部に露出して
いるダイパッドから直接外部に放熱する経路を取るため
、従来のダイパッドも封止材で封止しているものに比べ
、放熱効果が向上するという効果を有する。[Effects of the Invention] As explained above, the present invention forms a semiconductor device in which a semiconductor element and a lead frame are sealed with a sealing material using a wire bonding method so that the back surface of a die pad is exposed to the outside. When a semiconductor device is mounted by connecting the lead terminal of the device to the conductive pattern for connecting the lead terminal of the printed circuit board by soldering, the heat generated by the semiconductor element of the semiconductor device has a path to be radiated to the printed circuit board through the wire and the lead terminal. In addition, since a path is taken to radiate heat directly to the outside from the die pad whose back surface is exposed to the outside, the heat radiation effect is improved compared to conventional die pads that are also sealed with a sealing material.
また、半導体装置のリード端子をプリント基板のリード
端子接続用導電パターンに半田付けで接続し、半導体装
置のダイパッド裏面をプリント基板の表面に機械的接合
手段で接合して半導体装置をプリント基板に実装するよ
うにしたので、半導体装置の半導体素子で発熱した熱は
ワイヤ及びリード端子を通してプリント基板に放熱する
経路をとると共にダイパッドから機械的結合手段を介し
てプリント基板に放熱する経路をとり、いずれの経路も
半導体素子の熱が熱抵抗の大きい大気を介さず直接伝導
で外部のプリント基板に伝わるため、熱抵抗が著しく低
下して半導体素子の放熱効果が向上するという効果を有
する。In addition, the lead terminals of the semiconductor device are connected to the conductive pattern for connecting the lead terminals of the printed circuit board by soldering, and the back side of the die pad of the semiconductor device is bonded to the front surface of the printed circuit board using mechanical bonding means to mount the semiconductor device on the printed circuit board. Therefore, the heat generated by the semiconductor element of the semiconductor device takes a route to radiate the heat to the printed circuit board through the wires and lead terminals, and also takes a route to radiate the heat from the die pad to the printed circuit board via the mechanical coupling means. Since the heat of the semiconductor element is directly conducted to the external printed circuit board through the route without passing through the atmosphere, which has a high thermal resistance, the thermal resistance is significantly reduced and the heat dissipation effect of the semiconductor element is improved.
また、半導体装置のダイパッド裏面をプリント基板の基
板本体を貫通して設けられたダイパッド接合用金属プレ
ートに機械的接合手段で接合することにより、ダイパッ
ド接合用金属プレートかそれ自体大きな放熱効果を有す
るため、半導体素子の放熱効果がより一層向上するとい
う効果を有する。In addition, by mechanically bonding the back surface of the die pad of the semiconductor device to the die pad bonding metal plate provided through the board body of the printed circuit board, the die pad bonding metal plate itself has a large heat dissipation effect. This has the effect of further improving the heat dissipation effect of the semiconductor element.
更に、ＴＡＢ方式で半導体素子の裏面か外部に露出する
ように半導体素子とフィルムキャリアのフィンガーを封
止材で封止してなる半導体装置のフィンガー端子を、プ
リント基板のフィンガー端子接続用導電パターンに半田
付けで接続して半導体装置をプリント基板に実装するか
、更に半導体装置の半導体素子の裏面をもプリント基板
の表面に機械的結合手段で接合して半導体装置をプリン
ト基板に実装するようにしたので、半導体素子で発熱し
た熱はフィンガー及びフィンガー端子を通してプリント
基板に放熱する経路をとると共に半導体素子から直接外
部に或いは、機械的接合手段を介してプリント基板に放
熱する経路をとるため、従来に比べて半導体素子の放熱
効果が向上するという効果を有する。Furthermore, the finger terminals of the semiconductor device, which is formed by sealing the semiconductor element and the fingers of the film carrier with a sealing material so that the back side of the semiconductor element or the fingers of the film carrier are exposed to the outside using the TAB method, are used as conductive patterns for connecting the finger terminals of the printed circuit board. The semiconductor device is mounted on a printed circuit board by connecting it by soldering, or by joining the back side of the semiconductor element of the semiconductor device to the front surface of the printed circuit board by mechanical bonding means. Therefore, the heat generated by the semiconductor element takes a route to be radiated to the printed circuit board through the fingers and finger terminals, and also takes a route to radiate the heat from the semiconductor element directly to the outside or to the printed circuit board via mechanical bonding means. Compared to this, it has the effect of improving the heat dissipation effect of the semiconductor element.
また、半導体装置の半導体素子の裏面をプリント基板の
基板本体を貫通して設けられた半導体素子接合用金属プ
レートに機械的接合手段で接合することにより、半導体
素子接合用金属プレートがそれ自体大きな放熱効果を有
するため、半導体素子の放熱効果がより一層向上すると
いう効果を有する。In addition, by mechanically bonding the back side of the semiconductor element of the semiconductor device to the metal plate for semiconductor element bonding provided by penetrating the main body of the printed circuit board, the metal plate for bonding the semiconductor element itself has a large heat dissipation capacity. This has the effect of further improving the heat dissipation effect of the semiconductor element.
第１図は本発明の一実施例を示す断面図、第２図は本発
明のもう一つの実施例を示す断面図、第３図は本発明の
更にもう一つの実施例を示す平面図、第４図は第３図の
Ａ−Ａ線断面図、第５図は第３図のＢ−Ｂ線断面図、第
６図は第３図乃至第５図の実施例の変形例を示す断面図
、第７図は本発明の更にまたもう一つの実施例を示す断
面図、第８図は従来の半導体装置の実装構造を示す断面
図である。
１・・・半導体素子、２・・・リードフレーム、３・・
・ダイパッド、４・・・インナーリード、５・・・ワイ
ヤ、７・・・リード端子、１１・・・プリント基板、１
２・・・リード接続用導電パターン、１３・・・半田、
１５・・・半田（機械的接合手段）、１６・・・パッケ
ージ、２０・・・半導体装置。
代理人 弁理士 佐々木 宗 治
半導体素子
５ ワイヤ
７ リード端子
１１ プリント蔓坂
１３ 半田
１４１１ｍ４１（機械的接合手段）
第５図
第６図
第３図
第８図FIG. 1 is a sectional view showing one embodiment of the present invention, FIG. 2 is a sectional view showing another embodiment of the invention, and FIG. 3 is a plan view showing yet another embodiment of the invention. 4 is a cross-sectional view taken along the line A-A in FIG. 3, FIG. 5 is a cross-sectional view taken along the line B-B in FIG. 3, and FIG. 6 is a cross-sectional view showing a modification of the embodiment shown in FIGS. 3 to 5. FIG. 7 is a sectional view showing still another embodiment of the present invention, and FIG. 8 is a sectional view showing a conventional mounting structure of a semiconductor device. 1... Semiconductor element, 2... Lead frame, 3...
・Die pad, 4... Inner lead, 5... Wire, 7... Lead terminal, 11... Printed circuit board, 1
2... Conductive pattern for lead connection, 13... Solder,
15...Solder (mechanical bonding means), 16...Package, 20...Semiconductor device. Agent Patent Attorney Muneji Sasaki Semiconductor device 5 Wire 7 Lead terminal 11 Printed vine slope 13 Solder 1411m41 (mechanical bonding means) Figure 5 Figure 6 Figure 3 Figure 8
Claims (6)
載し、半導体素子のボンディングパッドとリードフレー
ムのインナリードとをワイヤで接続し、リードフレーム
のダイパッド裏面が外部に露出するように半導体素子と
リードフレームを封止材で封止してなることを特徴とす
る半導体装置。(1) Mount the semiconductor element on the die pad of the lead frame, connect the bonding pad of the semiconductor element and the inner lead of the lead frame with wire, and place the semiconductor element and the lead frame so that the back side of the die pad of the lead frame is exposed to the outside. A semiconductor device characterized by being formed by sealing with a sealing material.
載し、半導体素子のボンディングパッドとリードフレー
ムのインナリードとをワイヤで接続し、リードフレーム
のダイパッド裏面が外部に露出するように半導体素子と
リードフレームを封止材で封止してなる半導体装置と、 リード端子接続用導電パターンが形成されたプリント基
板とを有し、 半導体装置のリード端子をプリント基板のリード端子接
続用導電パターンに半田付けで接続し、半導体装置のダ
イパッド裏面をプリント基板に機械的接合手段で接合し
てなることを特徴とする半導体装置の実装構造。(2) Mount the semiconductor element on the die pad of the lead frame, connect the bonding pad of the semiconductor element and the inner lead of the lead frame with wire, and place the semiconductor element and the lead frame so that the back side of the die pad of the lead frame is exposed to the outside. The semiconductor device includes a semiconductor device sealed with a sealing material, and a printed circuit board on which a conductive pattern for connecting lead terminals is formed, and the lead terminal of the semiconductor device is soldered to the conductive pattern for connecting the lead terminal of the printed circuit board. 1. A mounting structure for a semiconductor device, characterized in that the back side of a die pad of the semiconductor device is bonded to a printed circuit board by mechanical bonding means.
用導電パターンと、その基板本体を貫通して設けられた
ダイパッド接合用金属プレートとを有していることを特
徴とする請求項２記載の半導体装置の実装構造。(3) The printed circuit board has a conductive pattern for lead terminals formed on its surface, and a die pad bonding metal plate provided through the board body. Mounting structure of semiconductor devices.
子を配設し、半導体素子のボンディングパッドにフィル
ムキャリアのフィンガーに設けたバンプを接続し、前記
フィンガーを切断した後に半導体素子の裏面が外部に露
出するように半導体素子及びフィンガーの一部を封止材
で封止し、又は半導体素子裏面が外部に露出するように
半導体素子及びフィンガーの一部を封止材で封止した後
に前記フィンガーを切断してなることを特徴とする半導
体装置。(4) A semiconductor element is placed in a device hole of a film carrier, a bump provided on a finger of the film carrier is connected to a bonding pad of the semiconductor element, and the back surface of the semiconductor element is exposed to the outside after cutting the finger. The semiconductor element and a part of the finger are sealed with an encapsulant as shown in FIG. A semiconductor device characterized by:
子を配設し、半導体素子のボンディングパッドにフィル
ムキャリアのフィンガーに設けたバンプを接続し、前記
フィンガーを切断した後に半導体素子の裏面が外部に露
出するように半導体素子及びフィンガーの一部を封止材
で封止し、又は半導体素子裏面が外部に露出するように
半導体素子及びフィンガーの一部を封止材で封止した後
に前記フィンガーを切断してなる半導体装置と、フィン
ガー端子接続用導電パターンが形成されたプリント基板
とを有し、 半導体装置のフィンガー端子をプリント基板のフィンガ
ー端子接続用導電パターンに半田付けで接続し、半導体
装置の半導体素子裏面をプリント基板に機械的接合手段
で接合してなることを特徴とする半導体装置の実装構造
。(5) A semiconductor element is arranged in a device hole of a film carrier, a bump provided on a finger of the film carrier is connected to a bonding pad of the semiconductor element, and the back side of the semiconductor element is exposed to the outside after cutting the finger. The semiconductor element and a part of the finger are sealed with an encapsulant as shown in FIG. and a printed circuit board on which a conductive pattern for connecting finger terminals is formed, the finger terminals of the semiconductor device are connected to the conductive patterns for connecting finger terminals of the printed circuit board by soldering, and the semiconductor element of the semiconductor device is connected to the conductive pattern for connecting finger terminals of the printed circuit board. A semiconductor device mounting structure characterized in that the back side is bonded to a printed circuit board by mechanical bonding means.
端子接続用導電パターンと、その基板本体を貫通して設
けられた半導体素子接合用金属プレートとを有している
ことを特徴とする請求項５記載の半導体装置の実装構造
。(6) Claim 5, characterized in that the printed circuit board has a conductive pattern for connecting finger terminals formed on the surface thereof, and a metal plate for bonding a semiconductor element provided through the main body of the circuit board. Mounting structure of the described semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23316390A JPH04114455A (en) | 1990-09-05 | 1990-09-05 | Semiconductor device and mounting structure thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23316390A JPH04114455A (en) | 1990-09-05 | 1990-09-05 | Semiconductor device and mounting structure thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04114455A true JPH04114455A (en) | 1992-04-15 |
Family
ID=16950711
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23316390A Pending JPH04114455A (en) | 1990-09-05 | 1990-09-05 | Semiconductor device and mounting structure thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04114455A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09199639A (en) * | 1996-01-16 | 1997-07-31 | Matsushita Electron Corp | Semiconductor device and its formation |
| US5856911A (en) * | 1996-11-12 | 1999-01-05 | National Semiconductor Corporation | Attachment assembly for integrated circuits |
| WO2000049656A1 (en) * | 1999-02-17 | 2000-08-24 | Hitachi, Ltd. | Semiconductor device and method of manufacture thereof |
| US6608369B2 (en) | 2000-06-01 | 2003-08-19 | Seiko Epson Corporation | Lead frame, semiconductor device and manufacturing method thereof, circuit board and electronic equipment |
| US6713851B1 (en) * | 1998-09-02 | 2004-03-30 | Texas Instruments Incorporated | Lead over chip semiconductor device including a heat sink for heat dissipation |
| US7247934B2 (en) * | 2004-11-16 | 2007-07-24 | Siliconware Precision Industries Co., Ltd. | Multi-chip semiconductor package |
| US20110221048A1 (en) * | 2010-03-10 | 2011-09-15 | Ken Beng Lim | Package Having Spaced Apart Heat Sink |
-
1990
- 1990-09-05 JP JP23316390A patent/JPH04114455A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09199639A (en) * | 1996-01-16 | 1997-07-31 | Matsushita Electron Corp | Semiconductor device and its formation |
| US5856911A (en) * | 1996-11-12 | 1999-01-05 | National Semiconductor Corporation | Attachment assembly for integrated circuits |
| US6713851B1 (en) * | 1998-09-02 | 2004-03-30 | Texas Instruments Incorporated | Lead over chip semiconductor device including a heat sink for heat dissipation |
| US6784022B2 (en) | 1998-09-02 | 2004-08-31 | Texas Instruments Incorporated | Method of dicing a semiconductor wafer and heat sink into individual semiconductor integrated circuits |
| WO2000049656A1 (en) * | 1999-02-17 | 2000-08-24 | Hitachi, Ltd. | Semiconductor device and method of manufacture thereof |
| US6573119B1 (en) | 1999-02-17 | 2003-06-03 | Hitachi, Ltd. | Semiconductor device and method of manufacture thereof |
| US6608369B2 (en) | 2000-06-01 | 2003-08-19 | Seiko Epson Corporation | Lead frame, semiconductor device and manufacturing method thereof, circuit board and electronic equipment |
| US7247934B2 (en) * | 2004-11-16 | 2007-07-24 | Siliconware Precision Industries Co., Ltd. | Multi-chip semiconductor package |
| US20110221048A1 (en) * | 2010-03-10 | 2011-09-15 | Ken Beng Lim | Package Having Spaced Apart Heat Sink |
| US9054077B2 (en) * | 2010-03-10 | 2015-06-09 | Altera Corporation | Package having spaced apart heat sink |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5293301A (en) | Semiconductor device and lead frame used therein | |
| US6153924A (en) | Multilayered lead frame for semiconductor package | |
| US6215175B1 (en) | Semiconductor package having metal foil die mounting plate | |
| US5521429A (en) | Surface-mount flat package semiconductor device | |
| JPH10200012A (en) | Package of ball grid array semiconductor and its manufacturing method | |
| JPH04114455A (en) | Semiconductor device and mounting structure thereof | |
| JPH10284873A (en) | Semiconductor integrated circuit device and ic card, and lead frame used for manufacturing the device | |
| JPH05275580A (en) | Semiconductor device | |
| JPH02278752A (en) | Semiconductor device | |
| JPH03174749A (en) | Semiconductor device | |
| US20050087864A1 (en) | Cavity-down semiconductor package with heat spreader | |
| JPH05198696A (en) | Package structure of semiconductor chip | |
| JPH0382060A (en) | Semiconductor device | |
| JPS63190363A (en) | Power package | |
| JPH11251497A (en) | Electronic circuit module | |
| JPS6220701B2 (en) | ||
| JP2000124578A (en) | Hybrid module and manufacture thereof | |
| JP2737332B2 (en) | Integrated circuit device | |
| JPH10150065A (en) | Chip-size package | |
| JP2746248B2 (en) | Chip carrier and method of soldering chip carrier | |
| JPH03248449A (en) | Semiconductor device with heat sink | |
| JPH05144985A (en) | Hybrid integrated circuit device | |
| JP2570889B2 (en) | LSI case | |
| JPH08181168A (en) | Semiconductor device | |
| JP5003451B2 (en) | Resin mold package type electronic device and manufacturing method thereof |