JPH0380342B2 - - Google Patents

Info

Publication number
JPH0380342B2
JPH0380342B2 JP6332683A JP6332683A JPH0380342B2 JP H0380342 B2 JPH0380342 B2 JP H0380342B2 JP 6332683 A JP6332683 A JP 6332683A JP 6332683 A JP6332683 A JP 6332683A JP H0380342 B2 JPH0380342 B2 JP H0380342B2
Authority
JP
Japan
Prior art keywords
semiconductor device
exterior
water
treatment
outer lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6332683A
Other languages
Japanese (ja)
Other versions
JPS59188928A (en
Inventor
Kuniaki Tsurushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP6332683A priority Critical patent/JPS59188928A/en
Publication of JPS59188928A publication Critical patent/JPS59188928A/en
Publication of JPH0380342B2 publication Critical patent/JPH0380342B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

〔発明の技術分野〕 本発明は、半導体装置の外装処理方法に関す
る。 〔発明の技術的背景及びその問題点〕 第1図は、樹脂封止された半導体装置の断面図
である。図中1は、アイランド2上に装着された
素子である。素子1は、ボンデイング線3を介し
てインナーリード4に接続されている。素子1、
ボンデイング線3、アイランド2及びインナーリ
ード4は、エポキシ樹脂等からなる樹脂封止体5
で一体に封止されている。樹脂封止体5の側部に
は、アウターリード6が導出されている。 このように構成された半導体装置10は、次の
ようにして外装処理が施される。先ず、樹脂封止
後の半導体装置10は水酸化ナトリウムや炭酸ナ
トリウムからなる脱脂剤でアルカリ脱脂処理を施
す。次いで、これを水洗してから所定の中和液で
中和する。更に水洗した後塩酸又はフツ化アンモ
ン等を含む活性化剤で、アウターリード6に活性
化処理を施す。次いで、アウターリード6に塩素
を3〜5%含有するフラツクスを塗布し、錫メツ
キ等のメツキ処理後、水洗して乾燥し、外装処理
を完了する(従来例1)。このような外装処理を
施された半導体装置10は、85℃、湿度85%RH
の雰囲気中で2000〜9000時間放置すると、下記表
に示す如く、4000時間以上経過すると素子1に形
成された電極に0.5〜10.0%腐食が起きることが
確認されている。 また、前述の外装処理に代えて錫メツキの代わ
りに溶融半田メツキを施した後、水洗、乾燥を行
う方法が採用されている(従来例2)。このよう
な外装処理の施された半導体装置10では、同表
に併記した如く、前述と同様の放置試験を行う
と、4000時間経過後に0.6〜10.0%の電極腐食が
発生することが確認されている。
[Technical Field of the Invention] The present invention relates to a method for processing the exterior of a semiconductor device. [Technical Background of the Invention and Problems thereof] FIG. 1 is a cross-sectional view of a resin-sealed semiconductor device. 1 in the figure is an element mounted on the island 2. The element 1 is connected to an inner lead 4 via a bonding wire 3. element 1,
The bonding wire 3, the island 2, and the inner lead 4 are sealed in a resin molding body 5 made of epoxy resin or the like.
It is sealed in one piece. Outer leads 6 are led out from the sides of the resin sealing body 5 . The semiconductor device 10 configured in this manner is subjected to an exterior treatment as follows. First, the semiconductor device 10 after resin sealing is subjected to alkaline degreasing treatment using a degreasing agent made of sodium hydroxide or sodium carbonate. Next, this is washed with water and then neutralized with a predetermined neutralizing liquid. After further washing with water, the outer lead 6 is activated using an activating agent containing hydrochloric acid, ammonium fluoride, or the like. Next, a flux containing 3 to 5% chlorine is applied to the outer lead 6, and after a plating treatment such as tin plating, the outer lead 6 is washed with water and dried to complete the exterior treatment (Conventional Example 1). The semiconductor device 10 that has been subjected to such exterior treatment is kept at 85°C and 85%RH.
It has been confirmed that if the element 1 is left in an atmosphere for 2,000 to 9,000 hours, the electrodes formed on the element 1 will corrode by 0.5 to 10.0% after 4,000 hours or more, as shown in the table below. Moreover, instead of the above-mentioned exterior treatment, a method is adopted in which molten solder plating is applied instead of tin plating, followed by washing and drying (Conventional Example 2). As shown in the same table, when the semiconductor device 10 that has been subjected to such an exterior treatment is subjected to the same storage test as described above, it has been confirmed that electrode corrosion of 0.6 to 10.0% occurs after 4000 hours. There is.

〔発明の目的〕[Purpose of the invention]

本発明は、電極等の腐食を防止して信頼性を向
上させることができる半導体装置の外装処理方法
を提供することをその目的とするものである。 〔発明の概要〕 本発明は、アルカリ金属やハロゲン元素を含ま
ない活性化剤及びイオン交換水による洗浄工程を
設けたことにより、電極等の腐食を防止して信頼
性を向上させることができる半導体装置の外装処
理方法である。 〔発明の実施例〕 以下、本発明の実施例について図面を参照して
説明する。 先ず、第1図に示すようなアイランド2上に所
定の素子1を装着し、素子1とインナーリード4
とをボンデイング線3で接続すると共に、これを
アウターリード6が外部に導出するように樹脂封
止体5で一体に封止した半導体装置10を用意す
る。この半導体装置10をアウターリード6が汚
染しないように保持し、脱脂処理を施さずにイオ
ン交換水で洗浄する。 次いで、アウターリード6に活性化剤で活性化
処理を施した後、水洗してから半田メツキ、錫メ
ツキ或は銀メツキ等のメツキ処理を施す。ここ
で、活性化剤としては、アルカリ金属やハロゲン
元素を含まない、硫酸水溶液や硫酸塩溶液からな
る酸性若しくは中性の溶液を使用する。 然る後、これに水洗、湯洗を施した後乾燥処理
を施して外装処理を完了する。 このようにして処理された半導体装置10実施
例1を85℃、湿度85%RHの雰囲気中で2000〜
9000時間放置し、素子1の電極部の腐食状況を調
べたところ上記表に併記する結果を得た。 また、実施例の外装処理工程のメツキ処理の前
に湯洗処理を加え、かつ、活性化剤にはハロゲン
元素を含んだものを使用した方法(比較例1)、
比較例1の外装処理工程のメツキ処理の代わり
に、フラツクス(ハロゲン元素を含まない)塗
布、溶融半田メツキ処理を施すようにした方法
(比較例2)、比較例2の外装処理工程のフラツク
ス塗布前の湯洗処理を省き、かつ、活性化剤には
ハロゲン元素を含まないものを使用した方法(比
較例3)、比較例2の外装処理工程のフラツクス
塗布処理でハロゲン元素を含有したフラツクスを
用いた方法(比較例4)の各4種類の方法で半導
体装置10に外装処理を施した。処理された半導
体装置10に前述と同様の電極腐食試験を行い、
その結果を上記表に併記した。 上記表から明らかな如く、活性化剤やフラツク
スにハロゲン元素(アルカリ金属がある場合には
及びアルカリ金属)を含まないものを使用し、脱
脂処理の代わりにイオン交換水による洗浄を行
い、かつ、湯洗処理を加えるようにした実施例に
よる半導体装置の外装処理方法では、9000時間を
経過して初めて0.5%程の電極の腐食が起きるこ
とが判る。更に、比較例3から湯洗処理工程が多
い程この効果が助長されることが判る。 このようにして実施例によるものでは外装処理
後に腐食の発生を抑えて信頼性の高い半導体装置
を得ることができる。 〔発明の効果〕 以上説明した如く、本発明に係る半導体装置の
外装処理方法によれば、電極等の腐食を防止して
信頼性を向上させることができる等顕著な効果を
有するものである。
An object of the present invention is to provide a method for processing the exterior of a semiconductor device, which can prevent corrosion of electrodes and the like and improve reliability. [Summary of the Invention] The present invention provides a semiconductor that can prevent corrosion of electrodes and improve reliability by providing a cleaning process using an activator and ion-exchanged water that do not contain alkali metals or halogen elements. This is a method for treating the exterior of the device. [Embodiments of the Invention] Hereinafter, embodiments of the present invention will be described with reference to the drawings. First, a predetermined element 1 is mounted on the island 2 as shown in FIG.
A semiconductor device 10 is prepared which is connected with a bonding wire 3 and is integrally sealed with a resin sealing body 5 so that an outer lead 6 is led out to the outside. This semiconductor device 10 is held so that the outer leads 6 are not contaminated, and is washed with ion-exchanged water without degreasing. Next, the outer leads 6 are activated with an activator, washed with water, and then subjected to a plating process such as solder plating, tin plating, or silver plating. Here, as the activator, an acidic or neutral solution containing no alkali metal or halogen element and consisting of an aqueous sulfuric acid solution or a sulfate solution is used. Thereafter, it is washed with water and hot water, and then dried to complete the exterior treatment. 10 Example 1 of the semiconductor devices processed in this manner were heated to 2000~2000 in an atmosphere of 85°C and 85% RH.
After being left for 9000 hours, the corrosion status of the electrode portion of element 1 was examined, and the results shown in the table above were obtained. In addition, a method in which a hot water washing treatment was added before the plating treatment in the exterior treatment step of the example, and an activator containing a halogen element was used (Comparative Example 1),
A method in which flux (not containing a halogen element) and molten solder plating were applied instead of plating in the exterior treatment process of Comparative Example 1 (Comparative Example 2), Flux application in the exterior treatment process of Comparative Example 2 A method in which the previous hot water washing treatment was omitted and an activator that did not contain a halogen element was used (Comparative Example 3), and a method in which a flux containing a halogen element was used in the flux application process in the exterior treatment process of Comparative Example 2. Exterior treatment was performed on the semiconductor device 10 using each of the four methods used (Comparative Example 4). The processed semiconductor device 10 was subjected to the same electrode corrosion test as described above,
The results are also listed in the table above. As is clear from the above table, activators and fluxes that do not contain halogen elements (alkali metals, if any) are used, cleaning with ion-exchanged water is performed instead of degreasing, and It can be seen that in the semiconductor device exterior treatment method according to the embodiment in which hot water washing treatment is added, electrode corrosion of about 0.5% occurs only after 9000 hours have elapsed. Furthermore, it can be seen from Comparative Example 3 that this effect is enhanced as the number of hot water washing treatment steps increases. In this way, according to the embodiment, occurrence of corrosion can be suppressed after the exterior treatment, and a highly reliable semiconductor device can be obtained. [Effects of the Invention] As explained above, the method for processing the exterior of a semiconductor device according to the present invention has remarkable effects such as being able to prevent corrosion of electrodes and the like and improve reliability.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、樹脂封止半導体装置の構造を示す断
面図、第2図は、同半導体装置に生ずる腐食の発
生原因を示す説明図である、 1……素子、2……アイランド、3……ボンデ
イング線、4……インナーリード、5……樹脂封
止体、6……アウターリード、10……半導体装
置。
FIG. 1 is a cross-sectional view showing the structure of a resin-sealed semiconductor device, and FIG. 2 is an explanatory diagram showing the causes of corrosion that occurs in the semiconductor device. 1...Element, 2...Island, 3... ... bonding wire, 4 ... inner lead, 5 ... resin sealing body, 6 ... outer lead, 10 ... semiconductor device.

Claims (1)

【特許請求の範囲】[Claims] 1 アウターリードが外部に導出するようにして
所定の素子を樹脂封止した半導体装置をイオン交
換水で洗浄し、次いで、ハロゲン元素やアルカリ
金属不純物を含まない酸性または中性の活性化剤
で前記アウターリードに活性化処理を施し、これ
を水洗した後前記アウターリードにメツキ処理を
行い、更にこれに水洗及び湯洗処理を施すことを
特徴とする半導体装置の外装処理方法。
1. A semiconductor device in which predetermined elements are sealed with resin so that the outer leads are led outside is washed with ion-exchanged water, and then washed with an acidic or neutral activator that does not contain halogen elements or alkali metal impurities. 1. A method for processing the exterior of a semiconductor device, comprising performing an activation process on an outer lead, washing the outer lead with water, performing a plating process on the outer lead, and further performing a washing process with water and hot water.
JP6332683A 1983-04-11 1983-04-11 Process of sheathing for semiconductor device Granted JPS59188928A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6332683A JPS59188928A (en) 1983-04-11 1983-04-11 Process of sheathing for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6332683A JPS59188928A (en) 1983-04-11 1983-04-11 Process of sheathing for semiconductor device

Publications (2)

Publication Number Publication Date
JPS59188928A JPS59188928A (en) 1984-10-26
JPH0380342B2 true JPH0380342B2 (en) 1991-12-24

Family

ID=13226015

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6332683A Granted JPS59188928A (en) 1983-04-11 1983-04-11 Process of sheathing for semiconductor device

Country Status (1)

Country Link
JP (1) JPS59188928A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0642348Y2 (en) * 1987-03-31 1994-11-02 ソニー株式会社 Semiconductor device

Also Published As

Publication number Publication date
JPS59188928A (en) 1984-10-26

Similar Documents

Publication Publication Date Title
KR900007303B1 (en) Resin packed semiconductor device
US5459103A (en) Method of forming lead frame with strengthened encapsulation adhesion
JP5441276B2 (en) Improved method of adhesion between silver surface and resin material
CN112133640B (en) Preparation method of lead frame with rough side wall
US20190172777A1 (en) Lead-frame structure, lead-frame, surface mount electronic device and methods of producing same
JPH01100930A (en) Handling of copper plated lead frame for semiconductor resin package
JPH0380342B2 (en)
KR100947921B1 (en) High ductility Au surface treatment plating method of flexible printed circuit board
JPS6050343B2 (en) Lead frame for semiconductor device manufacturing
JPH09148509A (en) Lead frame for semiconductor device and its surface treatment method
US4009299A (en) Tin strip formulation for metal to glass seal diodes
US3099576A (en) Selective gold plating of semiconductor contacts
CN220604682U (en) Lead frame and chip package product
JPH05304235A (en) Improvement of solder wettability for nickel plated lead frame
JPH07180085A (en) Non-cyanide silver plating method and non-cyanide solution used therefor
JP2000252402A (en) Semiconductor device, mounting method thereof and electronic device
JPS63291443A (en) Manufacture of semiconductor device
JP2000164782A (en) Semiconductor device equipped with lead-free tin-based solder film and manufacture thereof
JPS63192259A (en) Prevention of discoloration of copper plated material for lead frame
JPS6174358A (en) Manufacture of resin-sealed semiconductor device
JPS61139037A (en) Semiconductor device
JP3215205B2 (en) Packaging method for semiconductor device
JPS6035548A (en) Lead frame and electronic parts using it
JPS63202944A (en) Lead frame
JPH0974159A (en) Treating method for iron lead frame and lead frame