JP3215205B2 - Packaging method for semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an exterior of a semiconductor device, and is particularly suitable for low temperature and in-line operation.

[0002]

2. Description of the Related Art A soldering method and an electroplating method are mainly used for packaging a semiconductor element. The soldering method will be described with reference to FIG. In the process of assembling a semiconductor device, a method using a lead frame in addition to the so-called tab method is still frequently used, and a plurality of types are selected depending on a model.

A semiconductor element 2 is mounted on a lead frame 1 made of an iron-based or copper-based material with a silver paste or the like.
An electrode 3 provided on the semiconductor element 2 and an inner lead formed on the lead frame 1 (not shown, hereinafter referred to as a lead)
A metal thin wire 4 is crimped between them by a bonding method and electrically connected to each other.
ld following mode - sealing the more resin 5 to be described as field method). Since a heat treatment of about 150 ° C. to 300 ° C. is performed in each of these steps, the surface of the lead frame 1 has an oxide film.
(Not shown) . The name of the lead outside the sealing resin 5 changes to an outer lead.

On the other hand, when the protective film is coated on the outer lead 6 by the solder immersion method, the oxide film 22 is removed by the flux 7 as shown in FIG.
After activating the surface of the solder 6, as shown in FIG.
The lead 6 is immersed. Next, a washing step is performed to remove the flux residue, and the process is completed. As a result, the outer lead 6 is covered with the metal coating 13.

Next, an example of the electroplating method will be described with reference to FIG. 4. However, since the mounting step and the resin sealing step are completely the same, only the description of the apparatus will be given. That is, as shown in the drawing, a resin-encapsulated semiconductor device 9 to be plated is placed in a plating bath 10, and the outer lead 6 and the plating bath 10 are connected to the electrodes 11, respectively. To cover the plating layer. Prior to this plating step, an oxide film (not shown) formed on the lead frame 1 is removed.
2 and a metal film 13 such as solder is formed on the surface by applying electricity (FIG. 1).
See ref.) . This method is inferior to the number and time of one processing as compared with the solder immersion method, resulting in a significant increase in cost.

[0006]

The solder immersion method has the advantage that the packaging can be performed at low cost, but the flux is exposed to a high temperature when immersed in the solder bath and the flux in the pretreatment, so that the reliability of the semiconductor element is reduced. A problem arises in sex. That is,
In the former, the flux contains a halogen element such as chlorine in order to improve the ability to remove an oxide film. Occurs.

Further, since it is immersed in a molten solder bath maintained at 230.degree. C. to 260.degree. C., the adhesiveness between the sealing resin and the lead frame is reduced due to the difference in the coefficient of thermal expansion between the sealing resin and the lead frame. In addition, in order to mount the semiconductor element at a high density, the outer shape of the semiconductor element is reduced and the inner lead pitch is narrowed. Therefore, the product margin becomes smaller with respect to the temperature conditions at the time of immersion in the solder bath, and it becomes more remarkable in an optical semiconductor element using a transparent resin.

[0008] In addition, the appearance not good due to solder Cobb, M /
CT conversion becomes impossible.

As described above, although the solder immersion method is low in cost, it has a problem in quality, whereas the electroplating method is a low-temperature treatment method, which is advantageous in quality but is economically problematic. .

[0010] The present invention has been made in view of the above circumstances. In particular, quality improvement by low-temperature assembly (Assembly) and mass production process by in-line exterior process have been established, and inexpensive products have been established. The purpose is to enable stable supply.

[0011]

A semiconductor device according to the present invention.
The exterior method is to be used before the metal leads leading out of the sealing resin.
After mechanically removing the oxide film on the part close to the sealing resin ,
The metal foil sandwiching the removal surface is pressed and sealed.
The feature is that an oxide film is left between the resin layer and the metal foil .

[0012]

According to the present invention, an oxide film is formed by removing a specific portion of an oxide film of a metal lead, sandwiching the specific portion with a metal foil, and pressing the metal foil to form an oxide film. Prevents adhesion of solder etc. when mounting on As a result, an effect equivalent to that of the related art can be obtained at a low temperature such as room temperature. The metal lead is made of a corrosion-resistant metal, and the metal foil is made of solder, tin and silver having good solder wettability.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment according to the present invention will be described with reference to FIGS. FIG. 5 clarifies the appearance of the resin-encapsulated semiconductor device after the mounting step and the molding step, which are the steps of the method of the present invention.

In the process of assembling a semiconductor device, a lead is required.
The method of using the dough frame is still frequently used, and the lead frame selected according to the type of the semiconductor device is made of an iron or copper material, and the semiconductor element is placed on the bed provided there. After mounting with a paste or the like, a metal thin wire is pressure-bonded by a bonding method between an electrode provided on a semiconductor element and a lead formed on a lead frame, and then electrically connected.
The resin is sealed by a molding method. However, since the semiconductor element receives a thermal load of about 150 ° C. to 300 ° C. in each process, the surface of the outer lead 21 led out of the sealing resin 20 is covered with an oxide film 22 as shown in FIG. Will be

The outer lead 21, that is, the lead frame is made of a material having good corrosion resistance such as copper, copper alloy, iron, iron alloy such as 42 alloy and clad material.

Next, an outer reel for attaching the metal foil 23 is provided.
The oxide layer 22 covering the intermediate portion of the gate 21 is removed by, for example, a brushing process using a wire-brush to expose a new surface, and has a sectional shape shown in FIG.

Next, the new surface is exposed on the surface of the metal foil 23 by the same brushing process, the two new surfaces are brought into close contact with each other, and then they are rolled by a roller or the like so that they are pressed together to unite the two surfaces. As a result, the outer lead having the sectional shape shown in FIG.
Thus, a resin-encapsulated semiconductor device including the gate 21 is obtained. In this step, as apparent from FIG. 6, the sealing resin 20 and the metal foil 23 are used.
The oxide film 22 remains at a slight distance between the two. With this step, the outer lead 21 exterior step is completed.
This is to improve the yield by eliminating the solder immersion step and the plating step as in the prior art.

As the material of the metal foil 23, so-called 63 solder (63% tin, lead melting point: 183 ° C.), silver and 63 solder to which bismuth, cadmium or indium is added as an impurity can be applied.

[0019]

In the prior art, a flux containing a halogen element was used to remove an oxide film adhered to the outer lead. Thermal processes such as processes can be excluded.
Furthermore, since there is no adverse effect that the plating solution is immersed in the semiconductor device in the plating step, intrusion of impurities into the semiconductor element can be prevented. In addition, there is no need for a washing step after the exterior step, and the entire step can be simplified.

In addition, since the method of the present invention is performed at room temperature,
The thermal shock to the semiconductor element can be remarkably reduced, which is effective for downsizing the semiconductor element and narrowing the pitch of leads. In addition, appearance defects due to solder bridges and the like are also prevented.

Although the electroplating process used in the prior art is a so-called off-line process, it has been a great obstacle to shortening the lead time of all the processes. Alternatively, since it may be incorporated in the lead forming process, the process can be simplified and shortened.

In addition, the outer lead between the encapsulating resin layer and the metal foil for protecting the semiconductor element from the external atmosphere is covered with an oxide film, so that when the user performs soldering, the outer lead is sealed. Since it can be prevented from flowing to the resin layer side, intrusion of solder or flux from the opening portion of the solder bridge or the sealing resin layer can be prevented.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a main part of a conventional resin-encapsulated semiconductor device.

FIG. 2 is a view in which an outer lead of a resin-sealed semiconductor device is immersed in a flux.

FIG. 3 is a view of immersing an outer lead of the resin-encapsulated semiconductor device in a solder bath, following FIG. 2;

FIG. 4 is a diagram illustrating a conventional electroplating method.

FIG. 5 is a diagram illustrating an outer lead of the resin-sealed semiconductor device before the method of the present invention is performed.

FIG. 6 is a diagram illustrating main steps of the method of the present invention.

FIG. 7 is a cross-sectional view showing a main part of the resin-encapsulated semiconductor device after the exterior step is completed by the method of the present invention.

[Explanation of symbols]

 1: Lead frame, 2: Semiconductor element, 3: Electrode, 4: Fine metal wire, 5, 20: Sealing resin, 6, 21: Outer lead, 7: Flux, 8: Solder bath, 9 : Resin-encapsulated semiconductor device, 10: plating bath, 11: power supply, 12: plating solution, 13: metal film, 22: oxide film, 23: metal foil.

Continuation of front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 23/50

Claims (1)

(57) [Claims] 1. A metal lead leading out of a sealing resin.
After mechanically removing the oxide film on the part close to the sealing resin ,
The metal foil sandwiching the removal surface is pressed and sealed.
A semiconductor characterized by leaving an oxide film between the resin layer and the metal foil
Body element exterior method .