JPS60147146A - Lead frame for semiconductor - Google Patents

Lead frame for semiconductor

Info

Publication number
JPS60147146A
JPS60147146A JP59003136A JP313684A JPS60147146A JP S60147146 A JPS60147146 A JP S60147146A JP 59003136 A JP59003136 A JP 59003136A JP 313684 A JP313684 A JP 313684A JP S60147146 A JPS60147146 A JP S60147146A
Authority
JP
Japan
Prior art keywords
copper
layer
lead frame
alloy
silver plated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59003136A
Other languages
Japanese (ja)
Inventor
Osamu Yoshioka
修 吉岡
Ryozo Yamagishi
山岸　良三
Norio Okabe
則夫 岡部
Yoshiaki Wakashima
若島　喜昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Hitachi Ltd
Original Assignee
Hitachi Cable Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd, Hitachi Ltd filed Critical Hitachi Cable Ltd
Priority to JP59003136A priority Critical patent/JPS60147146A/en
Publication of JPS60147146A publication Critical patent/JPS60147146A/en
Pending legal-status Critical Current

Links

Classifications

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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582—Metallic layers on lead frames
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Abstract

PURPOSE:To improve the adherence to a silver plated layer utilizing an Ni-Sn alloy base metal layer with excellent soldering property by a method wherein an interlayer made of copper or copper alloy is provided between an Ni-Sn alloy base metal layer and a silver plated layer. CONSTITUTION:An Ni-Sn alloy layer 10 is provided on a lead frame 1 made of a copper substrate by means of Ni-Sn alloy plating bath and electroplating processes. Besides a copper layer 11 is provided on the parts including a bonding tab 7 for pelletting Si as well as a post 8 for wirebonding inner lead by means of copper cyanide plating bath and electroplating processes. Then said parts are coated with a silver plated layer 3. Finally the excessive copper layer is removed by means of anodically resolving process during copper cyanide bath to produce a leadframe. When an IC package is produced utilizing such a lead frame, an Si pellet 4 is arranged on the silver plated layer 3 on the tab 7 through the intermediary of an Au-Si eutectic wax 6 to be wired to the post 8 of the lead frame by a gold wire and then whole body is sealed with resin to constitute the IC package. Through these procedures, a semiconductor device may be made highly reliable even after heattreatment.

Description

【発明の詳細な説明】 〔発明の背景と目的〕 本発明は半導体装置のリードフレーム部材に関する。[Detailed description of the invention] [Background and purpose of the invention] The present invention relates to a lead frame member for a semiconductor device.

樹脂モールドしてなるＩＣパッケージを製造する場合、
Ｓｉ　よシなる半導体素子をリードフレームに接合する
ペレットダンデイング及びＳｉ素子とリードとを金また
はＡ４の細線で配線するワイヤデンディングが行われる
。このリードフレームに用いられる素材はコパール、４
２合金などのＦｅ−Ｎｉ合金系の材料が使用されていた
が、これらのリードフレームは高価になる欠点があるた
め、近年、よシ安価な銅または銅合金からなるリードフ
レーム材が使用されることが多くなってきた。When manufacturing an IC package made of resin mold,
Pellet dumping is used to bond a semiconductor element made of Si to a lead frame, and wire ending is used to connect the Si element and leads with gold or A4 thin wire. The material used for this lead frame is copal, 4
Fe-Ni alloy materials such as 2 alloys have been used, but these lead frames have the disadvantage of being expensive, so in recent years lead frame materials made of cheaper copper or copper alloys have been used. It's becoming more and more common.

銅または銅合金のリードフレーム材を使用した部分銀め
っき品を製造する場合、従来は銅素材と銀めっき層との
密着性を向上させるために゛薄い銅めっき（銅ストライ
ク）を中間に設けるのが一般であった。When manufacturing selectively silver-plated products using copper or copper alloy lead frame materials, conventionally, a thin copper plating (copper strike) was provided in the middle to improve the adhesion between the copper material and the silver plating layer. was common.

しかしながら、Ｓｉ　ペレットダンデイングまたはワイ
ヤダンディングなどの半導体装置組立工程中に熱処理を
受けた場合、銀で覆われた部分以外の銅面では酸化が進
行する。However, when subjected to heat treatment during a semiconductor device assembly process such as Si pellet dumping or wire dumping, oxidation progresses on the copper surface other than the portion covered with silver.

銅の酸化膜は銅素地と酸化膜との密着性が弱いため、樹
脂でモールドした場合、湿気（水分）が酸化膜の素地の
すき間を通って侵入して腐蝕を兄生し易い走いう問題が
生じる。また、組立てられた半導体装置はプリント基板
に組込む際の接合性を確保するため、外部リードに溶融
半田あるいは錫めっきが行なわれるが、酸化した銅面で
はその半田付性が低下する問題があった。Copper oxide film has poor adhesion between the copper base and the oxide film, so when molded with resin, moisture (moisture) can easily enter through the gaps in the oxide film base, causing corrosion. occurs. Additionally, in order to ensure bonding properties when assembled semiconductor devices are assembled into printed circuit boards, the external leads are molten soldered or tin plated, but there is a problem in that solderability deteriorates on oxidized copper surfaces. .

この外部リード部の半田付性を改善する目的で銅表面に
半田ぬれ性の良好なＮ　ｉ　−Ｓ　ｎ合金層で覆った後
、部分的に銀めっきをする方法が提案されている（特開
昭５４−１２９９７６号公報）。しかしながら、この方
法を採用した場合、銀とＮｉ　−８ｎ合金の密着性が悪
く、銀めっき層が剥離し易い欠点があった。In order to improve the solderability of this external lead part, a method has been proposed in which the copper surface is covered with a Ni-Sn alloy layer with good solderability and then partially plated with silver (Unexamined Japanese Patent Publication No. Publication No. 54-129976). However, when this method is employed, there is a drawback that the adhesion between silver and the Ni-8n alloy is poor and the silver plating layer is easily peeled off.

〔発明の概要〕[Summary of the invention]

本発明の目的は、前記した従来技術の欠点を解消し、半
導体の信頼性と接合性が改良することができる新規な半
導体用リードフレームを提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a novel lead frame for semiconductors that can eliminate the drawbacks of the prior art described above and improve the reliability and bonding properties of semiconductors.

すなわち、本発明は銅または銅合金からなる基板上にニ
ッケルと錫を主体とする合金からなる下地層を設け、該
下地層の少くともペレット付けするタブ部とワイヤゼン
デイングするボスト部を含む部分に銅または銅合金から
なる中間層を設け、さらにその部分に銀めっき層を設け
てなることを特徴とする半導体用リードフレームである
。That is, the present invention provides a base layer made of an alloy mainly composed of nickel and tin on a substrate made of copper or a copper alloy, and a portion of the base layer that includes at least a tab part to which pellets are attached and a boss part to which wire ends are attached. This is a lead frame for a semiconductor, characterized in that an intermediate layer made of copper or a copper alloy is provided at the top, and a silver plating layer is further provided at that portion.

以下、本発明の半導体用リードフレームの構成を従来の
リードフレームの構成との対比において説明する。Hereinafter, the structure of the semiconductor lead frame of the present invention will be explained in comparison with the structure of a conventional lead frame.

第１図は、従来のＩＣ用リードフレームの一例を示す平
面図、第２図は、その要部拡大断面図である。この例に
おいては、銅の基板１上に薄い銅めっき−（銅ストライ
ク）層２を設け、その上に部分的に銀めっき層３が設け
られている。このようなリードフレームを用いてＩＣノ
ξツヶージを作るには、そのベレット付タブ部７に、例
えｌｆ：Ａｎ　−８ｉ　共晶ろう材６を介してｓｉＯレ
ット４を配設し、ＳｉＲレット４と基板１のボスｌ一部
ｇｏ銀めっき層３とをＡ、ｎ線５で配線し、これをモー
ルド樹脂で樹脂封止２１する。FIG. 1 is a plan view showing an example of a conventional IC lead frame, and FIG. 2 is an enlarged cross-sectional view of a main part thereof. In this example, a thin copper plating (copper strike) layer 2 is provided on a copper substrate 1, and a silver plating layer 3 is partially provided thereon. In order to make an IC node ξ gauge using such a lead frame, an SiO let 4 is disposed on the tab portion 7 with a bullet through an lf:An-8i eutectic brazing material 6, and an SiR let 4 is placed on the tab part 7 with a bullet. A part of the boss l of the substrate 1 and the silver plating layer 3 are wired with A and N wires 5, and this is resin-sealed 21 with a molding resin.

第３図は従来のリードフレームの他の例を示す要部断面
図であって、銅の基板１上にＮ　ｉ　−８ｎ合金　２層
１０を設け、その上に部分的に銀めっき層３が設けられ
ている。この場合も前記と同様にＩＣノξッケージを構
成する。FIG. 3 is a sectional view of main parts showing another example of a conventional lead frame, in which two layers 10 of Ni-8n alloy are provided on a copper substrate 1, and a silver plating layer 3 is partially formed on top of the two layers 10 of Ni-8n alloy. It is provided. In this case as well, the IC ξ package is constructed in the same manner as described above.

このような従来技術においては、前記した如き欠点があ
った。すなわち、第１図の例では、樹脂モールド２１か
らはみ出た外部リード９の部分では銅層２が露出し、組
立て工程内での熱処理で酸化膜が形成しているので半田
付性が低下する。この対策として第３図に示すように半
田付性の良いＮｉ−８ｎ合金、下地層１０を設けること
も提案されたが、この場合、銀めっき層３とＮ　ｉ　−
Ｓ　ｎ合金下地層１０との密着性が弱く、銀めっき層３
が剥離し易いという欠点があった。Such conventional techniques have the drawbacks mentioned above. That is, in the example shown in FIG. 1, the copper layer 2 is exposed at the portion of the external lead 9 that protrudes from the resin mold 21, and an oxide film is formed during the heat treatment during the assembly process, resulting in poor solderability. As a countermeasure to this problem, it has been proposed to provide a base layer 10 made of Ni-8n alloy with good solderability as shown in FIG. 3, but in this case, the silver plating layer 3 and the Ni-
The adhesion with the Sn alloy base layer 10 is weak, and the silver plating layer 3
It had the disadvantage that it was easy to peel off.

本発明は、これらの欠点を伴なわない新規な構成の半導
体用リードフレームに関するものであって、第４図にそ
の一実施例を示すように、Ｎｉ−８ｎ合金下地層１０と
銀めっき層３との間に銅または銅合金から々る中間層１
１を設けることにより、半田付性の良いＮ　ｉ　−８ｎ
合金下地層を用い、銀めっき層との密着性を改良するこ
とができた。このような中間層はめつきによって設ける
ことができる。The present invention relates to a semiconductor lead frame having a novel structure free from these drawbacks, and as shown in one embodiment in FIG. an intermediate layer 1 made of copper or copper alloy between
By providing 1, N i -8n has good solderability.
By using an alloy base layer, we were able to improve the adhesion with the silver plating layer. Such an intermediate layer can be provided by plating.

〔実施例〕〔Example〕

以下、本発明を第４図に示す態様について次の実施例に
よって具体的に説明する。Hereinafter, the embodiment of the present invention shown in FIG. 4 will be specifically explained using the following examples.

０．２５４　ｍｍ厚の銅基体からなるリードフレーム材
１上にＮ　ｉ　−８ｎ合金めっき浴（ピロリン酸含有）
から電気めっき法により０．５μのＮｉ−８ｎ合金層１
０を設け、さらに８１被レツドを被しット付するゼンデ
イングタブ部７とインナーリードのワイヤゼンデイング
するポスト物８を含む部分にシアン化鋼めっき浴から電
気めっき法により０１μの銅層１１を設けた後に、この
部分に銀めっき層３を設けた。最後にシアン浴中で陽極
的に余分に銅層を溶解除去してリードフレームを作成し
た。A Ni-8n alloy plating bath (containing pyrophosphoric acid) was applied on a lead frame material 1 consisting of a copper substrate with a thickness of 0.254 mm.
A 0.5μ Ni-8n alloy layer 1 is formed by electroplating from
Further, a copper layer 11 of 01 μm is formed by electroplating from a cyanide steel plating bath on the part including the bending tab portion 7 on which the thread 81 is to be covered and the post 8 on which the inner lead wire is wound. After providing this, a silver plating layer 3 was provided on this portion. Finally, the excess copper layer was dissolved and removed anodically in a cyan bath to create a lead frame.

なお、このようなリードフレームを用いてＩＣ・ξツケ
ージを作る場合には、従来例で説明した場合と同様に、
タブ部７の鋏めっき層３上にＡｕ−８ｉ共晶ろう材６を
介してＳｉペレット４を配置し、これとリードフレーム
のボスト部８とを金線によって配線し、全体を樹脂で封
止してＩＣパンケージを構成する。In addition, when making an IC/ξ-cage using such a lead frame, as in the case explained in the conventional example,
A Si pellet 4 is placed on the scissor plating layer 3 of the tab part 7 via an Au-8i eutectic brazing material 6, and this and the boss part 8 of the lead frame are wired with gold wire, and the whole is sealed with resin. to configure the IC panpackage.

前記のようにして作成した本発明の部分銀めっきリード
フレームと従来例によるリードフレームを用いて、大気
中で４００℃×２分の加熱劣化を行い、外部リード部に
形成する酸化膜の密着性を粘着テープピーリング法で調
べた。判定：○：剥離せず。Ｘ：剥離した。Using the partially silver-plated lead frame of the present invention prepared as described above and the conventional lead frame, heat deterioration was performed at 400°C for 2 minutes in the atmosphere to determine the adhesion of the oxide film formed on the external lead portion. was investigated using the adhesive tape peeling method. Judgment: ○: No peeling. X: Peeled off.

また、大気中４００℃×２分の加熱劣化後のリードフレ
ームを用いてモールド樹脂により樹脂封止２１した後、
樹脂とリードフレームの密着性を引張強度により調べた
。判定二〇：密着性良好、酸化膜とリードフレーム剥離
なし。×：密着性悪し、酸化膜かりニドフレームから剥
離した。In addition, after resin sealing 21 with mold resin using a lead frame that has been heated and deteriorated in the atmosphere at 400°C for 2 minutes,
The adhesion between the resin and lead frame was examined by tensile strength. Rating 20: Good adhesion, no peeling of oxide film or lead frame. ×: Adhesion was poor, and the oxide film was peeled off from the frame.

さらに、２００℃で２００時間長期劣化後、銀めっき層
の密着性をテープピーリング法により調べた。判定二〇
：剥離せず。×：剥離した。Furthermore, after long-term deterioration at 200° C. for 200 hours, the adhesion of the silver plating layer was examined by tape peeling. Judgment 20: No peeling. ×: Peeled off.

以上の試験結果を次表に示した。The above test results are shown in the table below.

以下余白 上記結果から明かなように、本発明による鎖部分めっき
品はいずれの評価法においても優れた特性を示すことが
認められる。As is clear from the above results, it is recognized that the chain partially plated product according to the present invention exhibits excellent characteristics in all evaluation methods.

上記の実施例においては、中間層に銅めっき層を用いだ
が、銅合金めっき層を用いることができる。下地層は表
面がＮｉとＳｎを主体とした合金であればよく、Ｎｉま
たはＮｉ合金層（Ｎｉ−Ｓｎ合金以外の合金）を設けて
からＮｉ、ｌ！：Ｓｎを主体とする合金を２層めっき法
によシ設けてもよく、上記と同様な効果が得られる。In the above embodiment, a copper plating layer is used as the intermediate layer, but a copper alloy plating layer can also be used. The surface of the underlayer may be an alloy mainly composed of Ni and Sn, and after providing a Ni or Ni alloy layer (alloy other than Ni-Sn alloy), Ni, l! : An alloy mainly composed of Sn may be provided by a two-layer plating method, and the same effect as above can be obtained.

〔発明の効果〕〔Effect of the invention〕

本発明によるときは、従来の部分めっきリードフレーム
材が高温短時間または低温長時間加熱後に特性が低下す
る欠点を解消することができ、電子部品としての半導体
装置の信頼性を著しく向上させることができた。すなわ
ち、本発明においては、半導体装置を組立てる場合、ペ
レット付、ワイヤ゛ゼンデイング、モールド等で受ける
熱処理後も半導体装置の信頼性を高くすることができる
。According to the present invention, it is possible to eliminate the drawback that conventional partially plated lead frame materials deteriorate in characteristics after being heated for a short time at high temperatures or for a long time at low temperatures, and the reliability of semiconductor devices as electronic components can be significantly improved. did it. That is, in the present invention, when assembling a semiconductor device, the reliability of the semiconductor device can be increased even after heat treatment by pelletizing, wire bending, molding, etc.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来の半導体用リードフレームの一例を示す平
面図、第２図はその要部拡大断面図、第３図は従来のリ
ードフレームの他の例を示す要部拡大断面図、第４図は
本発明の半導体用リードフレームの一実施例を示す要部
拡大断面図である。 １・・・・・・銅基板、２・・・・・・銅めっき層、３
・・・・・銀めっき層、４・・・・・・３ｉ６レツト１
．５・・・・・金線、６・・・・・・Ａｕ−８ｉ共晶ろ
う材、７・・・・・・ペレット付のタフ部、８・・・・
・・インナーリードポスト部、９・・・・・・外部リー
ド、１０・・・・・・Ｎ　ｉ−８ｎ合金めっき層、１１
・・・・・・銅めっき中間層、２１・・・・・・樹脂モ
ールド範囲。FIG. 1 is a plan view showing an example of a conventional semiconductor lead frame, FIG. 2 is an enlarged cross-sectional view of the main part thereof, FIG. 3 is an enlarged cross-sectional view of the main part showing another example of the conventional lead frame, and FIG. The figure is an enlarged sectional view of a main part showing an embodiment of a lead frame for a semiconductor according to the present invention. 1... Copper substrate, 2... Copper plating layer, 3
...Silver plating layer, 4...3i6let 1
．． 5...Gold wire, 6...Au-8i eutectic brazing filler metal, 7...Tough part with pellets, 8...
...Inner lead post part, 9...Outer lead, 10...Ni-8n alloy plating layer, 11
......Copper plating intermediate layer, 21...Resin mold range.

Claims (1)

【特許請求の範囲】[Claims] （１）銅または銅合金からなる基体上にニッケルと錫を
主体とする合金からなる下地層を設け、該下地層の少く
ともペレット付けするタブ部とワイヤダンディングする
ボスト部を含む部分に銅または銅合金からなる中間層を
設け、さらにその部分に銀めっき層を設けてなることを
特徴とする半導体用リードフレーム。(1) A base layer made of an alloy mainly composed of nickel and tin is provided on a substrate made of copper or a copper alloy, and copper is applied to at least a portion of the base layer including the tab part to which the pellet is attached and the boss part to which the wire is attached. Alternatively, a lead frame for a semiconductor, characterized in that an intermediate layer made of a copper alloy is provided, and a silver plating layer is further provided in that portion.
JP59003136A 1984-01-10 1984-01-10 Lead frame for semiconductor Pending JPS60147146A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59003136A JPS60147146A (en) 1984-01-10 1984-01-10 Lead frame for semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59003136A JPS60147146A (en) 1984-01-10 1984-01-10 Lead frame for semiconductor

Publications (1)

Publication Number Publication Date
JPS60147146A true JPS60147146A (en) 1985-08-03

Family

ID=11548935

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59003136A Pending JPS60147146A (en) 1984-01-10 1984-01-10 Lead frame for semiconductor

Country Status (1)

Country Link
JP (1) JPS60147146A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5814880A (en) * 1989-12-22 1998-09-29 Northrop Grumman Corporation Thick film copper metallization for microwave power transistor packages
US6972496B2 (en) 2001-06-12 2005-12-06 Hynix Semiconductor Inc. Chip-scaled package having a sealed connection wire

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5814880A (en) * 1989-12-22 1998-09-29 Northrop Grumman Corporation Thick film copper metallization for microwave power transistor packages
US6972496B2 (en) 2001-06-12 2005-12-06 Hynix Semiconductor Inc. Chip-scaled package having a sealed connection wire

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