JPH0374046U - - Google Patents
Info
- Publication number
- JPH0374046U JPH0374046U JP13499889U JP13499889U JPH0374046U JP H0374046 U JPH0374046 U JP H0374046U JP 13499889 U JP13499889 U JP 13499889U JP 13499889 U JP13499889 U JP 13499889U JP H0374046 U JPH0374046 U JP H0374046U
- Authority
- JP
- Japan
- Prior art keywords
- computer
- clock
- computers
- status register
- signal indicating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Hardware Redundancy (AREA)
- Debugging And Monitoring (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13499889U JPH0374046U (enExample) | 1989-11-21 | 1989-11-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13499889U JPH0374046U (enExample) | 1989-11-21 | 1989-11-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0374046U true JPH0374046U (enExample) | 1991-07-25 |
Family
ID=31682291
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13499889U Pending JPH0374046U (enExample) | 1989-11-21 | 1989-11-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0374046U (enExample) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53105956A (en) * | 1977-02-28 | 1978-09-14 | Nec Corp | Structure of information process system |
| JPS53114638A (en) * | 1977-03-17 | 1978-10-06 | Fujitsu Ltd | Clock switching system |
| JPS5822461A (ja) * | 1981-07-31 | 1983-02-09 | Nec Corp | 緊急動作制御装置 |
| JPS5843021A (ja) * | 1981-09-08 | 1983-03-12 | Nec Corp | クロツク切替方式 |
-
1989
- 1989-11-21 JP JP13499889U patent/JPH0374046U/ja active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53105956A (en) * | 1977-02-28 | 1978-09-14 | Nec Corp | Structure of information process system |
| JPS53114638A (en) * | 1977-03-17 | 1978-10-06 | Fujitsu Ltd | Clock switching system |
| JPS5822461A (ja) * | 1981-07-31 | 1983-02-09 | Nec Corp | 緊急動作制御装置 |
| JPS5843021A (ja) * | 1981-09-08 | 1983-03-12 | Nec Corp | クロツク切替方式 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0374046U (enExample) | ||
| JPS6243734A (ja) | マイクロプロセツサ | |
| JPS5635254A (en) | Processor back-up system | |
| JPH0344737U (enExample) | ||
| JPS6397157U (enExample) | ||
| JPH03111945A (ja) | プログラマブル制御装置 | |
| JP3302149B2 (ja) | コンピュータシステム | |
| JPH01142057U (enExample) | ||
| JPS6133118U (ja) | 電源制御装置 | |
| JPS6336431Y2 (enExample) | ||
| JPH0440338U (enExample) | ||
| JPS63271537A (ja) | 割り込み制御装置 | |
| JPS5994160A (ja) | 複合系電子計算機システムのデ−タ等価方式 | |
| JPS6399956U (enExample) | ||
| JPH0325942U (enExample) | ||
| JPH01113747U (enExample) | ||
| JOHNSON | A class of real-time virtual memory system: A multi-faceted approach to computer system design[Ph. D. Thesis] | |
| JPH0317835U (enExample) | ||
| JPH0433145U (enExample) | ||
| JPH0325535A (ja) | オペレータコンソール | |
| JPS6418348U (enExample) | ||
| JPS5881657U (ja) | 計算機システムの異常検知装置 | |
| JPH0246242U (enExample) | ||
| JPH01172152U (enExample) | ||
| JPS6275504U (enExample) |