JPH0373446U - - Google Patents
Info
- Publication number
- JPH0373446U JPH0373446U JP13499789U JP13499789U JPH0373446U JP H0373446 U JPH0373446 U JP H0373446U JP 13499789 U JP13499789 U JP 13499789U JP 13499789 U JP13499789 U JP 13499789U JP H0373446 U JPH0373446 U JP H0373446U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- test head
- contact
- board
- peephole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000007689 inspection Methods 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000009434 installation Methods 0.000 description 3
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Measuring Leads Or Probes (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Description
第１図は本考案の一実施例を示す半導体ウエハ
ー検査装置の構成図で、Ａは断面図、ＢはＢ−Ｂ
′から見た要部平面図、第２図はテストヘツドに
コンタクトリングを取り付ける前後の状態の説明
図で、Ａは取り付け前、Ｂは取り付け途中、Ｃは
取り付け完了後、第３図は本考案の他の実施例を
示す半導体ウエハー検査装置の構成断面図、第４
図はコンタクトリングの構成斜視図、第５図は第
３図で示された半導体ウエハー検査装置の信号の
流れを示すブロツク図である。
１６……パフオーマンスボード、１６４……ラ
ンド、１７，２１……テストヘツド、１７２……
顕微鏡の覗き穴、１７３，２１１……ガイド溝、
１７４，２１２……ストツパー、１８，２０……
コンタクトリング、１８１……コンタクトピン、
１８３，２０１……ガイドピン、２０３……第１
のコンタクトピン、２０６……第２のコンタクト
ピン、２１３……中継ボード。
FIG. 1 is a configuration diagram of a semiconductor wafer inspection apparatus showing an embodiment of the present invention, where A is a cross-sectional view and B is a BB-B
Fig. 2 is an explanatory diagram of the state before and after installing the contact ring on the test head, A is before installation, B is during installation, C is after installation is completed, and Fig. 3 is an explanatory diagram of the state before and after installing the contact ring on the test head. A fourth cross-sectional view of the structure of a semiconductor wafer inspection apparatus showing another embodiment.
5 is a perspective view of the structure of a contact ring, and FIG. 5 is a block diagram showing the flow of signals in the semiconductor wafer inspection apparatus shown in FIG. 3. 16... Performance board, 164... Land, 17, 21... Test head, 172...
Microscope peephole, 173, 211...guide groove,
174,212...stopper, 18,20...
Contact ring, 181...Contact pin,
183, 201...guide pin, 203...first
contact pin, 206... second contact pin, 213... relay board.
Claims (1)
ードと電気的接続がされる着脱可能なテストヘツ
ドを備え、プローバーとテストヘツドとに顕微鏡
覗き穴が設けられた半導体ウエハー検査装置にお
いて、 前記顕微鏡の覗き穴に挿入され、前記パフオー
マンスボードに対向する底面にＩＣチツプとの入
出力信号を授受するコンタクトピンを有するとと
もに、上面に前記コンンタクトピンに同軸ケーブ
ルを介して接続されるテストポイントを有するコ
ンタクトリングを設けたことを特徴とする半導体
ウエハー検査装置。 (2) 前記パフオーマンスボードの電気信号が接
続され、前記テストヘツド内のプリント基板が実
装される中継ボードと電気信号の授受を行うコン
タクトピンを有するコンタクトリングを設けた請
求項(1)記載の半導体ウエハー検査装置。[Scope of Claim for Utility Model Registration] (1) A semiconductor wafer inspection device equipped with a removable test head that is electrically connected to a performance board mounted on a prober, and in which a microscope peephole is provided in the prober and the test head, A test point that is inserted into the peephole of the microscope, has a contact pin on the bottom surface facing the performance board for transmitting and receiving input/output signals with the IC chip, and is connected to the contact pin on the top surface via a coaxial cable. A semiconductor wafer inspection device characterized by being provided with a contact ring having: (2) The semiconductor wafer according to claim (1), further comprising a contact ring having contact pins to which electrical signals of the performance board are connected and which exchange electrical signals with a relay board on which a printed circuit board in the test head is mounted. Inspection equipment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989134997U JPH0729636Y2 (en) | 1989-11-21 | 1989-11-21 | Semiconductor wafer inspection system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989134997U JPH0729636Y2 (en) | 1989-11-21 | 1989-11-21 | Semiconductor wafer inspection system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0373446U true JPH0373446U (en) | 1991-07-24 |
| JPH0729636Y2 JPH0729636Y2 (en) | 1995-07-05 |
Family
ID=31682290
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989134997U Expired - Lifetime JPH0729636Y2 (en) | 1989-11-21 | 1989-11-21 | Semiconductor wafer inspection system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0729636Y2 (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3560907A (en) * | 1968-05-17 | 1971-02-02 | Peter V N Heller | Test connector for microminiature circuits |
| JPS57103062A (en) * | 1980-12-19 | 1982-06-26 | Fujitsu Ltd | Probe test device |
| JPS6143854A (en) * | 1984-08-08 | 1986-03-03 | Hitachi Ltd | Carrier regenerating circuit |
| JPS6178135A (en) * | 1984-09-25 | 1986-04-21 | Mitsubishi Electric Corp | Measuring device for semiconductor wafer |
-
1989
- 1989-11-21 JP JP1989134997U patent/JPH0729636Y2/en not_active Expired - Lifetime
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3560907A (en) * | 1968-05-17 | 1971-02-02 | Peter V N Heller | Test connector for microminiature circuits |
| JPS57103062A (en) * | 1980-12-19 | 1982-06-26 | Fujitsu Ltd | Probe test device |
| JPS6143854A (en) * | 1984-08-08 | 1986-03-03 | Hitachi Ltd | Carrier regenerating circuit |
| JPS6178135A (en) * | 1984-09-25 | 1986-04-21 | Mitsubishi Electric Corp | Measuring device for semiconductor wafer |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0729636Y2 (en) | 1995-07-05 |
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