JPH0284748A - Semiconductor wafer - Google Patents

Semiconductor wafer

Info

Publication number
JPH0284748A
JPH0284748A JP23770188A JP23770188A JPH0284748A JP H0284748 A JPH0284748 A JP H0284748A JP 23770188 A JP23770188 A JP 23770188A JP 23770188 A JP23770188 A JP 23770188A JP H0284748 A JPH0284748 A JP H0284748A
Authority
JP
Japan
Prior art keywords
pads
semiconductor chips
semiconductor
semiconductor chip
semiconductor wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23770188A
Other languages
Japanese (ja)
Inventor
Tadashi Iwata
正 岩田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP23770188A priority Critical patent/JPH0284748A/en
Publication of JPH0284748A publication Critical patent/JPH0284748A/en
Pending legal-status Critical Current

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To enable semiconductor chips to be electrically tested without doing any damage to the pads inside the chips by a method wherein the other pads for electrical testing of semiconductor chips are provided on the positions excluding the regions of semiconductor chips independently from the pads inside the semiconductor chips. CONSTITUTION:Within a semiconductor wafer 1 including semiconductor chips 2 provided with the required functions, pads 5 for electrical testing of the semiconductor chips 2 are provided on the positions excluding the regions of said semiconductor chips 2 independently from the pads 4 inside the semiconductor chips 2. For example, the semiconductor chips 2 with pads 4 for leading-out the required functions are arranged on a semiconductor wafer 1 while the pads 5 respectively connected to all pads 4 inside the semiconductor chips 2 are formed around respective semiconductor chips 2. Then, in order to test the electrical functions of the semiconductor chips 2 in a wafer state, a probe is brought into contact with the pads 5 around respective semiconductor chips 2 to transmit electrical signals from the probe to the pads 5 for testing the electrical functions of the semiconductor chips 2.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体ウェノ1−に関するもので、特に半導
体ウェノ1−上の半導体チップのパッドに傷をつけずに
半導体チップの電気的テストを行なうことに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor wafer 1-, and particularly to a method for electrically testing a semiconductor chip without damaging the pads of the semiconductor chip on the semiconductor wafer 1-. Concerning what you do.

〔従来の技術〕[Conventional technology]

従来の半導体ウェハーには、第3図の半導体ウェハー1
に示すように、要求される機能を有する半導体チップ2
が全面に配列されている。半導体チップ2の中には、前
記機能を半導体チップ2の外部に取り出す為に必要なパ
ッド4が形成されている。半導体チップ2の機能を外部
へ取り出す際には、必ずパッド4を介して電気信号のや
りとりを行なう。
Conventional semiconductor wafers include semiconductor wafer 1 shown in FIG.
As shown in FIG.
are arranged all over. Pads 4 necessary for extracting the above-mentioned functions to the outside of the semiconductor chip 2 are formed in the semiconductor chip 2 . When extracting the functions of the semiconductor chip 2 to the outside, electrical signals are always exchanged via the pads 4.

したがって、半導体ウェハー状態で半導体チップ20機
能の電気的テストを行なう場合には、電気的テストを行
なう為の探針を直接パッド4に接触させて電気信号な探
針からパッド4に与えていた。
Therefore, when conducting an electrical test of the function of the semiconductor chip 20 in the state of a semiconductor wafer, a probe for conducting the electrical test is brought into direct contact with the pad 4, and an electrical signal is applied from the probe to the pad 4.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

以上述べたように、従来の半導体ウェハーでは、半導体
ウェハーを電気的にテストする際に、半導体チップ内の
パッドにテストの為の探針を接触させるので、前記パッ
ドに傷がついてしまうという欠点がある。
As mentioned above, in conventional semiconductor wafers, when electrically testing a semiconductor wafer, the test probe is brought into contact with the pads inside the semiconductor chip, which has the disadvantage of damaging the pads. be.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の半導体ウェハーは、半導体チップの領載置外の
場所に、半導体チップ内のパッドとは別に、半導体チッ
プの電気的テストを行なう為のパッドを有している。
The semiconductor wafer of the present invention has a pad for electrically testing the semiconductor chip, in addition to the pads inside the semiconductor chip, at a location outside the area where the semiconductor chip is mounted.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の第1の実施例を示す図で、半導体ウェ
ハー1上には要求される機能を外部に取り出す為のパッ
ド4を有する半導体チップ2が配列されており、それぞ
れの半導体チップのまわりに半導体チップ2内のすべて
のパッド4にそれぞれ接続されているパッド5が形成さ
れている。
FIG. 1 is a diagram showing a first embodiment of the present invention, in which semiconductor chips 2 having pads 4 for extracting required functions to the outside are arranged on a semiconductor wafer 1, and each semiconductor chip Pads 5 each connected to all the pads 4 in the semiconductor chip 2 are formed around the semiconductor chip 2 .

半導体ウェハー状態で半導体チップ20機能を電気的に
テストする場合には、電気的テストを行なう為の探針を
それぞれの半導体チップ2のまわりのパッド5に接触さ
せて電気信号を探針からパッド5に与えてテストを行な
う。
When electrically testing the functions of the semiconductor chips 20 in a semiconductor wafer state, a probe for electrical testing is brought into contact with the pad 5 around each semiconductor chip 2, and an electrical signal is transmitted from the probe to the pad 5. and test it.

第2図は、本発明の第2の実施例を示す図である。FIG. 2 is a diagram showing a second embodiment of the present invention.

第1の実施例と異なる点は、第1図の半導体チップ2と
は大きさも機能も異なる半導体チップ3が半導体ウェハ
ーl上に配列されていることである。パッド5の配置は
、第1図と全く同じに形成されている。したがって、半
導体チップ20機能を電気的にテストする場合にもパッ
ド5の配置が半導体チップ1の半導体ウェハーと同じで
ある為、半導体チップ1の機能をテストするときに使用
した電気的テストをする為の探針をそのまま利用できる
という利点がある。
The difference from the first embodiment is that semiconductor chips 3, which are different in size and function from the semiconductor chips 2 in FIG. 1, are arranged on a semiconductor wafer l. The arrangement of the pads 5 is exactly the same as in FIG. Therefore, even when electrically testing the function of the semiconductor chip 20, the arrangement of the pads 5 is the same as that of the semiconductor wafer of the semiconductor chip 1. The advantage is that the probe can be used as is.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、半導体ウェハーにおいて
、半導体チップの領域以外の場所に半導体チップ内のパ
ッドとは別に、半導体チップの電気的テストを行なう為
のパッドを有することにより、半導体チップ内のパッド
に傷をつけずに半導体チップの電気的テストを行なうこ
とができる効果がある。
As explained above, the present invention provides a semiconductor wafer with a pad for electrically testing the semiconductor chip in a location other than the area of the semiconductor chip, in addition to pads in the semiconductor chip. This has the effect of making it possible to conduct electrical tests on semiconductor chips without damaging the pads.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の第1の実施例を示す平面図、第2図
は本発明の第2の実施例を示す平面図、第3図は、従来
の技術を説明する平面図である。 1・・・・・・半導体ウェハー 2,3・・・・・・半
導体チップ、4・・・・・・半導体チップ内のパッド、
5・・・・・・半導体チップ外のパッド。 代理人 弁理士  内 原   晋 第1図 第2図 第3図
FIG. 1 is a plan view showing a first embodiment of the present invention, FIG. 2 is a plan view showing a second embodiment of the present invention, and FIG. 3 is a plan view illustrating a conventional technique. . 1... Semiconductor wafer 2, 3... Semiconductor chip, 4... Pad in semiconductor chip,
5...Pad outside the semiconductor chip. Agent: Susumu Uchihara, patent attorney Figure 1 Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 要求される機能を有する半導体チップを含む半導体ウェ
ハーにおいて、前記半導体チップの領域以外の場所に、
半導体チップ内のパッドとは別に、半導体チップの電気
的テストを行なう為のパッドを有することを特徴とする
半導体ウェハー。
In a semiconductor wafer including a semiconductor chip having a required function, in a location other than the area of the semiconductor chip,
A semiconductor wafer characterized in that it has a pad for electrically testing the semiconductor chip, in addition to pads within the semiconductor chip.
JP23770188A 1988-09-21 1988-09-21 Semiconductor wafer Pending JPH0284748A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23770188A JPH0284748A (en) 1988-09-21 1988-09-21 Semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23770188A JPH0284748A (en) 1988-09-21 1988-09-21 Semiconductor wafer

Publications (1)

Publication Number Publication Date
JPH0284748A true JPH0284748A (en) 1990-03-26

Family

ID=17019227

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23770188A Pending JPH0284748A (en) 1988-09-21 1988-09-21 Semiconductor wafer

Country Status (1)

Country Link
JP (1) JPH0284748A (en)

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