JPH0359594A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To obtain the liquid crystal display device by which many persons can enjoy an image, and also, which is inexpensive by driving plural liquid crystal display panels by one driving circuit. CONSTITUTION:To a frame body 17, liquid crystal display panels 13a, 13b are attached by turning the back on each other, and to the lower part of the liquid crystal display panels 13a, 13b of the frame body 17, loudspeakers 16a, 16b are attached. Also, a backlight 18 is turned to the inside of the frame body 17 is used in common by the liquid crystal display panels 13a, 13b. In such a way, by providing two (13a, 13b) liquid crystal display panels, an image can be enjoyed by many persons, and also, since a driving circuit and the backlight are enough by one piece each, the device becomes inexpensive.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a liquid crystal display device, and particularly to an active matrix type liquid crystal display device using thin film transistors and the like.

[Conventional technology]

An active matrix type liquid crystal display device is one in which a nonlinear element (switching element) is provided corresponding to each of a plurality of pixel electrodes arranged in a matrix. Theoretically, the liquid crystal in each pixel is constantly driven (duty ratio 1.0), so compared to the so-called simple matrix method, which uses a time-division drive method, the active method has better contrast, which is especially important for color. It is becoming an indispensable technology. A typical switching element is a thin film transistor (TFT). In conventional liquid crystal display devices, Utility Model Application No. 63-6417
As shown in Publication No. 2, one liquid crystal display panel is provided6.

[Problem M that the invention attempts to solve] However, in such a liquid crystal display device, the viewing angle of the liquid crystal is narrow, so that images cannot be enjoyed by a large number of people. On the other hand, if a plurality of liquid crystal display devices are prepared, a large number of people can enjoy the images, but this requires a lot of cost. The present invention was made to solve the above-mentioned problems, and an object of the present invention is to provide an inexpensive liquid crystal display device that allows a large number of people to enjoy images. [Means to solve the problem]

To achieve this object, in the present invention, in a liquid crystal display device having a liquid crystal display panel and a drive circuit for driving the liquid crystal display panel, a plurality of the liquid crystal display panels are driven by one drive circuit.

[Effect]

This liquid crystal display device has a plurality of liquid crystal display panels and only one drive circuit.

【Example】

Hereinafter, the structure of the present invention will be described together with an embodiment in which the present invention is applied to an active matrix color liquid crystal display device. In addition, in all the figures for explaining the embodiment, parts having the same functions are given the same reference numerals, and repeated explanations thereof will be omitted. FIG. 2A is a plan view showing one pixel and its surroundings of an active matrix color liquid crystal display device to which the present invention is applied, and FIG. 2B is a cross section taken along the nB-nB cutting line in FIG. 2A and a seal portion of the display panel. Diagram showing a cross section of the vicinity, 2nd
Figure C is a sectional view taken along the NC-NC line in Figure 2A. Moreover, FIG. 3 (main part plan view) shows a plan view when a plurality of pixels shown in FIG. 2A are arranged. (Pixel Arrangement) As shown in Figure 2A, each pixel is connected to two adjacent scanning signal lines (gate signal line or horizontal signal a) GL and two adjacent video signal lines (drain signal line or vertical signal line line) DL (in the area surrounded by four signal lines). Each pixel has a thin film transistor TPT and a transparent pixel electrode ITO.
I and a storage capacitor element Cadd. Scanning signal line GL
extend in the column direction, and a plurality of them are arranged in the row direction. The video signal line DL extends in the row direction. Multiple pieces are arranged in the column direction. (Overall cross-sectional structure of display section) As shown in FIG. 2B, a thin film 1-transistor TFT and a transparent pixel electrode ITOI are formed on the lower transparent glass substrate 5UBI side with respect to the liquid crystal LC, and on the upper transparent glass substrate 5UB2 side. The 6 lower transparent glass substrates 5UBI on which the color filters FIL and the light shielding film BM forming the black matrix pattern for light shielding are formed are, for example, 1, 1
The thickness is approximately [mm]. The central part of Figure 2B shows a cross section of one pixel,
The left side shows the cross section of the left edge of the transparent glass substrates 5UBI and 5UB2 where external lead wiring exists, and the right side shows the cross section of the right edge of the transparent glass substrates 5UB1.5UB2 where no external lead wiring exists. It shows. The sealing material SL shown on the left and right sides of FIG. 2B is configured to seal the liquid crystal LC, and the transparent glass substrate 5UB1.5 excluding the liquid crystal sealing opening (not shown)
It is formed along the entire edge of UB2. The sealing material SL is made of, for example, epoxy resin. Common transparent pixel electrode IT on the upper transparent glass substrate 5UBZ side
O2 is supplied to the silver paste material SI at least in one place.
L is connected to an external lead wiring formed on the UBI side of the lower transparent glass substrate 5. This external lead wiring includes a gate electrode GT, a source electrode SDI, and a drain electrode SD2.
are formed in the same manufacturing process as each. Alignment film ○RII, 0RI2, transparent pixel electrode ITO1, common transparent pixel electrode IT○2. Protective film psv1, PSV2,
Each layer of the insulating film G is formed inside the sealing material SL. The polarizing plates POLI and POL2 are formed on the outer surfaces of the lower transparent glass substrate 5UBI and the upper transparent glass substrate 5UB2, respectively. Liquid crystal LC has a lower alignment film ○RI that sets the direction of liquid crystal molecules.
It is sealed between I and the upper alignment film ○RI2, and the seal part S
It is sealed by L. The lower alignment film 0RII is formed on the protective film psvi on the lower transparent glass substrate 5UBl side. A light shielding film BM, a color filter FIL, and a protective film P are provided on the inner surface (liquid crystal LC side) of the upper transparent glass substrate 5UB2.
SV2. A common transparent pixel electrode IT○2 (COM) and an upper alignment film 0RI2 are sequentially laminated. This liquid crystal display device is constructed by separately forming layers on the lower transparent glass substrate 5UBl side and the upper transparent glass substrate 5UBZ side, and then overlapping the upper and lower transparent glass substrates 5UB1.5UB2 and sealing the liquid crystal LC between them. Can be assembled. (Thin film transistor TPT> The thin film transistor TPT operates in such a way that when a positive bias is applied to the gate voltage iGT, the channel resistance between the source and drain becomes small, and when the bias is reduced to zero, the channel resistance becomes large.Thin film transistor of each pixel TPT is 3 within a pixel.
It is divided into two (plurality) of thin film transistors (divided thin film transistors) TFTI, TFT2, and TFT3. Each of the thin film transistors TPTI to TFT3 has substantially the same size (channel length and width are the same). Each of the divided thin film transistors TPTI to TFT3 mainly has a gate electrode GT.
, gate insulating film GI, i-type (intrinsic, 1ntrinsic
, a pair of source electrodes SD1 and drain electrodes SD2. Note that the source and drain are originally determined by the bias polarity between them, and in the circuit of this liquid crystal display device, the polarity is reversed during operation, so it should be understood that the source and drain are interchanged during operation. However, in the following description, for convenience, one side is fixed as a source and the other side is fixed as a drain. (Gate electrode GT> The gate electrode GT is shown in FIG. 4 (the first conductive film gl in FIG. 2A,
As shown in detail in the plan view (plan view depicting only the second conductive film g2 and the i-type semiconductor IAs), it has a shape that projects vertically from the scanning signal aGL (upward in FIGS. 2A and 4). (branched into a T-shape). Gate electrode GT is thin film transistor TPTI~TFT3
It is configured to protrude to the respective formation areas. The respective gate electrodes GT of the thin film transistors TFTI to TFT3 are integrally formed (as a common gate electrode) and are formed continuously to the scanning signal line GL. The gate electrode GT is made of a single-layer first layer so as not to create a large step in the formation region of the thin film transistor TPT.
It is composed of a conductive film g1. The first conductive film gl is, for example, a chromium (Cr) film formed by sputtering, and has a film thickness of 1000 [
λ]. As shown in FIGS. 2A, 2B, and 4, this gate electrode GT is formed to be thicker than the i-type semiconductor layer AS so as to completely cover it (as viewed from below). Therefore, when a backlight BL such as a fluorescent lamp is attached below the lower transparent glass substrate 5UBI, the gate electrode GT made of opaque or ROM forms a shadow, and the backlight light does not shine on the i-type semiconductor layer AS. , a conductive phenomenon caused by light irradiation, that is, deterioration of the off-characteristics of the thin film transistor TPT, becomes less likely to occur. Note that the original size of the gate electrode GT is the minimum required size to span between the source electrode SDI and drain electrode SD2 (including the alignment margin between the gate electrode GT, the source electrode SDI, and the drain electrode SD2). )@, and its depth length that determines the channel 1w is the ratio of the distance (channel length) L between the source electrode SDI and the drain electrode SD2, that is, what is the factor W/L that determines the mutual conductance? It is determined by The size of the gate electrode GT in this liquid crystal display device is of course made larger than the original size mentioned above. Note that if we consider only from the gate and light shielding function of the gate electrode GT, the gate electrode GT and the scanning signal line GL
may be integrally formed in a single layer, in which case aluminum (Al) containing silicon is used as the opaque conductive material.
), pure aluminum. Aluminum containing palladium (Pd) can be selected. (Scanning Signal Line GL> The scanning signal line GL is composed of a composite film consisting of a first conductive film g1 and a second conductive film g2 provided on the top of the first conductive film g1. The first conductive film g1 of the scanning signal fiGL is It is formed in the same manufacturing process as the I conductive film g1 of the electrode GT, and is configured integrally.The second conductive film g2 is made of, for example, an aluminum film formed by sputtering, and has a thickness of about 1000 to 5500 [large]. The second conductive film g2 is configured to reduce the resistance value of the scanning signal line OL and increase the signal transmission speed (improve the writing characteristics of pixel information). Furthermore, the width of the second conductive film g2 of the scanning signal line GL is configured to be smaller than the width of the first conductive film g1.In other words, the scanning signal line OL has a gradual step shape on its side wall. (Insulating film GI)> The M edge film GI is used as a gate insulating film for each of the thin film transistors TPTI to TFT3. The insulating film GI is formed in the upper layer of the gate electrode GT and the scanning signal line GL. Insulating film For example, GI is plasma C
A silicon nitride film formed by VD is used to have a thickness of about 3000 [layers]. (i All Semiconductor Layer AS> As shown in FIG. 4, the i All Semiconductor Layer AS is used as a channel formation region for each of the thin film transistors TPTI to TFT3 divided into a plurality of parts.
s is formed of an amorphous silicon film or a polycrystalline silicon film, and is formed to a thickness of about 1800 mm. This i-all-semiconductor layer AS is made of Si by changing the composition of the supplied gas.
, N, an insulating film G used as a gate insulating film
Subsequently to the formation of I, it is formed in the same plasma CVD apparatus without being exposed to the outside from the plasma CVD apparatus. Further, a P-doped N+ type semiconductor layer do (FIG. 2B) for ohmic contact is similarly formed continuously to a thickness of about 40 mm. Thereafter, the lower transparent glass substrate 5UBI is taken out from the CVD apparatus, and by photoprocessing technology, the entire semiconductor layer AS of N+ type semiconductor [dO and i is separated as shown in FIGS. 2A, 2B, and 4. Patterned into islands. The all-semiconductor layer AS is also provided between the scanning signal line GL and the video signal line DL at the intersection (crossover section), as shown in detail in FIGS. 2A and 4. The i-all semiconductor layers AS at this intersection are configured to reduce short circuits between the scanning signal line GL and the video signal line DL at the intersection. (Source electrode SDI, drain electrode SD2>The source electrode SD1 and drain electrode SD2 of each of the thin film transistors TPTI to TFT3 divided into a plurality of
As shown in detail in FIGS. 2B, 2B, and 5 (a plan view depicting only the first to third conductive films di to d3 in FIG. 2A), It is being Each of the source electrode SDI and drain electrode SD2 is
A first conductive film d1, a second conductive film d2, and a third conductive film d3 are stacked in JllI order from the lower layer side in contact with the N" type semiconductor JIdO. The upper conductive film di of the source electrode SDI, The second conductive film d2 and the third conductive film d3 are
The first conductive film dL of drain electrode 1=isD2 is formed in the same manufacturing process as the second conductive film d2 and the third conductive film d3.The first conductive film d1 is made of a chromium film formed by sputtering,
It is formed with a film thickness of 500 to 1000 [A] (in this liquid crystal display device, a film thickness of about 600 [A]). The thicker the chromium film is, the greater the stress will be, so
The film thickness is formed within a range of about 0.00 [persons]. The chromium film has good contact with the N+ type semiconductor NdO. The chromium film constitutes a so-called barrier layer that prevents aluminum of the second conductive film d2, which will be described later, from diffusing into the N+ type semiconductor ldo. As the first conductive film d1, in addition to the chromium film, a high melting point metal (
Mo, Ti, Ta, W) films, high melting point metal silicide (M
o S l 2, Ti S i2. TaSi2
, WSi, ) film. After patterning the first conductive film d1 by photo processing, the N+ type semiconductor 1dO is removed using the same photo processing mask or using the first conductive film di as a mask. That is, the portion of the N+ type semiconductor layer do remaining on the i-type half-substrate layer AS except for the first conductive film di is removed by the self-alignment line. At this time, since the N1 type semiconductor ldo is etched so that its entire thickness is removed, the i type semiconductor device S is also slightly etched on its surface, but the extent can be controlled by the etching time. Thereafter, the second conductive film d2 is formed by sputtering aluminum to a thickness of about 3000 to 5500 mm (in this liquid crystal display device, the thickness is about 3500 mm). Aluminum film has less stress than chrome film,
It is possible to form a thick film, and the source electrode SD1,
It is configured to reduce the resistance values of the drain electrode SD2 and the video signal line DL. The second conductive film d2 may be formed of an aluminum film containing silicon or copper (Cu) as an additive in addition to the aluminum film. After patterning the second conductive film d2 by photo processing technology,
A third conductive film d3 is formed. This third conductive film d3 is a transparent conductive film (Induim-
It is made of Tin-Oxide ITO (NESA film) and is formed with a film thickness of 1000 to 2000 [A] (in this liquid crystal display device, a film thickness of about 1200 [A]). This third conductive film d3 includes a source electrode SDI and a drain electrode S
In addition to configuring D2 and the video signal line DL, the transparent pixel electrode ITOI is also configured. First conductive film di of source electrode SDI, drain electrode SD
Each of the two first conductive films d1 has an upper second conductive film d1.
The conductive film d2 and the third conductive film d3 extend further inward (into the channel region). That is, the first conductive film d1 in these parts is the second conductive film d2. The structure is such that the gate length of the thin film transistor TPT can be defined independently of the third conductive film d3. The source electrode SDI is connected to the transparent pixel electrode ITOI. The source electrode SD1 has a step shape in the i-type semiconductor layer AS (a step corresponding to the sum of the thickness of the first conductive film g1, the thickness of the N+ type semiconductor layer do, and the thickness of the i-type semiconductor JAS). It is structured along. Specifically, the source electrode SDI is. A first conductive film d1 is formed along the step shape of the i-type semiconductor layer AS, and the side to be connected to the transparent pixel electrode IT○1 is formed on the upper part of the first conductive film d1 in a smaller size than that of the first conductive film d1. It is composed of a second conductive film d2 and a third conductive film d3 connected to the first conductive film d1 exposed from the second conductive film d2. The second conductive film d2 of the source electrode SDI cannot be formed thickly because the chromium film of the first conductive film d1 increases stress, and cannot overcome the stepped shape of the i-type semiconductor layer AS.
It is configured to overcome the type semiconductor layer AS. In other words, the step coverage is improved by forming the second conductor tlllld2 thickly. Since the second conductive film d2 can be formed thickly, it greatly contributes to reducing the resistance value of the source electrode SDI (the same applies to the train electrode SD2 and the video signal 1iDL). The third conductive film d3 is the second conductive film d2
Since the step shape caused by the i-type semiconductor layer AS cannot be overcome, the second conductive film d2 is configured to be connected to the exposed first conductive film d1 by reducing the size of the second conductive film d2. The first conductive film d1 and the third conductive film d3 not only have good adhesion but also have a small step shape at the connection between them, so that the source electrode SDI and the transparent pixel electrode ITO
It is possible to reliably connect to I. (Transparent pixel electrode ITOI> The transparent pixel electrode ITOI is provided for each pixel and constitutes one of the pixel electrodes of the liquid crystal display section. The transparent pixel electrode IT○1 is a thin film transistor TPTI to TFT3 that is divided into a plurality of pixels. 3 corresponding to each of
Two divided transparent pixel electrodes E1. It is divided into E2 and E3. Split transparent pixel type [! El to E3 are each connected to the source electrode SDI of the thin film transistor TPT. Each of the divided transparent pixel electrodes E1 to E3 is patterned to have substantially the same area. In this way, the thin film transistor TPT of one pixel is divided into a plurality of thin film transistors TPTI to TFT3, and each of the divided transparent pixel electrodes E1 to E3 is connected to each of the divided thin film transistors TPTI to TFT3. Even if a part of the pixel (for example, the thin film transistor TFTI) becomes a point defect, it is no longer a point defect when looking at the entire pixel (the thin film transistor TPT2
and thin film transistor TFT3 are not defective), so
The probability of point defects can be reduced, and defects can be made difficult to see. Furthermore, by configuring each of the divided transparent pixel electrodes El-E3 to have substantially the same area, the divided transparent pixel electrode E
It is possible to make the respective liquid crystal capacitances Cpix formed by each of the pixels 1 to E3 and the common transparent pixel electrode ITO2 uniform. (Protective film PSVI> A protective film PSVI is provided over the thin film transistor TPT and the transparent pixel electrode ITOI. The protective film PSVI is mainly formed to protect the thin film transistor TPT from moisture etc., and has high transparency and Use a material with good moisture resistance.The protective film PSVI is made of, for example, a silicon oxide film or a silicon nitride film formed using a plasma CVD device, and is formed to a thickness of about 8000 [layers]. (Light-shielding film BM> A shielding film BM is provided on the upper transparent glass substrate 5U82 side to prevent external light (light from above in FIG. 2B) from entering the i-type semiconductor layer AS used as a channel formation region.
is provided, and the shielding film BM has a pattern as shown by hatching in FIG. Note that FIG. 6 shows the third conductive film d3. made of an ITO film in FIG. 2A. FIG. 3 is a plan view depicting only a color filter FIL and a light shielding film BM. The light shielding film BM is formed of a film having a high light shielding property, such as an aluminum film or a chromium film, and in this liquid crystal display device, the chromium film is formed by sputtering to a thickness of approximately 1300 mm. Therefore, i of thin film transistors TFTI to TFT3
The type semiconductor layer AS is sandwiched between the upper and lower light shielding films BM and the thick gate electrode GT, and that portion is not exposed to external natural light or backlight light. The light shielding film BM is formed around the pixel as shown by the hatched area in FIG. There is. Therefore, the outline of each pixel becomes clear due to the light shielding film BM, and the contrast is improved. In other words, the light shielding film BM has two functions: shielding the i-type semiconductor layer AS and serving as a black matrix. Note that it is also possible to attach the backlight to the upper transparent glass substrate 5UB2 side and make the lower transparent glass substrate 5UBI the viewing side (externally exposed side). (Common transparent pixel electrode ITO2)) The common transparent pixel electrode ITO2 is connected to the lower transparent glass substrate 5U.
Opposing the transparent pixel electrode ITOI provided for each pixel on the BI side, the optical state of the liquid crystal LC changes in response to the potential difference (electric field) between each pixel electrode ITOI and the common transparent pixel electrode ITO2. The configuration is such that a common voltage V con is applied to this common transparent pixel electrode ITO2. The common voltage vcoI11 is an intermediate potential between the low-level drive voltage Vdm1n and the high-level drive voltage Vdmax applied to the video signal line DL. (Color filter FIL> The color filter FIL is constructed by coloring a dyed base material made of a resin material such as acrylic resin with dye.The color filter FIL has a dot for each pixel at a position facing the pixel. It is formed into a shape (Fig. 7) and is dyed differently (
Figure 7 shows the third conductive film layer d3 and color filter F in Figure 3.
Only the IL is drawn, and each of the R, G, and B color filters FIL is 45' 135°, with a cross hatch), and the color filter FIL is the 6th color filter FIL.
Transparent pixel electrode ITOI (El~E3) as shown in the figure
The light shielding film BM is formed to be thick so as to cover all of the transparent pixel electrode ITOl, and the light shielding film BM is formed inside the peripheral part of the transparent pixel electrode ITOL so as to overlap with the color filter FIL and the edge part of the transparent pixel electrode TOI. Color filter FIL can be formed as follows. First, a dyed base material is formed on the surface of the upper transparent glass substrate 5UB2, and the dyed base material other than the red filter formation area is removed using photolithography technology. Thereafter, the dyed base material is dyed with a red dye and subjected to a fixing treatment to form a red filter R. Next, a green filter G and a blue filter B are sequentially formed by performing similar steps. (Protective film PSV2> The protective film PSV2 is provided to prevent the dyes that dye the color filter FIL into different colors from leaking into the liquid crystal LC.The protective film PSV2 is made of a transparent resin material such as acrylic resin or epoxy resin. (Pixel Arrangement) As shown in FIGS. 3 and 7, a plurality of pixels of the liquid crystal display section are arranged in the same column direction as the direction in which the scanning signal line GL extends. Xi, X2°X3.X4... Each pixel column Xi, X2.X3.X
4. Each pixel of... is a thin film transistor TF
The arrangement positions of TI to TFT3 and divided transparent pixel electrodes E1 to E3 are configured to be the same. In other words, odd pixel row Xi
, Odd pixel columns Xi, X3. . . , adjacent even-numbered pixel columns X2 . X4. . . are arranged in odd-numbered pixel columns Xi, X3 . . . . each pixel is made up of pixels that are symmetrically turned upside down with respect to the extending direction of the video signal line DL. That is, pixel row X2.
X4. Each pixel of... is a thin film transistor T
The arrangement position of PTI~TFT3 is on the right side, transparent pixel electrode El
-E3 is arranged on the left side. Then, pixel row X2. Each pixel of X4°... is a pixel column Xi
,X3. ... are shifted (shifted) by half a pixel interval in the column direction. In other words, if each pixel interval of the pixel row X is i, o (i, o pitch), then the pixel interval of the next pixel row
0.5 pixel interval (0,
5 pitch) is off. The video signal line DL extending in the row direction between each pixel is configured to extend in the column direction by a half pixel interval (0.5 pitch) between each pixel column X. As a result, as shown in FIG. 7, the pixel in the previous pixel row Pixels on which color filters are formed (for example, pixel row
4) are spaced apart by 1.5 pixels (1.5 pitch), and the RGB color filters FIL are arranged in a triangular arrangement. Color filter FI
The triangular arrangement structure of RGB of L can improve the color mixing of each color, and therefore can improve the resolution of a color image. Moreover, since the video signal line DL extends in the column direction by only half a pixel interval between each pixel column X, it does not intersect with the adjacent video signal line DL. Therefore, video signal line D
It is possible to eliminate the routing of L and reduce its occupied area, and it is also possible to eliminate detours of the video signal line DL and eliminate the multilayer wiring structure. (Whole Equivalent Circuit of Display Device) An equivalent circuit of this liquid crystal display device is shown in FIG. XiG, Xi+IG, . . . are video signal lines DL connected to pixels in which the green filter G is formed. XiB, Xi+IB, . . . are video signal lines DL connected to the pixels in which the blue filter B is formed. Xi+IR, Xi+2R, . . . are video signal lines DL connected to pixels in which the red filter R is formed. These video signals gDL are selected by a video signal drive circuit. Yi is a scanning signal line OL that selects the pixel column X1 shown in FIGS. 3 and 7. Similarly, Yi+1. Yi+2. . . , each of pixel rows X2 . X3. . . . is a scanning signal line GL that selects each of the following. These scanning signal lines OL are connected to the on-board scanning circuit. (Structure of storage capacitor element Cadd) Each of the divided transparent pixel electrodes E1 to E3 receives the adjacent scanning signal, 1!, at the end opposite to the end connected to the thin film transistor TPT. It is bent into an L shape so as to overlap with GL. As is clear from FIG. 2C, in this superposition, each of the divided transparent pixel electrodes E1 to E3 is used as one electrode PL2, and the adjacent scanning signal line GL
A holding capacitance element (electrostatic capacitance element) Cadd is configured with the other electrode PLI as the other electrode PLI. The dielectric film of this storage capacitor element Cadd is made of the same layer as the insulating film GI used as the gate insulating film of the thin film transistor TPT. As is clear from FIG. 4, the storage capacitor element Cadd is formed in the portion of the gate line GL where the first conductive film g1 is widened. Note that the first conductive film gl in the portion intersecting with the video signal line DL is made thin in order to reduce the probability of short circuit with the video signal line DL. A transparent pixel electrode ITOI is formed between each of the divided transparent pixel electrodes E1 to E3 and the electrode PLI, which are overlapped to form the storage capacitor element Cadd, when the transparent pixel electrode ITOI passes over the one-step shape like the source electrode SDI. The second conductive film d2 and an island region made up of the second conductive film d2 are provided so that the second conductive film d2 is not disconnected. This island region is configured to be as small as possible so as not to reduce the area (aperture ratio) of the transparent pixel electrode ITO1. (Equivalent circuit of storage capacitor element Cadd and its operation) 2nd A
FIG. 9 shows an equivalent circuit of the pixel shown in the figure. In FIG. 9, Cgs is a parasitic capacitance formed between the gate electrode GT and source electrode SDI of the thin film transistor TPT. The dielectric film of the parasitic capacitance Cgs is the M edge film GI. Cpix is a liquid crystal capacitor formed between the transparent pixel electrode ITOI (PIX) and the common transparent pixel electrode IT02 (COM). The dielectric film of liquid crystal capacitor Cpix is liquid crystal LC.
1 protective film PSVI and alignment films 0RII and 0RI2. Vlc is a midpoint potential. When the thin film transistor TPT switches, the storage capacitance element Cadd has a midpoint potential (pixel electrode potential) Vlc.
It works to reduce the influence of gate potential change ΔVg on. This situation can be expressed by a formula. It becomes as follows. Δ Vlc= (Cgs/(Cgs+Cadd+Cpi
x))X ΔVgHere, ΔVlc represents the change in midpoint potential due to ΔVg.
It causes a DC component added to C, but the holding capacity Cadd
The larger the value, the smaller the value. Further, the storage capacitor element Cadd also has the effect of lengthening the discharge time, so that video information is stored for a long time after the thin film transistor TPT is turned off. Reducing the DC component applied to the liquid crystal LC can improve the life of the liquid crystal LC and reduce so-called burn-in, in which the previous image remains when switching between liquid crystal display screens. As mentioned above, since the gate electrode GT is made large enough to completely cover the i-type semiconductor layer AS, the source electrode SDI
, the overlap area with the drain electrode SD2 increases, the parasitic capacitance Cgs increases, and the midpoint potential v1C increases.
has the opposite effect of becoming more susceptible to the influence of the gate (scanning) signal Vg. However, by providing the storage capacitor element Cadd, this disadvantage can also be eliminated. The storage capacitance of the storage capacitor element Cadd is 4 to 8 times the liquid crystal capacitance Cpix (4・Cpix
<Cadd<8・Cpix), superposition capacitance Cgs
8 to 32 times (8・Cgs<Cadd<32
・Set to a value of about Cgs). (Connection method of holding capacitor element Cadd electrode line) As shown in FIG. 8, the final stage scanning signal line OL (or first stage scanning signal line GL) used only as a capacitor electrode line Connect to (Vcom). As shown in FIG. 2B, the common transparent pixel electrode ITO2 is connected to an external wiring at the peripheral edge of the liquid crystal display device by means of a silver paste material SL. Moreover, some of the conductive layers (gl and g2) of this external lead wiring are formed in the same manufacturing process as the scanning signal line GL. As a result, the final stage scanning signal line (capacitor electrode line) OL. It can be easily connected to the common transparent pixel electrode ITO2. Alternatively, as shown by the dotted line in FIG. 8, the final stage (first stage) scanning signal line (capacitive electrode line) OL may be connected to the first stage (final stage) scanning signal line OL. Note that this connection can be made by internal wiring within the liquid crystal display section or external lead wiring. (DC Cancellation by Scanning Signal of Storage Capacitor Element Cadd) This liquid crystal display device is based on the DC cancellation method (DC cancellation method) described in Japanese Patent Application No. 62-95125 previously filed by the applicant of the present application. As shown in FIG. 10 (time chart), by controlling the drive voltage of the scanning signal line GL, the DC component applied to the liquid crystal LC can be further reduced. In FIG. 10, vi is the drive voltage of an arbitrary scanning signal line OL, and V i +1 is the drive voltage of the scanning signal line GL at the next stage. Vee is a low-level drive voltage Vdin applied to the video signal line DL.
, Vdd is a high-level drive voltage V d wax applied to the video signal line DL. Voltage change Δv of midpoint potential v1c (see Figure 9) at each time t: tl-t4
1 to Δv4 is the total capacitance of pixels C=Cgs+Cpix
+Cadd, it is expressed by the following formula. ΔV z = (Cgs/C)・V 2ΔV, =+(C
gs/C)-(V1+V2)-(Cadd/C)・V
2 Δv=-(Cgs/C)・vl +(Cadd/C)(V1+V2) ΔV,=-(Cadd/C)・V 1Here, if the drive voltage applied to the scanning signal line GL is sufficient. (see below)

(See note), the DC voltage applied to the liquid crystal LC is expressed by the following formula. Δv3+ΔV, -(Cadd-V 2- Cgs-V
1)/C Therefore, Cadd-v2=Cgs-v
When it is 1, the DC voltage applied to the liquid crystal LC is 0. [Note] At times t1 and t2, the change in drive voltage Vi affects the midpoint potential v1c, but during the period from t2 to t3, the midpoint potential Vlc is made the same potential as the video signal potential through the signal line Xi ( (sufficient writing of video signals), the potential applied to the liquid crystal LC is almost determined by the potential immediately after the thin film transistor TPT is turned off (the off period of the thin film transistor TPT is overwhelmingly longer than the on period).
In calculating the DC component applied to C, the period t1 to t3 can be almost ignored, and it is sufficient to consider the potential immediately after the thin film transistor TPT is turned off, that is, the influence of the transient period at times t3 and t4. The polarity is reversed for each line, and the DC component due to the video signal itself is assumed to be zero. In other words, in the DC cancellation method, the reduction in the midpoint potential Vlc caused by the parasitic capacitance Cgs is compensated for by the retention capacitance element Ca
dd and the next-stage scanning signal line (capacitive electrode line) GL, the DC component applied to the liquid crystal LC can be made extremely small. As a result, the life of the liquid crystal LC of the liquid crystal display device can be improved. Of course, when the gate electrode GT is increased in size to improve the light shielding effect, the storage capacitance of the storage capacitance element Cadd may be increased accordingly. FIG. 1A is a block diagram showing a control circuit of an active matrix color liquid crystal display device according to the present invention. In the figure, 1 is an antenna. 2 is a tuner IF amplifier connected to antenna 1; 3 is a video signal amplifier that amplifies the video signal of the signal received by antenna 1; 4 is horizontal synchronization; 5 is vertical synchronization;
6 is a scan electrode drive circuit, 7 is a buffer circuit connected to the scan electrode drive circuit 6, and the scan electrode drive circuit 6 and the like constitute a vertical scan circuit. 8 is a gradation signal generator, 9 is an analog multiplexer, 10 is an A/D converter, 11 is a line memory, 12 is a buffer circuit connected to the analog multiplexer 9, and the analog multiplexer 9 etc. constitute a video signal drive circuit. The drive circuit consists of a vertical scanning circuit and a video signal drive circuit. 13a, 13
b- is a liquid crystal display panel connected to the buffer circuit 7.12, 14 is an audio signal amplifier for amplifying the audio signal of the signal received by the antenna 1, 15 is a buffer circuit connected to the audio signal amplifier 14, 16a , 16b are speakers connected to the buffer circuit 15. FIG. 1B is a schematic cross-sectional view showing an active matrix color liquid crystal display device having the control circuit shown in FIG. 1A. In the figure, 17 is a frame body, and liquid crystal display panels 13a and 13b are attached to the frame body 17 with their backs facing each other.
, 13b are attached with speakers 16a and 16b. 18 is a backlight directed into the frame body 17; The backlight 18 is shared by the liquid crystal display panels 13a and 13b. This liquid crystal display device has two liquid crystal display panels (
13a, 13b), the video can be enjoyed by a large number of people, and since only one driving circuit and one backlight 18 are provided, the cost is low. Although the invention made by the present inventor has been specifically explained above based on the above embodiments, this invention is not limited to the above embodiments, and can be modified in various ways without departing from the gist thereof. Of course. For example, in the above embodiment, an inverted staggered structure is shown in which gate electrode formation→gate insulating film formation→semiconductor layer formation→source/drain electrode formation, but the present invention can also be applied to a staggered structure in which the vertical relationship or the order of formation is reversed. It is valid. Furthermore, in the above embodiment, the case where two liquid crystal display panels (13a, 13b) were provided with their backs facing each other was explained, but the back side of the train seat (for spectators in the rear seats)
or on the side (for standing audience).

【Effect of the invention】

As explained above, since the liquid crystal display device according to the present invention has a plurality of liquid crystal display panels, a large number of people can enjoy images, and since only one drive circuit is provided, it is inexpensive. It is. As described above, the effects of this invention are remarkable.

[Brief explanation of drawings]

FIG. 1A is a block diagram showing a control circuit of an active matrix color liquid crystal display device according to the present invention;
FIG. 1B is a schematic cross-sectional view showing an active matrix color liquid crystal display device having the control circuit shown in FIG. 1A, and FIG.
FIG. 2B is a plan view of a main part showing one pixel of the liquid crystal display section of a matrix type color liquid crystal display device, and FIG.
A cross-sectional view of the part cut along the IIB cutting line and the area around the seal part,
2C is a sectional view taken along the NC-NC cutting line in FIG. 2A, FIG. 3 is a plan view of a main part of a liquid crystal display section in which a plurality of pixels shown in FIG. 2A are arranged, and FIGS. Figure 7 is a plan view depicting only the predetermined layers of the pixel shown in the figure, Figure 7 is a plan view of the main part depicting only the pixel electrode layer and color filter layer shown in Figure 3, and Figure 8 is an active matrix color system. An equivalent circuit diagram showing the liquid crystal display part of the liquid crystal display device, FIG. 9 is the second
Fig. 10 is an equivalent circuit diagram of the pixel shown in Fig. A, and Fig. 10 is a time chart showing the drive voltage of the scanning signal line by the DC cancellation method. SUB...Transparent glass substrate GL...Scanning signal line DL...Video signal line GI...Insulating film GT...Gate electrode AS...I-type semiconductor layer SD...Source electrode or drain electrode psv...
Protective film BM... Light shielding film LC... Liquid crystal TPT... Thin film transistor IT○... Transparent pixel electrodes g, d... Conductive film Cadd... Holding capacitor element Cgs... Parasitic capacitance Cpix...・Liquid crystal capacitors 13a, 13b...Liquid crystal display panel No. 1A Figure 3 0 + 3b

Claims (1)

[Claims] 1. A liquid crystal display device comprising a liquid crystal display panel and a drive circuit for driving the liquid crystal display panel, characterized in that a plurality of the liquid crystal display panels are driven by one drive circuit.