JPH0353317A - Printer interface circuit - Google Patents

Abstract

PURPOSE:To reduce the load of a CPU and to improve the data transfer speed by using the hardware including the 1st and 2nd timers to produce the answer signals. CONSTITUTION:At application of power supply, a CPU 11 reads the data 'bit1' - 'bit3' out of a nonvolatile memory 12 and sets the 1st bit data 'bit1' to a 1st timer 15 which is used to measure the transmission start time of an answer signal 19. The 2nd and 3rd bit data 'bit2' and 'bit3' are set to a 2nd timer 16 which is used to measure the transmission end time of the signal 19. Then the data on the 1st and 2nd times which are stored in the memory 12 are controlled so that the start timing and the width of an answer pulse are controlled. As a result, the transmission timing and the pulse width of the answer signal are changed in accordance with the types of devices. Then the effective transfer of data is attained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a printer interface used for outputting a response signal from a printer side in response to a data transmission signal output from a host device. Regarding circuits.

[Conventional technology]

When a data transmission signal is sent from a host device, it is widely practiced that the printer side sends a response signal to confirm that it has received the data transmission signal. Conventionally, when a data sending signal is sent to a printer interface circuit, a program timer is used to control the sending timing of a response signal and the sending time of that signal.

[Problem to be solved by the invention]

In this way, conventionally, when generating a response signal, the printer ink face circuit uses a program to check whether certain conditions for generating the response signal are met, and from the moment the conditions are met, a timer using the program execution time starts the process. The pulse width of the signal was set.

For this reason, there is a problem in that it is not possible to change the sending timing of the response signal or its pulse width depending on the device, and it is not possible to perform efficient data transfer.

SUMMARY OF THE INVENTION An object of the present invention is to provide a printer ink face circuit that can change the timing and pulse width of a response signal to desired values.

[Means to solve the problem]

In the present invention, (i) a first timer that is started by receiving a data transmission signal from a host device and measures a first time; and (ii) a second timer that is started when the first timer ends and measures a first time. a second timer for timing (i
ii) a non-volatile memory storing first and second times as adjustable amounts of time, respectively; and (iv) times for setting these times stored in the non-volatile memory into first and second timers, respectively. a setting means; (v) a first
The blink interface circuit is provided with a response pulse generating means that starts sending out a response pulse in response to the data sending signal when the second timer ends, and sets the pulse width of the response pulse until the second timer ends.

That is, in the present invention, the start timing of the response pulse created by the response pulse creation means and the pulse width of this response pulse can be adjusted by adjusting the data related to the first and second times stored in the nonvolatile memory. be able to do so.

〔Example〕

Hereinafter, the present invention will be explained in detail with reference to Examples.

FIG. 1 shows the structure of a printer interface circuit in one embodiment of the present invention.

As shown in this figure, the printer ink face circuit includes a CPU (Central Processing Unit) 11 for executing various programs.
A nonvolatile memory 12 is connected to I+.

Further, a data sending signal 13 is supplied to the second input port I2 from a host device (not shown).

Similarly, the data signal 14 from the higher-level device is supplied to the third human-powered port I3.

The input terminal IN of the first timer 15 is connected to the output port 01 of this CPU II. The output terminal OUT of the first timer 15 is connected to the input terminal IN of the second timer 16 and one input terminal of the OR game 17. The output terminal OUT of the second timer 16 is connected to the other input terminal of the OR gate 17. The output terminal of the OR gate 17 is a flip-flop circuit (FF)}8
, and a response signal l9 is output from its output terminal.

In the printer interface circuit configured as described above, the nonvolatile memory 12 is composed of a RAM (Random Access Memory) backed up by a battery (not shown), and is configured to control the transmission timing of the response signal l9 and its pulse. It is supposed to set the width.For this,
The nonvolatile memory 12 stores first to third bit data "bitl" to "bit3". When the power is turned on, the CPU 11 reads these data "bitl" to "b" stored in the non-volatile memory 12.
Read it3″ and obtain the first bit data bitl”
is set in the first timer l5. The first timer 15 is used to measure the sending start time of the response signal 19. 2nd and 3rd bit data “bit2
”, “bit3” is set in the second timer 16.

The second timer l6 is used to measure the time it takes for the response signal 19 to start being sent.

Next, based on FIG. 2, the measurement control of the transmission start time of the response signal by the first timer will be explained first.

FIG. 2a shows changes in the data sending signal. As mentioned above, the CPU II inputs the data “bit bi~”
Set bit 3” to each timer l5 and 16,
It is waiting for the data sending signal l3 to be sent from the host device. When the data sending signal 13 is received by the input port I2 and rises at time t, the CPU II reads the contents of the third input port I3 and outputs the data signal l.
Receive 4. And CPU 1 is the output port ○,
starts the first timer l5.

The activated first timer 15 measures different times depending on whether the content of the first bit data "bitl" is "OFF" or "ON". In other words,゛○FF
”, as shown in Figure 2 b-1, time t1
The first timer 15 starts when time TI has elapsed since
counts up, and pulse 2 is output from its output terminal OUT.
Outputs 1-1. This pulse 21-1 is input to the second timer 16, and after the set time T2, the pulse 22-1 is output from its output terminal ○UT (Fig. 2b
-2). These pulses 21-1 and 22-1 pass together through an OR gate 17 and are supplied to a flip-flop circuit 18. The flip-flop circuit 18 inverts its output at the rising edge of the first pulse 2l-1, and returns it to its original state at the rising edge of the next pulse 221, thereby producing a response signal 1%-1 (FIG. 2 b3). ) is output.

On the other hand, the content of the first bit data “bitl” is “O
N'', the first timer 15 starts from time t to time T.
, it counts up and outputs a pulse 21-2 from its output terminal OUT (Fig. 2 c-1).
. In this embodiment, this time T3 is set longer than the time opening T1. Therefore, the pulse 21-2 is supplied to the second timer l6 at a delayed stage. Assuming that the data set in the second timer 16 is the same, the second timer 16
After time T2 after inputting 1-2, its output terminal OU
A pulse 22-2 is output from T (FIG. 2 C-2). These pulses 21-{, 22-1 pass through the OR gate 17 and are supplied to the flip-flop circuit 18, so the flip-flop circuit 18 outputs a response signal 19-2 delayed in time from the response signal 19-1. (C-3 in Figure 2) will be output.

Next, based on FIG. 3, the change of the pulse width of the response signal by the second degree timer will be explained.

As explained in FIG. 2, when the data sending signal 13 is received by the human-powered boat I2 and rises at time t1 as shown in FIG. 3a, from this point on, the first timer 15
is started. The time it takes for the first timer 15 to count up can be set in two ways as shown in Figure 2, but this time will be displayed all at once as T4 (Figure 3 b). ). In this case, the first timer 15 counts up when a time T has elapsed from time tl, and a pulse 213 is output from its output terminal OUT. This pulse 21-3 is input to the second timer 16, and after the set time T5, the output terminal OU
A pulse 22-3 is output from T (Fig. 2 b-2)
.

By the way, this time Ts is based on the second and third bit data “bit2” set in the second timer 16.
, changes depending on "bit3". That is, data "b"
When both "it2" and "bit3" are "OFF", that is, when these bits are "00", a pulse 223 as shown by the solid line in FIG. 3C is output, and as a result, the flip-flop circuit 18 outputs a response signal 19-3 having the longest pulse width as shown in FIG. 3d.

On the other hand, “bit.” is “OFF” and bit3”
is “ON”, that is, these binotos are “01”
In this case, a pulse 223 is output such that the time T is shortened by one unit as indicated by the broken line in FIG. 3C. As a result, the flip-flop circuit 18 outputs a response signal 19-4 having the second longest pulse width, as shown in FIG. 3e.

Next, “bit2” is “○N” and “bit3-” is “OFF”.
”, that is, when these bits are “10”, a pulse 22-3 is output such that the time T5 is shortened by two units as indicated by the dashed line in FIG. From the circuit l8, as shown in FIG.
The response signal l9-5 having the longest pulse width is output.

Finally, if both "bit2" and "bit3" are "○N", that is, if these bits are "11",
Pulse 22-3 as shown by the leftmost dashed line in Figure 3C
As a result, the flip-flop circuit l8 outputs a response signal l9- with the shortest pulse width as shown in FIG. 3g.
6 will be output.

In this way, in this embodiment, the transmission start time of the response signal 19 is adjusted by the data "bitl" set in the first timer l5, and the data "bit," and " The transmission end time of the response signal 19 is adjusted in four stages by bit3''. Furthermore, by changing the number of bits of data set in these timers, more detailed adjustments can be made.

〔Effect of the invention〕

As explained above, according to the present invention, the response signal is created by hardware using the first and second timers, so compared to the conventional printer interface circuit in which this is done by software. The load on the CPU can be reduced.

As a result, even if the data transfer speed between the host device and the printer increases, the response signal can be output regardless of the program execution time, and the data transfer speed can be improved.

[BRIEF DESCRIPTION OF THE DRAWINGS] The drawings are for explaining one embodiment of the present invention, of which FIG. 1 is a block diagram showing the structure of the printer ink face circuit, and FIG. 2 is a block diagram showing the response signal of this circuit. Various waveform diagrams showing the principle of adjustment of the sending timing. FIG. 3 is various waveform diagrams showing the principle of adjustment of the pulse width of the response signal of this circuit. l1...CPU, 12...Nonvolatile memory, 13...Data sending signal, 15...First timer, 16... Second
timer, 18... flip-flop circuit, l
9...Response signal.

Claims (1)

[Claims] A first timer that is activated by receiving a data transmission signal from a host device and measures a first time; and a second timer that is activated when the first timer ends and measures a second time. 2 timers; non-volatile memory storing first and second times as adjustable amounts of time; and times for setting these times stored in non-volatile memory in the first and second timers, respectively; and a response pulse generating means that starts sending out a response pulse in response to the data sending signal when the first timer finishes counting, and sets the pulse width of the response pulse until the second timer finishes counting. A printer interface circuit characterized by: