JPH0352232B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to the structure of a semiconductor variable capacitance element used in an electronic circuit.

Conventionally, ceramic trimmer capacitors have been known as variable capacitors (trimmer capacitors) used in crystal oscillators, etc., but there have been no practical variable capacitors using semiconductors. The present invention realizes a practical variable capacitance element using a semiconductor. FIGS. 1 and 2 show diagrams of the principle of a semiconductor variable capacitance element according to the present invention.

The principle diagram of a semiconductor variable capacitance element, which has a floating electrode covered with an insulating film on a semiconductor substrate and insulated from the outside, and whose capacitance is varied by accumulating charge in the floating electrode, is shown in Figures 1a and b. is shown. Figure 1a
1 is a plan view thereof, and FIG. 1b is a sectional view thereof. In this structure, in order to increase the maximum capacitance value and widen the capacitance variable range, the capacitance between the floating electrode 3 and the capacitive electrode 4 is increased. The insulating film between the floating electrode 3 and the capacitor electrode 4 is made by thermally oxidizing the floating electrode 3 made of polysilicon. However, the oxide film obtained by thermally oxidizing polysilicon has poor insulation properties and has a thickness of 2000 Å.
Sufficient insulation cannot be obtained with a film thickness below. Therefore, in order to increase the capacitance between the floating electrode 3 and the capacitive electrode 4, the electrode area is increased.

The principle diagram of a semiconductor variable capacitance element smaller than the semiconductor variable capacitance element shown in FIG. 1 is shown in FIGS. 2a and 2b.

In the structure shown in FIGS. 2a and 2b, the n-type capacitor electrode 26 is formed as an n-type diffusion layer provided in a p-well on an n-type substrate. The insulating film between the floating electrode 23 and the capacitor electrode 26 is obtained by thermally oxidizing the silicon substrate. The insulating film obtained by thermally oxidizing the substrate silicon has excellent insulation properties and has a thickness of 50 Å.
Sufficient insulation can be obtained even with a relatively thin film. Therefore, even if the electrode area between the floating electrode 23 and the capacitive electrode 26 is small, a variable capacitance element with a large maximum capacitance can be obtained, and miniaturization has become possible.

However, the semiconductor variable capacitance element having the structure shown in FIGS. 2a and 2b still has drawbacks. When a polarizable substance (most of which is considered to be water) is adsorbed to the insulating film on the floating electrode 23, the potential of the floating electrode 23 is affected and the capacitance value changes over time.

In addition, PSG was applied as a passivation film on the surface of the semiconductor variable capacitance element shown in Fig. 2a and b.
Even when the membrane is coated, the capacitance value changes over time because the PSG membrane has polarizability. This change in capacitance over time is a very major drawback of the semiconductor variable capacitance element shown in FIG.

FIG. 3 is a diagram showing an embodiment of the present invention. Third
Figure a is a plan view thereof, and Figure 3b is a sectional view thereof. A floating electrode 33 is provided on an n-type semiconductor substrate 31 and covered with an insulating film 32 and insulated from the outside. A first capacitor electrode 34 is provided on the floating electrode 33 with an insulating film 32 interposed therebetween. The lower semiconductor substrate 3 is placed on the floating electrode 33.
1, there is a p-type diffusion layer 35 for separation from the substrate 31, and a second capacitor electrode 36 (n-type diffusion layer) is further provided on the substrate surface within the p-type diffusion layer 35.

The first capacitor electrode 34 and the second capacitor electrode 36 are electrically connected. Further, on the substrate surface below the floating electrode 33, a p-type diffusion layer 37 for insulation isolation is provided.
In addition, there is a floating electrode 33 in the p-type diffusion layer 37.
There is a variable capacitance electrode 38 (n-type diffusion layer) that exchanges charges.

The insulating film between the second capacitor electrode 36 and the floating electrode 33 is obtained by thermally oxidizing the silicon substrate. The insulating film obtained by thermally oxidizing the silicon substrate has excellent insulating properties, and sufficient insulating properties can be obtained even with a film thickness of about 50 Å. Therefore, even if the electrode area between the second capacitance electrode 36 and the floating electrode 33 is small, a variable capacitance element with a large maximum capacitance can be obtained. Furthermore, since the capacitance between the first capacitor electrode 34 and the floating electrode 33 is added, the semiconductor variable capacitor is smaller than the semiconductor variable capacitor shown in FIG. 2 and has a larger maximum capacitance.

The insulating film between the first capacitor electrode 34 and the floating electrode 33 is obtained by thermally oxidizing the floating electrode 33 made of polysilicon, so it has poor insulation properties and has a thickness of 2000 Å.
Sufficient insulation cannot be obtained unless the film is thicker than this.
Since the area is small, the capacity is small. but,
Compared to the structure shown in FIG. 2, it can be made several times smaller.

In addition, since the first capacitor electrode 34 covers the floating electrode 33, a shield plate is used to prevent the potential of the floating electrode 33 from changing due to moisture or PSG of the polarized substance adhering to the surface of the semiconductor variable capacitor. It fulfills its role, and changes in capacitance over time due to the attachment of polarized substances are no longer observed. This effect is very noticeable.

FIG. 4 is a diagram showing another embodiment of the present invention. FIG. 4a is a plan view thereof, and FIG. 4b is a sectional view thereof. An insulating film 42 is formed on an n-type semiconductor substrate 41.
There is a floating electrode 43 that is covered with and insulated from the outside. A p-well 49 is formed on the surface of the semiconductor substrate 41, which is a p-type diffusion layer whose surface state is accumulated, depleted, or reversed by the charges accumulated in the floating electrode 43. A first capacitor electrode 44 is provided on the floating electrode 43 with an insulating film 42 interposed therebetween. A second capacitor electrode 4 is provided on the surface of the semiconductor substrate 41 below the floating electrode 43.
6 (p-type diffusion layer). If the impurity concentration of the second capacitor electrode 46 is made high enough, the second capacitor electrode 4
It is also possible to prevent the surface region of the substrate No. 6 from being depleted or inverted by the charging of the floating electrode 43.

The first capacitor electrode 44 and the second capacitor electrode 46 are electrically connected. Further, on the surface of the semiconductor substrate 41 under the floating electrode 43, a capacitance variable electrode 48 (n-type diffusion layer) that exchanges charge with the floating electrode 43 is provided.
There is. Further, a p-type diffusion layer 47 for electrically separating the variable capacitance electrode 48 from the semiconductor substrate 41
There is.

The embodiment shown in FIG. 4 is similar to the embodiment shown in FIG. Capacitor electrode 46 is connected to semiconductor substrate 4
Since the insulating film is formed as a diffusion layer on the surface of the floating electrode 43, sufficient insulation can be obtained even with a thin film thickness of about 50 Å. Therefore, a semiconductor variable capacitance element that is small and has excellent capacitance stability can be produced.

In the embodiment shown in FIG. 4, the capacitance used is the capacitance between the capacitor electrode (the combination of the first capacitor electrode 44 and the second capacitor electrode 46) and the p-well 49.

Furthermore, it is obvious that both the embodiment shown in FIG. 3 and the embodiment shown in FIG. 4 are equivalent even if the p-type is replaced with an n-type, and the n-type is replaced with a p-type.

As is clear from the above description, according to the present invention, it is possible to realize a semiconductor variable capacitance element that is small in size, has a wide capacitance variable range, and has no change in capacitance over time.

[Brief explanation of drawings]

FIG. 1a is a plan view of a first principle diagram of a semiconductor variable capacitance element according to the present invention, and FIG. 1b is a sectional view thereof. FIG. 2a is a plan view of a second principle diagram of a semiconductor variable capacitance element according to the present invention, and FIG. 2b is a sectional view thereof. FIG. 3a is a plan view of an embodiment of the present invention, and FIG. 3b is a sectional view thereof. FIG. 4a is a plan view of another embodiment of the invention, and FIG. 4b is a sectional view thereof. 1... Semiconductor substrate, 2... Insulating oxide film, 3...
Floating electrode, 4... Capacitive electrode, 21... Semiconductor substrate, 22... Insulating oxide film, 23... Floating electrode, 2
6... Capacitive electrode, 31... Semiconductor substrate, 32...
Insulating oxide film, 33... floating electrode, 34... first capacitor electrode, 36... second capacitor electrode, 49... p-well.

Claims (1)

[Claims] 1. A floating electrode surrounded by an insulating film, a first well of a second conductivity type is formed in a surface portion of a semiconductor substrate of a first conductivity type under the floating electrode, and a first well of a second conductivity type is formed in a surface portion of the first well. a first diffusion region of the first conductivity type that forms capacitive coupling with the floating electrode; and a first diffusion region extending over the floating electrode through a part of the insulating film and connected to the first diffusion region. a second capacitor electrode of the second conductivity type on a surface portion of the semiconductor substrate outside the first well below the floating electrode;
a capacitance variable electrode formed by forming a well and a second diffusion region of the first conductivity type in the surface portion of the second well, and applying a positive and negative capacitance variable voltage to the capacitance variable electrode. By applying a voltage, charges are injected into or extracted from the floating electrode to increase or decrease the capacitance of a depletion layer formed in a surface portion of the semiconductor substrate outside the first and second wells under the floating electrode, and A semiconductor variable capacitance element that obtains various capacitance values that change in an analog manner between a capacitance electrode and a region where the depletion layer is formed.