JPH0351979Y2 - - Google Patents

Info

Publication number
JPH0351979Y2
JPH0351979Y2 JP1982180167U JP18016782U JPH0351979Y2 JP H0351979 Y2 JPH0351979 Y2 JP H0351979Y2 JP 1982180167 U JP1982180167 U JP 1982180167U JP 18016782 U JP18016782 U JP 18016782U JP H0351979 Y2 JPH0351979 Y2 JP H0351979Y2
Authority
JP
Japan
Prior art keywords
heat dissipation
dissipation board
resin
thickness
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1982180167U
Other languages
English (en)
Japanese (ja)
Other versions
JPS5983052U (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1982180167U priority Critical patent/JPS5983052U/ja
Publication of JPS5983052U publication Critical patent/JPS5983052U/ja
Application granted granted Critical
Publication of JPH0351979Y2 publication Critical patent/JPH0351979Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP1982180167U 1982-11-29 1982-11-29 半導体装置 Granted JPS5983052U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1982180167U JPS5983052U (ja) 1982-11-29 1982-11-29 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1982180167U JPS5983052U (ja) 1982-11-29 1982-11-29 半導体装置

Publications (2)

Publication Number Publication Date
JPS5983052U JPS5983052U (ja) 1984-06-05
JPH0351979Y2 true JPH0351979Y2 (enrdf_load_stackoverflow) 1991-11-08

Family

ID=30390716

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1982180167U Granted JPS5983052U (ja) 1982-11-29 1982-11-29 半導体装置

Country Status (1)

Country Link
JP (1) JPS5983052U (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02290032A (ja) * 1989-12-14 1990-11-29 Hitachi Ltd レジンモールド型半導体装置の製造方法

Also Published As

Publication number Publication date
JPS5983052U (ja) 1984-06-05

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