JPH0345958B2 - - Google Patents

Info

Publication number
JPH0345958B2
JPH0345958B2 JP18145983A JP18145983A JPH0345958B2 JP H0345958 B2 JPH0345958 B2 JP H0345958B2 JP 18145983 A JP18145983 A JP 18145983A JP 18145983 A JP18145983 A JP 18145983A JP H0345958 B2 JPH0345958 B2 JP H0345958B2
Authority
JP
Japan
Prior art keywords
sampling clock
counter
output
transmitted
sampling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP18145983A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6072416A (ja
Inventor
Nobuaki Oochi
Yutaka Moryama
Hideo Kuroda
Naoki Takegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP58181459A priority Critical patent/JPS6072416A/ja
Publication of JPS6072416A publication Critical patent/JPS6072416A/ja
Publication of JPH0345958B2 publication Critical patent/JPH0345958B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
    • H03L7/189—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop comprising a D/A converter for generating a coarse tuning voltage

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP58181459A 1983-09-29 1983-09-29 標本化クロツク再生方式 Granted JPS6072416A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58181459A JPS6072416A (ja) 1983-09-29 1983-09-29 標本化クロツク再生方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58181459A JPS6072416A (ja) 1983-09-29 1983-09-29 標本化クロツク再生方式

Publications (2)

Publication Number Publication Date
JPS6072416A JPS6072416A (ja) 1985-04-24
JPH0345958B2 true JPH0345958B2 (enrdf_load_stackoverflow) 1991-07-12

Family

ID=16101122

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58181459A Granted JPS6072416A (ja) 1983-09-29 1983-09-29 標本化クロツク再生方式

Country Status (1)

Country Link
JP (1) JPS6072416A (enrdf_load_stackoverflow)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0413897Y2 (enrdf_load_stackoverflow) * 1985-10-19 1992-03-30
JP2752613B2 (ja) * 1986-07-08 1998-05-18 日本電気株式会社 クロツク再生回路
JPS6374283A (ja) * 1986-09-17 1988-04-04 Nec Corp クロツク再生方式
JPH0770993B2 (ja) * 1987-12-18 1995-07-31 富士通株式会社 ディジタル・ループフィルタ
JP2988418B2 (ja) * 1997-03-12 1999-12-13 日本電気株式会社 クロック同期化システム

Also Published As

Publication number Publication date
JPS6072416A (ja) 1985-04-24

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