JPH0344702B2 - - Google Patents
Info
- Publication number
- JPH0344702B2 JPH0344702B2 JP60001111A JP111185A JPH0344702B2 JP H0344702 B2 JPH0344702 B2 JP H0344702B2 JP 60001111 A JP60001111 A JP 60001111A JP 111185 A JP111185 A JP 111185A JP H0344702 B2 JPH0344702 B2 JP H0344702B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- transmission signal
- clock
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
- 
        - H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/407—Bus networks with decentralised control
 
- 
        - H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L2012/4026—Bus for use in automation systems
 
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP60001111A JPS61159841A (ja) | 1985-01-08 | 1985-01-08 | クロツク同期方式 | 
| US06/775,565 US4689785A (en) | 1984-09-14 | 1985-09-13 | Data transmission system | 
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP60001111A JPS61159841A (ja) | 1985-01-08 | 1985-01-08 | クロツク同期方式 | 
Publications (2)
| Publication Number | Publication Date | 
|---|---|
| JPS61159841A JPS61159841A (ja) | 1986-07-19 | 
| JPH0344702B2 true JPH0344702B2 (OSRAM) | 1991-07-08 | 
Family
ID=11492354
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date | 
|---|---|---|---|
| JP60001111A Granted JPS61159841A (ja) | 1984-09-14 | 1985-01-08 | クロツク同期方式 | 
Country Status (1)
| Country | Link | 
|---|---|
| JP (1) | JPS61159841A (OSRAM) | 
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| US20090219654A1 (en) * | 2006-02-02 | 2009-09-03 | Michael A Pugel | Two Level Current Limiting Power Supply System | 
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| JPS5765946A (en) * | 1980-10-13 | 1982-04-21 | Hitachi Ltd | Mfm demodulating circuit | 
| JPS5794915A (en) * | 1980-12-03 | 1982-06-12 | Matsushita Electric Ind Co Ltd | Demodulating circuit | 
- 
        1985
        - 1985-01-08 JP JP60001111A patent/JPS61159841A/ja active Granted
 
Also Published As
| Publication number | Publication date | 
|---|---|
| JPS61159841A (ja) | 1986-07-19 | 
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