JPH0341473Y2 - - Google Patents

Info

Publication number
JPH0341473Y2
JPH0341473Y2 JP18473785U JP18473785U JPH0341473Y2 JP H0341473 Y2 JPH0341473 Y2 JP H0341473Y2 JP 18473785 U JP18473785 U JP 18473785U JP 18473785 U JP18473785 U JP 18473785U JP H0341473 Y2 JPH0341473 Y2 JP H0341473Y2
Authority
JP
Japan
Prior art keywords
cap
substrate
semiconductor
metal
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP18473785U
Other languages
English (en)
Japanese (ja)
Other versions
JPS6292648U (ko
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18473785U priority Critical patent/JPH0341473Y2/ja
Publication of JPS6292648U publication Critical patent/JPS6292648U/ja
Application granted granted Critical
Publication of JPH0341473Y2 publication Critical patent/JPH0341473Y2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP18473785U 1985-11-30 1985-11-30 Expired JPH0341473Y2 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18473785U JPH0341473Y2 (ko) 1985-11-30 1985-11-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18473785U JPH0341473Y2 (ko) 1985-11-30 1985-11-30

Publications (2)

Publication Number Publication Date
JPS6292648U JPS6292648U (ko) 1987-06-13
JPH0341473Y2 true JPH0341473Y2 (ko) 1991-08-30

Family

ID=31132695

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18473785U Expired JPH0341473Y2 (ko) 1985-11-30 1985-11-30

Country Status (1)

Country Link
JP (1) JPH0341473Y2 (ko)

Also Published As

Publication number Publication date
JPS6292648U (ko) 1987-06-13

Similar Documents

Publication Publication Date Title
US7180012B2 (en) Module part
JP3554350B2 (ja) 集積化バッテリマウントを有する表面装着可能集積回路パッケージ
US7374969B2 (en) Semiconductor package with conductive molding compound and manufacturing method thereof
US6448644B1 (en) Flip chip assembly with via interconnection
US6406939B1 (en) Flip chip assembly with via interconnection
JP2002198395A (ja) 半導体装置及びその製造方法、回路基板並びに電子機器
JP3482850B2 (ja) 半導体装置及びその製造方法、回路基板並びに電子機器
JPH09321173A (ja) 半導体装置用パッケージ及び半導体装置とそれらの製造方法
CN105244327A (zh) 电子装置模块及其制造方法
JPH0341473Y2 (ko)
JPS60241244A (ja) ピングリッドアレイ型半導体装置の製造方法
JPH01168045A (ja) 気密封止回路装置
JPH06204385A (ja) 半導体素子搭載ピングリッドアレイパッケージ基板
JP3099768B2 (ja) 電子部品組立体およびその製造方法
JP3446695B2 (ja) 半導体装置
US20220278085A1 (en) Method for connecting an electrical device to a bottom unit by using a solderless joint
JP3331146B2 (ja) Bga型半導体装置の製造方法
JP3117688B2 (ja) 表面実装用の半導体パッケージ
JP3914478B2 (ja) Lsiチップ実装可撓配線板
CN104981092A (zh) 表面镀层和包括该表面镀层的半导体封装件
JPH046197Y2 (ko)
CN115274467A (zh) 芯片的封装方法以及封装机构
JPH0311903Y2 (ko)
JP3039485B2 (ja) 表面実装用の半導体パッケージ及びその製造方法
JPH0513381B2 (ko)