JPH033943B2 - - Google Patents
Info
- Publication number
- JPH033943B2 JPH033943B2 JP59009086A JP908684A JPH033943B2 JP H033943 B2 JPH033943 B2 JP H033943B2 JP 59009086 A JP59009086 A JP 59009086A JP 908684 A JP908684 A JP 908684A JP H033943 B2 JPH033943 B2 JP H033943B2
- Authority
- JP
- Japan
- Prior art keywords
- length
- gate
- mask
- diffusion region
- diffusion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000009792 diffusion process Methods 0.000 claims description 49
- 239000000463 material Substances 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 12
- 239000004065 semiconductor Substances 0.000 claims description 12
- 238000005259 measurement Methods 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 7
- 238000012360 testing method Methods 0.000 claims description 4
- 230000000873 masking effect Effects 0.000 claims 2
- 239000008186 active pharmaceutical agent Substances 0.000 description 10
- 238000000691 measurement method Methods 0.000 description 9
- 238000013461 design Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 239000012535 impurity Substances 0.000 description 4
- 238000007689 inspection Methods 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 238000004626 scanning electron microscopy Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59009086A JPS60153137A (ja) | 1984-01-20 | 1984-01-20 | 半導体装置の寸法測定方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59009086A JPS60153137A (ja) | 1984-01-20 | 1984-01-20 | 半導体装置の寸法測定方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60153137A JPS60153137A (ja) | 1985-08-12 |
JPH033943B2 true JPH033943B2 (ko) | 1991-01-21 |
Family
ID=11710802
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59009086A Granted JPS60153137A (ja) | 1984-01-20 | 1984-01-20 | 半導体装置の寸法測定方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60153137A (ko) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100336792B1 (ko) * | 2000-05-25 | 2002-05-16 | 박종섭 | 실리사이드막 제조공정의 평가를 위한 시험 패턴의 구조 |
KR100819558B1 (ko) | 2006-09-04 | 2008-04-07 | 삼성전자주식회사 | 반도체 저항소자들 및 그의 형성방법들 |
US8151441B1 (en) * | 2008-03-27 | 2012-04-10 | Western Digital (Fremont), Llc | Method for providing and utilizing an electronic lapping guide in a magnetic recording transducer |
-
1984
- 1984-01-20 JP JP59009086A patent/JPS60153137A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS60153137A (ja) | 1985-08-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4413271A (en) | Integrated circuit including test portion and method for making | |
US3465427A (en) | Combined transistor and testing structures and fabrication thereof | |
CN113257790B (zh) | 漏电测试结构及漏电测试方法 | |
US4638341A (en) | Gated transmission line model structure for characterization of field-effect transistors | |
US6150669A (en) | Combination test structures for in-situ measurements during fabrication of semiconductor devices | |
US4956611A (en) | Electrical measurements of properties of semiconductor devices during their manufacturing process | |
US4978923A (en) | Electrical measurements of the profile of semiconductor devices during their manufacturing process | |
US3650020A (en) | Method of monitoring semiconductor device fabrication | |
JPH033943B2 (ko) | ||
JPH04233746A (ja) | 半導体集積回路における接点寸法測定方法 | |
JP4361292B2 (ja) | 半導体装置の評価用teg | |
JPH0586858B2 (ko) | ||
US5780316A (en) | Linewidth control apparatus and method | |
JPS5953702B2 (ja) | 電界効果トランジスタの諸元を測定する方法 | |
JP2007300046A (ja) | 半導体評価装置及びそれを用いた評価方法 | |
KR0179172B1 (ko) | 확산평가용 테스트패턴을 이용한 테스트방법 | |
JPS61139701A (ja) | パタ−ン寸法測定回路 | |
JPH0729952A (ja) | Mos型半導体装置及びこれを用いたアライメント検査方法 | |
Lozano et al. | Measurement of misalignment using a triangular MOS transistor | |
KR100293711B1 (ko) | 미세 게이트 선폭을 갖는 모스트랜지스터의 특성검사를 위한 모스트랜지스터 테스트 패턴을 구비하는 반도체 장치 | |
JPS59105375A (ja) | 半導体装置 | |
JP2548780B2 (ja) | Mos形トランジスタ定数測定用パターン | |
JPS6217390B2 (ko) | ||
Swaving et al. | Analysis of the determination of the dimensional offset of conducting layers and MOS transistors | |
JPS5851410B2 (ja) | マスク合わせ精度測定法 |