JPH0338756B2 - - Google Patents

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Publication number
JPH0338756B2
JPH0338756B2 JP54099743A JP9974379A JPH0338756B2 JP H0338756 B2 JPH0338756 B2 JP H0338756B2 JP 54099743 A JP54099743 A JP 54099743A JP 9974379 A JP9974379 A JP 9974379A JP H0338756 B2 JPH0338756 B2 JP H0338756B2
Authority
JP
Japan
Prior art keywords
semiconductor
annealing
hydrogen
electrode
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP54099743A
Other languages
Japanese (ja)
Other versions
JPS5623784A (en
Inventor
Shunpei Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP9974379A priority Critical patent/JPS5623784A/en
Publication of JPS5623784A publication Critical patent/JPS5623784A/en
Publication of JPH0338756B2 publication Critical patent/JPH0338756B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1876Particular processes or apparatus for batch treatment of the devices
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)
  • Light Receiving Elements (AREA)

Description

【発明の詳細な説明】 本発明は、半導体の一表面に密接して透明電極
を形成するとともに、この導電性電極と前記半導
体とにレーザまたはそれと同様の強光エネルギを
照射することにより光アニールを行うことを目的
としている。
DETAILED DESCRIPTION OF THE INVENTION The present invention involves forming a transparent electrode in close contact with one surface of a semiconductor, and optically annealing the conductive electrode and the semiconductor by irradiating the conductive electrode and the semiconductor with laser or similar strong light energy. The purpose is to do the following.

本発明はかかる光アニールを水素またはハロゲ
ン元素が添加された珪素、ゲルマニユームまたは
それらの一方に対し酸素、窒素、炭素、スズまた
は鉛が添加された非単結晶半導体に対し実施せし
めることを目的としている。
The object of the present invention is to perform such photoannealing on a non-single crystal semiconductor made of silicon, germanium, or one of them to which oxygen, nitrogen, carbon, tin, or lead is added. .

本発明は族元素を主成分とする非単結晶半導
体とその半導体の上面または下面に設けられた添
加物を含有する酸化物または窒化物を主成分とす
る透明電極とを有する半導体装置に対し、非単結
晶半導体を構成する元素または添加物とが互いに
ドープしあい半導体と電極とを一体化または実質
的に一体化させることを目的としている。
The present invention relates to a semiconductor device having a non-single-crystal semiconductor mainly composed of group elements and a transparent electrode mainly composed of an oxide or nitride containing an additive provided on the upper or lower surface of the semiconductor. The purpose is to dope the elements or additives constituting the non-single crystal semiconductor with each other so that the semiconductor and the electrode are integrated or substantially integrated.

従来より半導体装置に発生した再結合中心また
は準位に対しては熱アニールがその密度を減少さ
せる方法として知られている。これは300〜700℃
の温度における水素または不活性ガス中における
アニール(徐熱)により、半導体特に単結晶半導
体またはこの上部に絶縁ゲイト型電解効果半導体
装置等のゲイト絶縁物を設けたいわゆるMIS構造
(金属−絶縁物特に酸化珪素−半導体特に珪素)
の半導体装置において、界面の遅い準位を相殺し
たりまたは単結晶半導体中の格子歪を除去してい
た。
Conventionally, thermal annealing has been known as a method for reducing the density of recombination centers or levels generated in semiconductor devices. This is 300~700℃
By annealing (heat slowing) in hydrogen or inert gas at a temperature of silicon oxide - semiconductors, especially silicon)
In semiconductor devices, it has been used to cancel slow levels at interfaces or remove lattice distortion in single crystal semiconductors.

また高温アニールとして、700〜1200℃例えば
1000℃により単結晶半導体中にホウ素(B)、リン
(P)、砒素(As)等を注入し、その後のアニー
ルにより、この注入により発生した無定型状態を
もとあつた如く単結晶化することが知られてい
た。
For high temperature annealing, e.g. 700~1200℃
Boron (B), phosphorus (P), arsenic (As), etc. are implanted into a single crystal semiconductor at 1000°C, and through subsequent annealing, the amorphous state generated by this implantation is transformed into a single crystal as if it were warm. It was known that

しかしこれらのいずれにおいても、その基本思
想においてはより単結晶化することによりその結
晶中の不対結合手またはベイカンシ(空穴)を消
滅させることを前提としているものである。
However, in all of these, the basic idea is to eliminate dangling bonds or vacancies in the crystal by making it more monocrystalline.

本発明はかかる従来より知られた熱アニール方
法ではなく、レーザ光またはそれと同様の強光エ
ネルギ(以下総称してL−アニールという)を半
導体に加え、その結果半導体特に半導体表面また
はその近傍の半導体をキユアせんとしたものであ
る。
Rather than using such conventionally known thermal annealing methods, the present invention applies laser light or similar intense light energy (hereinafter collectively referred to as L-annealing) to a semiconductor, and as a result, This is what I wanted to do.

さらに本発明はかかるL−アニールが単結晶よ
りも非単結晶に対して有効であり、かつこの非単
結晶即ちCVD法等の方法により基板上に形成さ
れた多結晶またはアモルフアス半導体またはグロ
ー放電法、プラズマCVD法等により形成された
水素を含有したアモルフアスまたは結晶粒径が10
〜100Åの微小径を有する多結晶に対して特に有
効である。
Further, the present invention provides that such L-annealing is more effective for non-single crystals than for single crystals, and for non-single crystals, that is, polycrystalline or amorphous semiconductors formed on a substrate by a method such as a CVD method, or a glow discharge method. , hydrogen-containing amorphous amorphous or crystal grain size formed by plasma CVD method etc.
It is particularly effective for polycrystals with microscopic diameters of ~100 Å.

かかる非単結晶半導体はきわめて多数の不対結
合手を一般に有しているため、不純物が1019
1021cm-3の多量にドープされた実質的に導体とし
て用いる場合、またはかかる非単結晶半導体中に
その被膜の形成と同時にその不対接合手と水素と
を結合させて中和させることにより半導体として
用いる場合が知られている。しかし前者に関して
は、その不純物の量を1020cm-3〜50原子%と多量
にドープするとその不純物が析出し、いわゆる偏
析をおこし、不純物の塊を半導体中に発生させ、
電気的に何等活性にならなくなつてしまう。即
ち、その半導体中での活性度(半導体中のPまた
はN型に活性になつた量/半導体中に混入してい
る不純物の量)がきわめて0.1〜10原子%と低く
なつてしまつた。また他方、水素がドープされた
非単結晶半導体にあつては、その系に電極を形成
したりさらに低い温度でのアニール300〜700℃を
行うと、その半導体中の水素は水素化物例えばSi
−H結合より遊離し、半導体中より外へH2とし
て放出されてしまい、熱アニールによりかえつて
再結合中心の密度が大きくなつてしまつた。
Such non-single crystal semiconductors generally have an extremely large number of dangling bonds, so impurities in the range of 10 19 to
10 21 cm -3 when used as a substantially doped conductor, or by simultaneously forming the film in such a non-single-crystal semiconductor and simultaneously bonding the unpaired junction with hydrogen to neutralize it. It is known that it is used as a semiconductor. However, regarding the former, when the impurity is doped in a large amount of 10 20 cm -3 to 50 atomic %, the impurity precipitates, causing so-called segregation, and a lump of impurity is generated in the semiconductor.
It becomes no longer electrically active. That is, its activity in the semiconductor (the amount of active P or N type in the semiconductor/the amount of impurities mixed in the semiconductor) has become extremely low, at 0.1 to 10 atomic percent. On the other hand, in the case of hydrogen-doped non-single crystal semiconductors, if electrodes are formed in the system or annealing is performed at a lower temperature of 300 to 700°C, the hydrogen in the semiconductor is converted into hydrides such as Si.
It was liberated from the -H bond and released from the semiconductor as H 2 , and the density of recombination centers increased due to thermal annealing.

本発明はかかる欠点を除去したもので、半導体
中にその固溶限界以上のPまたはN型を有する
、価または、価の添加物が添加された場
合、その活性度を結晶化を高めることにより100
%に近く高め、ひいてはその半導体中での電気伝
導度を高めること、およびこの処理または300〜
700℃の低温アニールのため、放出されてしまう
水素またはハロゲン元素の如き再結合中心中和物
を再び半導体中に化学的に活性の状態にて添加
し、不対結合手と結合せしめることにより半導体
中の再結合中心の密度を低くさせたものである。
The present invention eliminates such drawbacks, and when an additive having a P or N type above its solid solubility limit is added to a semiconductor, its activity is increased by increasing crystallization. 100
% and thus increase its electrical conductivity in the semiconductor, and this treatment or 300 ~
Due to the low-temperature annealing at 700°C, the neutralized recombination centers such as hydrogen or halogen elements are added back into the semiconductor in a chemically active state and bonded to the dangling bonds to form a semiconductor. The density of the recombination centers inside is lowered.

加えて本発明はL−アニールの際、半導体上表
面に形成される電極特に透明電極中の添加物また
はその構成元素の一部を半導体中に移動させ、そ
の境界をこれまでの面の概念より領域の概念にま
で拡大したことを特徴としている。その結果、か
かる電極下の半導体は不純物の活性度が高めら
れ、かつその電気伝導度がきわめて大きく金属と
同程度に近い伝導度を有する。即ちフエルミレベ
ルが実質的に縮退した状態にまでさせ得ることが
わかつた。
In addition, the present invention moves some of the additives or constituent elements of the electrode, particularly the transparent electrode, formed on the upper surface of the semiconductor into the semiconductor during L-annealing, and the boundary is changed from the conventional surface concept. It is characterized by its expansion to include the concept of territory. As a result, the impurity activity of the semiconductor under the electrode is increased, and its electrical conductivity is extremely high and has a conductivity close to that of metal. That is, it has been found that the Fermi level can be brought to a substantially degenerate state.

以下に本発明に用いられた本発明の実施例を図
面に従つて説明する。
Embodiments of the present invention used in the present invention will be described below with reference to the drawings.

第1図は本発明に用いられた半導体装置の実施
例である。
FIG. 1 shows an embodiment of a semiconductor device used in the present invention.

第1図Aに半導体基板1を示している。この半
導体基板は珪素等の単結晶半導体がその代表例で
ある。この単結晶半導体はその上表部にMIS構造
が設けられていても、また半導体基板の一部にイ
オン注入等により不純物がドープされていて部分
的に非単結晶になつていてもよい。本発明はかか
る半導体に対しL−アニールを行つた。L−アニ
ールに用いられたレーザはCWレーザである。出
力は10〜70Wであつた。かくすることにより、半
導体基板表面の近傍0.1〜3μの深さの半導体層が
アニールされた。しかしこのL−アニールは半導
体−絶縁膜界面またその近傍にある界面準位の消
滅にはあまり効果がなかつた。加えて半導体中を
流れる少数キヤリアによる微小電流のリーク防止
に対しては余り有効ではなかつた。
A semiconductor substrate 1 is shown in FIG. 1A. A typical example of this semiconductor substrate is a single crystal semiconductor such as silicon. This single-crystal semiconductor may have an MIS structure on its upper surface, or a portion of the semiconductor substrate may be doped with impurities by ion implantation or the like to become partially non-single-crystal. In the present invention, such a semiconductor was subjected to L-annealing. The laser used for L-annealing was a CW laser. The output was 10-70W. In this way, the semiconductor layer near the surface of the semiconductor substrate at a depth of 0.1 to 3 μm was annealed. However, this L-annealing was not very effective in eliminating the interface states at or near the semiconductor-insulating film interface. In addition, it is not very effective in preventing leakage of minute currents due to minority carriers flowing in semiconductors.

本発明はかかる欠点を除去するため、この半導
体を高周波誘導により励起された化学的に活性状
態の水素等の再結合中心中和物を有する一気圧以
下に保たれた雰囲気に浸した。(以下誘導アニー
ルという)この雰囲気の温度は室温(−70〜+
200℃)においても可能である。減圧状態の炉を
外側より0.1〜100MHz、例えば13.5MHzにて高周
波誘導により水素または水素にヘリユーム等の不
活性ガスまたは一部に塩素、弗素等のハロゲン元
素が0.01〜3原子%の濃度に混合された雰囲気を
励起した。そのため例えば水素はH2よりH、H*
またはH+と化学的に活性の発生基の水素、つま
りプラズマ状態となり得る。この水素は半導体ま
たは絶縁体中をまつたくなんの支障もなく侵入
し、半導体、絶縁体またはその界面に存在する半
導体例えば珪素の不対結合手または絶縁体例えば
酸化珪素中の珪素または酸素の不対結合手と結合
し、電気的に中和させた。
In order to eliminate such drawbacks, the present invention immerses this semiconductor in an atmosphere maintained at one atmospheric pressure or less that contains neutralized recombination centers such as hydrogen in a chemically active state excited by radio frequency induction. (hereinafter referred to as induction annealing) The temperature of this atmosphere is room temperature (-70~+
(200℃) is also possible. Hydrogen or an inert gas such as helium or a portion of halogen elements such as chlorine and fluorine are mixed to a concentration of 0.01 to 3 atomic % in a reduced pressure furnace from the outside at 0.1 to 100 MHz, for example 13.5 MHz, by high frequency induction. Excited atmosphere. Therefore, for example, hydrogen is more H than H2 , H *
Or H + and chemically active generating group hydrogen, that is, it can be in a plasma state. This hydrogen penetrates into semiconductors or insulators without any hindrance, and can be dangling bonds in semiconductors, insulators, or semiconductors such as silicon that exist at their interfaces, or dangling bonds in insulators such as silicon or oxygen in silicon oxide. It combined with the pair bond and electrically neutralized it.

その結果、イオン注入等により破壊されていた
半導体層は、欠陥密度を1022cm-3より1019〜1017
cm-3にまで下げることができ、それをさらに1/10
〜1/50に下げることができた。特にレーザアニー
ルが例えばMIS.FETのソース、ドレインを構成
する不純物層の欠陥密度をその接合部を広げるこ
となく可能であるに対し、誘導アニールはこの接
合部またはこの近傍または半導体と絶縁膜との界
面での不対結合手・準位を少なくさせることに効
果があつた。また加えて、レーザアニールが界面
上により近い領域のアニールであるのに対し、こ
のL−アニールにより処理しきれない半導体表面
より3〜10μと深い位置での欠陥を中和させてア
ニールを行うため誘導アニールはきわめて有効で
あつた。
As a result, the defect density of the semiconductor layer, which had been destroyed by ion implantation, decreased from 10 22 cm -3 to 10 19 to 10 17
cm -3 , which can be further reduced to 1/10
I was able to lower it to ~1/50. In particular, while laser annealing can reduce the defect density of the impurity layer that constitutes the source and drain of MIS.FET without widening the junction, induction annealing can reduce the defect density in the impurity layer that constitutes the source and drain of MIS. This was effective in reducing the number of dangling bonds and levels at the interface. In addition, while laser annealing anneals areas closer to the interface, L-annealing neutralizes and anneals defects at a depth of 3 to 10 μm from the semiconductor surface, which cannot be processed. Induction annealing was extremely effective.

第1図Bは基板3上に半導体層1を形成させた
ものである。この半導体または半導体層はシラン
等の珪化物全体による熱分解法を利用して500〜
900℃の温度で形成したものである。この半導体
層の作製のため、CVD(Chemical Vapor
Deposition)は本発明者の発明による特公昭51−
1389に基づいて実施した。さらにまたは発明人の
出願になるグロー放電法、プラズマCVD法等特
願昭53−067507(昭和53年6月5日提出)に基づ
いて実施した。かかる方法により形成された半導
体層1は非単結晶半導体よりなり、かつその半導
体中に選択的にまたは基板表面と概略平行にPN
接合、PIN接合、PNPN…PN接合の多重接合が
形成されており、さらにまたはかかる非単結晶半
導体には絶縁ゲイト型電界効果トランジスタまた
はその集積化した半導体装置が設けられている。
例えば本発明人の発明になる出願53−124022(昭
和53年10月7日)に記されている。
FIG. 1B shows a semiconductor layer 1 formed on a substrate 3. In FIG. This semiconductor or semiconductor layer is produced by using a thermal decomposition method using a whole silicide such as silane.
It was formed at a temperature of 900℃. In order to fabricate this semiconductor layer, CVD (Chemical Vapor
Deposition) was invented by the present inventor in 1973.
1389. Furthermore, the invention was carried out based on the glow discharge method, plasma CVD method, etc. patent application No. 53-067507 (filed on June 5, 1978) filed by the inventor. The semiconductor layer 1 formed by this method is made of a non-single crystal semiconductor, and PN is selectively formed in the semiconductor or approximately parallel to the substrate surface.
Multiple junctions such as junctions, PIN junctions, PNPN .
For example, it is described in Application No. 53-124022 (October 7, 1978), which is an invention of the present inventor.

かかる非単結晶半導体に対し、選択的にまたは
全面に第1図Aと同様のL−アニールを行うと、
半導体表面または表面より2〜3μの深さまでの
格子欠陥を格子を構成する元素同志を結合させる
ことにより1/103〜1/105にその密度をさせること
ができた。しかし同時にかかる半導体を構成して
いた元素と水素等とが結合して中和し、不対結合
手はその一部がSi−H結合よりSi−に変化し、か
えつて不対結合手を発生させてしまつた。この時
水素はSi−Hより水素同志が互いに結合しあい、
H2として半導体中に安定な状態で残つているの
みであることがわかつた。即ち、 過程1 Si−H+H−Si→Si−Si+H2 過程2 Si−H+H−Si→2Si−+H この過程2の多い場合はかえつてより結晶化を
促し、再結合中心の密度を過程1より単結晶化に
近づけたにもかかわらず、増加させてしまうこと
が判明した。換言すれば、過程1により珪素同志
が互いに共有結合をし、単結晶に近づくため電気
伝導度は約100倍にも増加したにもかかわらず、
再結合中心の密度はグロー放電等で作られた被膜
にあつてはL−アニール前が1017〜1018cm-3に対
し1018〜1019cm-3とこの半導体中での水素の含有
量は約20〜30モル%と不変であるにもかかわらず
1桁も増加してしまうことがわかつた。即ちこの
事実は遊離した水素は水素同志結合し、きわめて
短い時間では、その水素が再び珪素の不対結合手
と結合しきれないことがわかつた。
When such a non-single crystal semiconductor is selectively or entirely subjected to L-annealing similar to that shown in FIG. 1A,
The density of lattice defects on the semiconductor surface or at a depth of 2 to 3 μm from the surface can be reduced to 1/10 3 to 1/10 5 by bonding the elements constituting the lattice. However, at the same time, the elements constituting the semiconductor combine with hydrogen, etc. and are neutralized, and some of the dangling bonds change from Si-H bonds to Si-, creating dangling bonds instead. I let it happen. At this time, hydrogen bonds with each other through Si-H,
It was found that only H 2 remained in a stable state in the semiconductor. That is, Process 1 Si-H+H-Si→Si-Si+H 2 Process 2 Si-H+H-Si→2Si-+H If this process 2 occurs more often, crystallization will be promoted more and the density of recombination centers will be simpler than in process 1. It was found that even though it approached crystallization, it increased the amount. In other words, in process 1, silicon atoms form covalent bonds with each other, approaching a single crystal, and the electrical conductivity increases by approximately 100 times.
The density of recombination centers is 10 18 to 10 19 cm -3 in films made by glow discharge, etc., compared to 10 17 to 10 18 cm -3 before L-annealing, which is due to the hydrogen content in this semiconductor. It was found that although the amount remained unchanged at about 20 to 30 mol%, it increased by an order of magnitude. In other words, this fact indicates that free hydrogen bonds with itself, and that the hydrogen cannot fully bond with the dangling bonds of silicon in an extremely short period of time.

第2図は本発明の他の実施例であり、半導体上
に透明電極を形成した場合を示す。
FIG. 2 shows another embodiment of the present invention, in which a transparent electrode is formed on a semiconductor.

第2図Aにおいて、基板3はガラス、セラミツ
クまたはガラエポ等の複合材、カプトン、ポリイ
ミド等の有機物の絶縁基板、さらにステンレス・
スチール、チタンまたは窒化チタン等の導体基
板、さらに前記した絶縁基板上に選択的に導体を
設けた複合基板であつてもよい。これらの基板上
に半導体層1を非単結晶構造に形成した。この半
導体の作製方法はプラズマCVD法を用い、珪化
物を主成分とした。この半導体中にはPN接合、
PIN接合またはPNPN…PN多重接合、PINI…
IPIN多重接合を形成した。半導体層の厚さは0.5
〜5μの厚さである。さらにこの上面に酸化スズ、
酸化インジユーム、酸化アンチモンまたはそれら
の混合物をさらにまたはスズ、インジユーム、ア
ンチモンの窒化物またはそれらの混合物よりなる
導電膜2を単層または多層の電極として同様のプ
ラズマCVD法により0.05〜3μの厚さに作製した。
この導電膜は光学的に透明であり、レーザ光、可
視光に対する光吸収が小さいことを特徴としてい
る。さらにこの第2図Aに対しL−アニールを加
え、第2図Bに示される如く透明電極2と半導体
層1の境界に遷移領域5を設け、導電層の構成物
の一部であるスズまたは酸素または窒素さらに半
導体中でP型の導電型を示すインジユーム(In)、
ガリユーム(Ga)、アルミニユーム(Al)、ボロ
ン(B)または亜鉛(Zn)、カドミユーム(Cd)を添
加物として添加させた。特に単体では金属は特性
を有し、半導体中ではP型導電型を有するInまた
はInとBとの混合の添加物はこの遷移領域でのP
型の導電率をきわめて高くするのに効果があつ
た。このL−アニールはIn、Bの溶融量をその溶
融限界である1020cm-3の濃度より10〜103倍高め、
過飽和の状態でかつ偏析をおこさせないという特
徴を有し、1020cm-3〜30原子%特に0.3〜3原子%
の添加はホールに対する不純物が散乱をおこさせ
ることなく導電率を高めるのにきわめて効果があ
つた。本発明はこの後さらにこのL−アニールに
より非単結晶半導体の結晶粒界の径が10〜1000Å
より1〜50μの大きさになり、単結晶に近づくこ
とによりその伝導度を10〜103倍にできた。しか
しこのL−アニールによる不対結合手の発生を防
止するため、さらにこの後第2図Bに対し誘導ア
ニールを実施し、不対結合手に対し活性状態の水
素を添加して電気的に中和させた。かくすること
により、光電変換装置特に太陽電池等における光
が透過する側での短波長領域における光電変換効
率を向上でき、ひいては0.3〜0.5μの波長領域で
のコレクシヨン効果を95〜100%にすることがで
きた。
In FIG. 2A, the substrate 3 is an insulating substrate made of glass, a composite material such as ceramic or glass epoxy, an organic material such as Kapton or polyimide, or a stainless steel substrate.
It may be a conductor substrate made of steel, titanium, titanium nitride, or the like, or a composite substrate in which a conductor is selectively provided on the above-mentioned insulating substrate. A semiconductor layer 1 having a non-single crystal structure was formed on these substrates. This semiconductor was manufactured using a plasma CVD method using silicide as the main component. This semiconductor contains a PN junction,
PIN junction or PNPN…PN multiple junction, PINI…
IPIN multiple junctions were formed. The thickness of the semiconductor layer is 0.5
~5μ thick. Furthermore, tin oxide is added to this top surface.
A conductive film 2 further made of indium oxide, antimony oxide, or a mixture thereof or a nitride of tin, indium, antimony, or a mixture thereof is made into a single-layer or multilayer electrode with a thickness of 0.05 to 3μ by the same plasma CVD method. Created.
This conductive film is optically transparent and is characterized by low absorption of laser light and visible light. Furthermore, L-annealing is added to this FIG. 2A, and a transition region 5 is provided at the boundary between the transparent electrode 2 and the semiconductor layer 1 as shown in FIG. 2B. Oxygen or nitrogen, and indium (In), which exhibits P-type conductivity in semiconductors,
Gallium (Ga), aluminum (Al), boron (B), zinc (Zn), and cadmium (Cd) were added as additives. In particular, when used alone, metals have characteristics, and in semiconductors, In or a mixture of In and B, which has P-type conductivity, is a P-type additive in this transition region.
This was effective in making the conductivity of the mold extremely high. This L-annealing increases the melting amount of In and B by 10 to 10 3 times the concentration of 10 20 cm -3 which is the melting limit,
It has the characteristics of being in a supersaturated state and not causing segregation, and is 10 20 cm -3 to 30 at.
The addition of was extremely effective in increasing conductivity without causing scattering of impurities with respect to holes. In the present invention, the diameter of the crystal grain boundary of the non-single crystal semiconductor is further reduced to 10 to 1000 Å by this L-annealing.
By increasing the size to 1 to 50 μm and approaching a single crystal, the conductivity could be increased by 10 to 10 3 times. However, in order to prevent the generation of dangling bonds due to this L-annealing, induction annealing was further performed on Figure 2B, and hydrogen in an active state was added to the dangling bonds to electrically neutralize them. It made me feel at ease. By doing so, it is possible to improve the photoelectric conversion efficiency in the short wavelength region on the light transmitting side of a photoelectric conversion device, especially a solar cell, etc., and ultimately increase the collection effect in the 0.3 to 0.5 μ wavelength region to 95 to 100%. I was able to do that.

また透明電極下の半導体をN型にせんとするな
らば、透明電極への添加物をアンチモン(Sb)、
砒素(As)、リン(P)のごとき価の添加物ま
たはテルル(Te)、セレン(Se)の如き価の添
加物を酸化スズまたは窒化スズまたは窒化アンチ
モンの如き窒化物の透明電極に1020cm-3〜30原子
%の濃度に添加すればよい。この添加物のうち特
にSbまたはSbとPとの混合物はL−アニールに
より同様にその電極直下の半導体層をN型価し、
かつその添加量の固溶限界を越えた濃度にして偏
析をおこすことなく100%に近い活性度を持つN
型とすることができた。
Also, if you want to make the semiconductor under the transparent electrode N-type, add antimony (Sb) as an additive to the transparent electrode.
Additives such as arsenic (As), phosphorus (P) or tellurium (Te), selenium (Se) to transparent electrodes of tin oxide or nitrides such as tin nitride or antimony nitride . It may be added at a concentration of cm -3 to 30 atomic %. Among these additives, particularly Sb or a mixture of Sb and P, the semiconductor layer directly under the electrode is similarly made N-type by L-annealing.
And N has an activity close to 100% without causing segregation at a concentration exceeding the solid solubility limit of the added amount.
I was able to make it into a mold.

かくの如きL−アニールにより非単結晶半導体
は単結晶化にすすみ、また透明電極の一部成分ま
たは添加物を50〜5×103Åの深さ特に500Åの好
ききわめて浅い深さにドープできた。このドープ
面は電極ともまた半導体とも密着できる遷移領域
であり、この抵抗率は10-1〜10-4Ωcm-1と金属に
近く、量子論的にはフエルミレベルの縮退した状
態になつているものと推定される。またこの遷移
領域がうすいため、光電変換装置においては短波
長の光により励起を起こさせて電子−ホール対を
発生させ、かつその両者を再結合中心を水素等の
中和物で中和しているため、再結合することなく
電極に導くことができた。
By such L-annealing, a non-single crystal semiconductor can be made into a single crystal, and some components or additives of the transparent electrode can be doped to a very shallow depth of 50 to 5×10 3 Å, especially 500 Å. Ta. This doped surface is a transition region that can be in close contact with both electrodes and semiconductors, and its resistivity is 10 -1 to 10 -4 Ωcm -1 , which is close to that of metals, and in terms of quantum theory, it is in a degenerate state at the Fermi level. It is estimated to be. In addition, since this transition region is thin, in photoelectric conversion devices, short-wavelength light is used to cause excitation to generate electron-hole pairs, and the recombination center of both is neutralized with a neutralizing substance such as hydrogen. Therefore, it was possible to guide it to the electrode without recombining.

加えてこの発明においては、L−アニールによ
つて強制的にアニールされるため、一部の元素例
えば酸素または窒素の半導体を構成する元素と局
部反応をして局部的低級酸化珪素または窒化珪素
を作り絶縁膜にする等の不良モードを100〜150℃
の高温放置等で発生させることもなくきわめて信
頼性の優れたものであつた。
In addition, in the present invention, since the annealing is forcibly performed by L-annealing, some elements, such as oxygen or nitrogen, may locally react with the elements constituting the semiconductor to form local lower silicon oxide or silicon nitride. 100~150℃ to prevent failure mode such as making insulating film
It was extremely reliable as it did not cause any problems such as when left at high temperatures.

第2図Cは透明電極2を下側に形成し、かつ半
導体層1を上側に形成させた場合である。かかる
場合、基板3がガラス等であつた場合は下側のガ
ラス側からのレーザ光の入射によるアニールが好
ましい。しかし半導体層が0.05〜2μと薄い場合は
上側から半導体層を通してのL−アニールを行つ
てもよい。
FIG. 2C shows a case where the transparent electrode 2 is formed on the lower side and the semiconductor layer 1 is formed on the upper side. In such a case, if the substrate 3 is made of glass or the like, annealing using laser light incident from the lower glass side is preferable. However, if the semiconductor layer is as thin as 0.05-2μ, L-annealing may be performed through the semiconductor layer from above.

その結果、第2図Bと同様に第2図Dに示す如
く遷移領域5が形成された。レーザ光の照射方向
により半導体層はその結晶粒径が大きくなり、下
側から照射された場合は半導体層の下部が大きく
上部が小さい状態に、第2図Bと同様に上側から
照射されると半導体層1の上部が大きく下部が結
晶として小さくなる。これより深さ方向の結晶粒
径をレーザ光の照射向き、強さおよび照射時間に
より制御できることがわかつた。
As a result, a transition region 5 was formed as shown in FIG. 2D, similar to FIG. 2B. Depending on the direction of laser light irradiation, the crystal grain size of the semiconductor layer increases; when irradiated from below, the lower part of the semiconductor layer is large and the upper part is small; when irradiated from above, as shown in Figure 2B, The upper part of the semiconductor layer 1 becomes larger and the lower part becomes smaller as a crystal. From this, it was found that the crystal grain size in the depth direction can be controlled by the irradiation direction, intensity, and irradiation time of the laser beam.

第2図Eは透明電極を上側2、さらに下側4に
半導体層1をはさんで形成させた場合である。そ
の結果、L−アニールにより遷移領域3はP型に
また6はN型に作り、いわゆるP−N接合を適当
に作ることができる。もちろん図面の実施例にお
いては、下側電極4をSnとSbとの化合物より作
つた導体電極を基板上の下地金属上に形成し、上
側からのレーザ光の下側電極の反射を利用してこ
の電極の一部を半導体層に添加する方法をとつて
もよい。逆にNIP接合を作ることも添加物と上側
の電極が、価の添加物を有し、下側の電極が
または価の添加物を有するといい。
FIG. 2E shows a case where a transparent electrode is formed on the upper side 2 and further on the lower side 4 with a semiconductor layer 1 sandwiched therebetween. As a result, the transition region 3 is made to be P type and the transition region 6 is made to be N type by L-annealing, so that a so-called P-N junction can be suitably made. Of course, in the embodiment shown in the drawings, the lower electrode 4 is formed by forming a conductive electrode made of a compound of Sn and Sb on the base metal on the substrate, and utilizing the reflection of the laser beam from the upper side of the lower electrode. A method may be used in which a part of this electrode is added to the semiconductor layer. Conversely, it is also possible to create a NIP junction where the upper electrode has a valent additive, and the lower electrode has a valent additive.

第2図A,Cにおいては、基板上または半導体
層上にNまたはP型の導電型の半導体層を作るこ
とと、またこの半導体層内にPN接合その他の接
合を作ることを明記しなかつた。しかしCVD法、
プラズマCVD法、グロー放電法等においては、
これらの導電型の半導体は半導体層の形成と同時
にP型にあつてはBを、N型にあつてはPを不純
物として添加して作製すればよい。またこの濃度
が固溶限界を越え、また非単結晶半導体において
はその活性度が3〜30%しかないため、これらは
L−アニールを行うことにより90〜100%にする
ことができ、きわめて半導体としての構造敏感性
を有せしめることができるようになつた。
In Figures 2A and 2C, it is not specified that a semiconductor layer of N or P type conductivity is formed on the substrate or semiconductor layer, and that a PN junction or other junction is formed within this semiconductor layer. . However, the CVD method
In plasma CVD method, glow discharge method, etc.
Semiconductors of these conductivity types may be manufactured by adding B as an impurity for a P type and P as an impurity for an N type at the same time as the semiconductor layer is formed. Furthermore, since this concentration exceeds the solid solubility limit and its activity is only 3 to 30% in non-single crystal semiconductors, it can be increased to 90 to 100% by performing L-annealing, making it extremely suitable for semiconductors. It has become possible to have structural sensitivity as

第2図Gは透明電極を導体層上に選択的に設け
た一例である。
FIG. 2G is an example in which transparent electrodes are selectively provided on the conductor layer.

その結果、シアロー接合(5〜200Å)を第2
図Hの如く5,5′として作ることができる。
As a result, the shear-low junction (5 to 200 Å) was
It can be made as 5, 5' as shown in Figure H.

第3図は本発明を実施するための製造装置の一
例である。図面に基づいてこれまでどおり記述を
行いながら装置の概要を説明する。
FIG. 3 is an example of a manufacturing apparatus for carrying out the present invention. The outline of the device will be explained based on the drawings and the description as before.

基板上に半導体が形成された基板11は入力チ
ヤンバ20よりローダ28によつて出力チヤンバ
21に至る。チヤンバ23は0.01〜100torr特に
0.1〜10torrの減圧状態にて行うため、中和物の
気体を15より水素、16よりヘリユーム等の不
活性ガス、17よりHCI等のハロゲン元素が導入
される。また排気はニードルバルブ18を経て真
空ポンプ19にて排気される。レーザ光はレーザ
12よりミラー13をへて基板上に走査されてL
−アニールがなされる。この装置においてはこの
レーザが照射されると同じ位置のチヤンバの外部
に高周波誘導炉が備えつけてある。この高周波誘
導炉22は電圧加熱方式をとり、13.6MHz、
100W〜1KW用いた。この後、これら全体を300
〜700℃に低温アニールをする炉25、さらにそ
の後ろは独立して特別の高周波誘導炉24が設け
られている。この誘導炉もこの基板11と対向す
るように平行平板方式であつてもよい。かくする
ことによりチヤンバ内に放電が起こり、発生基
(ラジカル状)の化学的に活性状態にある水素そ
の他が半導体中にドープされ、不対結合手と結合
して中和させることができた。加えて従来L−ア
ニールは空気中においてのみ得なかつたが、かく
することにより水素中、不活性ガス特にヘリユー
ム中で実施することができ、その結果、照射面上
のリング状のL−アニール特有の縞模様の発生を
減少させることができた。
A substrate 11 on which a semiconductor is formed is delivered from an input chamber 20 to an output chamber 21 by a loader 28 . Chamber 23 is especially 0.01~100torr
Since the reaction is carried out under a reduced pressure of 0.1 to 10 torr, hydrogen as a neutralization gas is introduced from 15, an inert gas such as helium is introduced from 16, and a halogen element such as HCI is introduced from 17. Further, the exhaust gas is exhausted by a vacuum pump 19 via a needle valve 18. The laser beam is scanned from the laser 12 through the mirror 13 onto the substrate.
- Annealing is performed. In this device, a high frequency induction furnace is installed outside the chamber at the same position where the laser is irradiated. This high frequency induction furnace 22 uses a voltage heating method and has a 13.6MHz,
100W to 1KW was used. After this, all these are 300
A furnace 25 for low-temperature annealing at ~700°C is provided, and a special high-frequency induction furnace 24 is provided independently behind the furnace 25. This induction furnace may also be of a parallel plate type so as to face the substrate 11. This caused a discharge in the chamber, and hydrogen and other chemically active groups of the generated groups (radicals) were doped into the semiconductor, bonding with the dangling bonds and neutralizing them. In addition, conventionally, L-annealing could only be performed in air, but by doing so, it can be performed in hydrogen, an inert gas, especially helium, and as a result, a characteristic of ring-shaped L-annealing on the irradiated surface is achieved. It was possible to reduce the occurrence of striped patterns.

本発明においては、L−アニールに用いられた
のはQスイツチパルス発振レーザまたはCWレー
ザを用いたが、これと同様の効果をもたらすもの
にフラツシユ等の発生をキセノン等のランプを用
いて行つてもよい。その基板はきわめて速い昇温
と降温を行うことにより、半導体または半導体中
の添加物のミクロな移動は高温の実質的に溶融状
態で行い得ても不純物の偏析等大きな移動は行い
得ず、熱アニール法における固溶限界以上の濃度
の不純物または添加物を半導体中に析出させるこ
となく添加させることを特徴としている。
In the present invention, a Q-switched pulse oscillation laser or a CW laser was used for L-annealing, but it is also possible to generate flash etc. using a xenon lamp or the like to produce similar effects. Good too. The temperature of the substrate is raised and cooled extremely rapidly, and even though microscopic movement of the semiconductor or additives in the semiconductor can be carried out at high temperatures and in a substantially molten state, large movements such as segregation of impurities cannot occur, and heat A feature of this method is that impurities or additives with a concentration higher than the solid solubility limit in the annealing method are added to the semiconductor without precipitation.

本発明のこれまでの実施例において、透明電極
はそのまま残置せしめている。しかしこの電極を
一度エツチング液で除去して再度新しい透明電極
を形成させてもよいことはいうまでもない。また
第一の透明電極を例えば窒化物により100〜1000
Åの厚さに形成した後、光アニールし、さらに第
二の透明電極を酸化物により0.1〜2μの厚さに形
成してもよい。
In previous embodiments of the invention, the transparent electrodes were left in place. However, it goes without saying that this electrode may be removed once with an etching solution and a new transparent electrode may be formed again. In addition, the first transparent electrode is made of nitride, for example, to
After forming the electrode to a thickness of 0.1 Å, photoannealing may be performed, and a second transparent electrode may be further formed from an oxide to a thickness of 0.1 to 2 μm.

また本発明のこれまでの実施例は半導体は珪素
を主体として説明した。しかしSixGe1-X(0<X
<1)、SixSn1-X(0<X<1)、SixC1-X(0.5<X
<1)またはSnの如き族の半導体または
GaAs、GaAlAs等の、族の化合物半導体、
さらにまたは半導体の一部にSixO2-X(0<X<
2)、SixN4-X(0<X<4)等の低級酸化物、低
級窒化物でかかる半導体の一部を形成させ、その
エネルギバンド巾を連続的にW−N構造に変化さ
せた半導体を用いてもよいことはいうまでもな
い。
Furthermore, in the previous embodiments of the present invention, silicon was mainly used as the semiconductor. However, SixGe 1-X (0<X
<1), SixSn 1-X (0<X<1), SixC 1-X (0.5<X
<1) or a semiconductor of the group such as Sn or
Group compound semiconductors such as GaAs and GaAlAs,
Furthermore, or in a part of the semiconductor, SixO 2-X (0<X<
2) A semiconductor in which a part of such a semiconductor is formed of a lower oxide or lower nitride such as SixN 4-X (0<X<4), and its energy band width is continuously changed to a W-N structure. It goes without saying that you may also use .

本発明の実施例において、透明電極は酸化ス
ズ、酸化インジユームまたは酸化アンチモン等の
酸化物導電性透明電極を主として記した。しかし
化学的にさらに安定な窒化物の導電性透明電極を
窒化スズ、窒化インジユーム、窒化アンチモンを
用いてもよく、さらに窒化珪素とこれらの混合物
を導電性透明電極として用いてもよい。
In the embodiments of the present invention, the transparent electrode is mainly an oxide conductive transparent electrode made of tin oxide, indium oxide, antimony oxide, or the like. However, tin nitride, indium nitride, and antimony nitride may be used as conductive transparent electrodes of chemically more stable nitrides, and silicon nitride and mixtures thereof may also be used as conductive transparent electrodes.

加えて半導体層と酸化物透明電極との境界に10
〜50Åのトンネル電流を流すきわめて薄い膜厚の
窒化物を設けた半導体装置にも本発明を適用でき
ることはいうまでもない。
In addition, at the boundary between the semiconductor layer and the oxide transparent electrode, 10
It goes without saying that the present invention can also be applied to a semiconductor device provided with an extremely thin nitride film that allows a tunnel current of ~50 Å to flow.

さらに本発明における半導体装置は光電変換装
置、特に太陽電池のみではなく、MIS.FETを用
いた集積回路、発光素子、半導体レーザその他ト
ランジスタ、ダイオード等のすべての半導体装置
に適用できることはいうまでもない。
Furthermore, it goes without saying that the semiconductor device of the present invention can be applied not only to photoelectric conversion devices, especially solar cells, but also to all semiconductor devices such as integrated circuits using MIS.FET, light emitting elements, semiconductor lasers, other transistors, and diodes. .

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明を実施するための半導体装置の
例を示す。第2図は本発明の他の実施例を示すた
めの半導体装置の例を示す。第3図は本発明を実
施するための製造装置の一例である。
FIG. 1 shows an example of a semiconductor device for implementing the present invention. FIG. 2 shows an example of a semiconductor device for illustrating another embodiment of the present invention. FIG. 3 is an example of a manufacturing apparatus for carrying out the present invention.

Claims (1)

【特許請求の範囲】[Claims] 1 族元素を主成分とする非単結晶半導体の一
主面にレーザまたはそれと同様の強光エネルギー
を照射することにより光アニールを行つた後、前
記半導体を高周波またはマイクロ波によるプラズ
マ状態の水素、ハロゲン元素または不活性ガス雰
囲気に配置することを特徴とした半導体装置作製
方法。
After performing optical annealing by irradiating one principal surface of a non-single-crystal semiconductor mainly composed of Group 1 elements with a laser or similar intense light energy, the semiconductor is heated with hydrogen in a plasma state by radio frequency or microwave. A method for manufacturing a semiconductor device characterized by placing the device in a halogen element or inert gas atmosphere.
JP9974379A 1979-08-05 1979-08-05 Manufacture of semiconductor device Granted JPS5623784A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9974379A JPS5623784A (en) 1979-08-05 1979-08-05 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9974379A JPS5623784A (en) 1979-08-05 1979-08-05 Manufacture of semiconductor device

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP60124788A Division JPS6150329A (en) 1985-06-07 1985-06-07 Manufacture of semiconductor device
JP3033679A Division JPH04211130A (en) 1991-02-01 1991-02-01 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5623784A JPS5623784A (en) 1981-03-06
JPH0338756B2 true JPH0338756B2 (en) 1991-06-11

Family

ID=14255487

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9974379A Granted JPS5623784A (en) 1979-08-05 1979-08-05 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5623784A (en)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59144122A (en) * 1983-02-08 1984-08-18 Seiko Epson Corp Optical annealing method
JPS59154079A (en) * 1983-02-22 1984-09-03 Semiconductor Energy Lab Co Ltd Photoelectric conversion semiconductor device
JPS59155974A (en) * 1983-02-25 1984-09-05 Semiconductor Energy Lab Co Ltd Manufacture of photoelectric converter
JPS60224282A (en) * 1984-04-20 1985-11-08 Semiconductor Energy Lab Co Ltd Manufacture of semiconductor device
JPH0693515B2 (en) * 1984-04-26 1994-11-16 株式会社半導体エネルギー研究所 Semiconductor device manufacturing method
JPS6158276A (en) * 1984-08-29 1986-03-25 Semiconductor Energy Lab Co Ltd Manufacture of semiconductor device
JPS61231771A (en) * 1985-04-05 1986-10-16 Semiconductor Energy Lab Co Ltd Manufacture of semiconductor device
JPS6254448A (en) * 1985-08-02 1987-03-10 Semiconductor Energy Lab Co Ltd Measurement for semiconductor device
JP2660243B2 (en) * 1985-08-08 1997-10-08 株式会社半導体エネルギー研究所 Semiconductor device manufacturing method
JP2521427B2 (en) * 1985-08-24 1996-08-07 株式会社 半導体エネルギー研究所 Semiconductor device manufacturing method
JPS6247116A (en) * 1985-08-26 1987-02-28 Semiconductor Energy Lab Co Ltd Semiconductor device manufacturing equipment
JPS6251210A (en) * 1985-08-30 1987-03-05 Semiconductor Energy Lab Co Ltd Manufacture of semiconductor device
JPS6252924A (en) * 1985-09-01 1987-03-07 Semiconductor Energy Lab Co Ltd Manufacture of semiconductor device
JPS6269608A (en) * 1985-09-24 1987-03-30 Semiconductor Energy Lab Co Ltd Manufacture of semiconductor device
JPH0263817A (en) * 1988-08-31 1990-03-05 Naigai Kaaboninki Kk Processing method of tack label paper
JPH0693514B2 (en) * 1990-01-18 1994-11-16 工業技術院長 Method for treating CIS structure including transparent conductive oxide film
JPH03227575A (en) * 1990-09-14 1991-10-08 Semiconductor Energy Lab Co Ltd Photoelectric conversion device

Also Published As

Publication number Publication date
JPS5623784A (en) 1981-03-06

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