JPH0693514B2 - Processing method of cis structure including a transparent conductive oxide film - Google Patents

Processing method of cis structure including a transparent conductive oxide film

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JPH0693514B2
JPH0693514B2 JP903890A JP903890A JPH0693514B2 JP H0693514 B2 JPH0693514 B2 JP H0693514B2 JP 903890 A JP903890 A JP 903890A JP 903890 A JP903890 A JP 903890A JP H0693514 B2 JPH0693514 B2 JP H0693514B2
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oxide film
transparent conductive
conductive oxide
cis structure
processing method
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JPH03212976A (en )
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豊 林
賢一 石井
秀尚 高遠
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工業技術院長
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は各種半導体素子の少なくとも一部に用いられる DETAILED DESCRIPTION OF THE INVENTION [FIELD OF THE INVENTION The present invention is used in at least a portion of the various semiconductor devices
CIS(導電体−絶縁物−半導体)構造に関し、特に導電体(C)領域として透明導電酸化膜を用いたCIS構造において、その作製後に特性を改善するか、ないしは作製時に生じた特性の低下を補うための処理方法に関する。 CIS relates (conductor - - insulator semiconductor) structure, the CIS structure using a transparent conductive oxide film as a particular conductor (C) region, improve properties after its fabrication, or the reduction of the resulting properties during the production It relates to a process for the treatment of the order to compensate.

[従来の技術] 上記したようなCIS構造も、それ自体単独で用いられることはむしろ稀であり、各種半導体素子の全体構造の中の一部の構造部分として用いられるのが普通であるが、 [Prior Art] above-mentioned such CIS structures is rather rarely used by itself alone, for use as part of the structure portions in the overall structure of various semiconductor devices is a common,
太陽電池に代表されるように、各種の光電変換素子を作製する場合、当該CIS構造中の導電体(C)に相当する領域を、光透過性のある透明導電酸化膜(TCO:Transpar As typified by solar cells, the case of producing a variety of photoelectric conversion elements, a region corresponding to the conductor in the CIS configuration (C), optical transparency is a transparent conductive oxide film (TCO: Transpar
ent Conductive Oxide)で構成したものは今後さらに利用されるようになると思われる。 ent Conductive Oxide) those composed seems to become further future use.

これはまた、電子ビーム蒸着法により比較的容易に成膜でき、かつ低い抵抗率が得られる透明導電酸化膜材料として、酸化インジウム錫膜(いわゆるITO)とか酸化錫膜(SnO 2 )、あるいはまた酸化亜鉛膜(ZnO)等、多くの適当な材料が簡単に入手できるという事情も寄与している。 It also can relatively easily formed by electron beam deposition method, and a low resistivity is obtained transparent conductive oxide film material, indium oxide Suzumaku (so-called ITO) Toka tin oxide film (SnO 2), or alternatively zinc oxide film (ZnO), also circumstances that many suitable materials readily available contributes.

なお、こうした透明導電酸化膜は、電子ビーム蒸着法の外、スプレー法や化学蒸着法(CVD)によっての作製も可能である。 Incidentally, such a transparent conductive oxide film is produced is also possible by the outer electron beam deposition method, a spraying method or a chemical vapor deposition (CVD).

[発明が解決しようとする課題] しかし、上記のように、半導体基板自体であるか、または半導体基板の上に積層された層構造の最上層に位置する半導体層等、いずれにしても半導体の上にまずは絶縁膜を形成し、さらにその上に上記したような材料製の透明導電酸化膜を作製するにあたり、最後の透明導電酸化膜の形成に電子ビーム蒸着法を採用すると、高速に加速される電子ビームや、これに伴って付随的に発生するX [Problems to be Solved] However, as described above, a semiconductor layer such that the uppermost of the stacked layer structure on top of or is a semiconductor substrate, a semiconductor substrate itself, any case by the semiconductor First an insulating film is formed above and further Upon thereon to thereby form a transparent conductive oxide film made of materials as described above, when employing the electron beam evaporation method for the formation of the end of the transparent conductive oxide film, are accelerated to high speed that the electron beam or, X is incidentally generated with this
線が下地層である絶縁膜に物理的な損傷を与えたり、絶縁膜と半導体との界面における界面準位密度が増して、 Or physically damage the insulating film lines as an underlying layer, it increases the interface state density at the interface between the insulating film and the semiconductor,
CIS構造として望ましい特性が得られなくなるという欠点があった。 It has a drawback that desired properties can not be obtained as a CIS structure.

また、材料として酸化錫を選択し、これによる透明導電酸化膜の形成にCVDやスプレー法を利用した場合にも、 Also, select a tin oxide as a material, even when using a CVD or spray method for the formation of the transparent conductive oxide film by this,
成膜環境は、温度こそ、一般に400〜600℃前後の比較的低温とは言え、酸化性雰囲気であるため、CIS構造の電気的特性は安定し難かった。 Deposition environment, the temperature precisely, generally said to be relatively low temperatures of about 400 to 600 ° C., since it is an oxidizing atmosphere, the electrical characteristics of the CIS structure was stable hardly.

そこで従来からも、特性改善、ないしは低下した特性の回復のため、CIS構造を水素プラズマに曝すという処理を追加する場合があったが、このようにすると200℃程度の低温でも透明導電酸化膜の表面が変質し、透明度を失って曇ってしまうことが多かった。 So also conventional, for improving characteristics, or the recovery of the reduced characteristics, but in some cases to add a process of exposing the CIS structure to a hydrogen plasma, such to the 200 ° C. about the transparent conductive oxide film at a low temperature the surface is altered, have often become cloudy and lost its transparency.

本発明はこのような従来の実情に鑑み、電子ビーム蒸着法によるにしろCVDやスプレー法によるにしろ、作製されるCIS構造中の絶縁膜の損傷や当該絶縁膜と半導体層との界面準位を効果的に低減でき、かつまた従来の水素プラズマ処理を適用した場合のように透明導電酸化膜を曇らせることがないか、その程度を大きく低減し得る新たなる処理方法を提供せんとするものである。 The present invention has been made in view of such conventional circumstances, electron beam white to by evaporation CVD or spraying white by interface state between the damage and the insulating film and the semiconductor layer of the insulating film in the CIS structures made in which effectively can be reduced, and also whether there is to cloud the transparent conductive oxide film as in the case of applying the conventional hydrogen plasma treatment, to St. provide a new processing method capable of reducing the degree greater is there.

[課題を解決するための手段] 本発明は上記目的を達成するため、半導体の上に絶縁膜を形成し、さらにその上に透明導電酸化膜を形成して成るCIS構造の処理方法として、透明導電酸化膜を形成した後に、水素雰囲気中で300℃から500℃の温度範囲内にまでの加熱処理を行なうという処理方法を提案する。 Since the present invention [Means for Solving the Problems] is to achieve the above object, an insulating film is formed on the semiconductor, the further processing method of the CIS structure obtained by forming a transparent conductive oxide film thereon, transparent a conductive oxide film after forming, proposes a processing method of performing heat treatment at from 300 ° C. in a hydrogen atmosphere until within a temperature range of 500 ° C..

[作用] 透明導電酸化膜を有する作製済みのCIS構造に対し、本発明に従い、水素雰囲気中、300℃から500℃までの温度範囲内にて加熱処理を行なうと、透明導電酸化膜を問題となる程曇らせることもなく、むしろ良好な透明性を保ちながら、水素が透明導電酸化膜中を通過し、その下の絶縁膜中にまで侵入し得ることが判明した。 To prefabricated CIS structure having the action] Transparent conductive oxide films in accordance with the present invention, in a hydrogen atmosphere, when the heat treatment at a temperature range from 300 ° C. to 500 ° C., and issues a transparent conductive oxide film it no overshadow extent made while rather maintaining good transparency, the hydrogen passes through the transparent conductive oxide film, it has been found that can penetrate the insulation film thereunder.

その結果、当該絶縁膜中の欠陥や、この絶縁膜とその下の半導体との界面に生じていた欠陥が当該水素により埋められ、未結合シリコンが減少するようになった。 As a result, and defects in the insulating film, the insulating film and the defect that occurs in the interface between the semiconductor thereunder is filled by the hydrogen, unbound silicon became reduced.

これは取りも直さず、透明導電酸化膜形成時に生じた欠陥とか界面準位を低減させることとなり、CIS構造としての特性の向上を生んだし、また、絶縁物中の固定電荷と導電体の仕事関数の差で決まるフラット・バンド電圧 This is not healed also take, becomes possible to reduce defects Toka interface states generated at the transparent conductive oxide film forming, to gave birth to improve the characteristics of a CIS structure, also, the work of fixed charges and the conductor in the insulator flat-band voltage determined by the difference between the function
V FBの調節ないし制御も可能となった。 Regulation or control of the V FB also became possible.

そして特に、このような効果は、欠陥発生確率が高いと考えられる電子ビーム蒸着法の適用後でも顕著であった。 And in particular, this effect was remarkable even after the application of the electron beam evaporation method which is considered to have a high defect generation probability.

ただし、上記した温度範囲を外れると特性改善ないし回復効果は薄れることが多く、わざわざ一工程を追加する程の意味はなくなった。 However, often Outside the temperature range mentioned above characteristic improving or recovery effect is lessened, no longer meanings extent that purposely add one step.

[実施例] 具体的なCIS構造の作製例とこれに対する本発明の処理方法につき説明するに、まず、乾燥酸素中、1000℃でシリコン基板を熱酸化し、表面部分に80nmのシリコン酸化膜を形成した後、100%の水素雰囲気中で400℃、30分間に亙る熱処理を行なった。 To explained processing method of the present invention manufacturing example of Example] Specific CIS structures and for this, firstly, in a dry oxygen, a silicon substrate is thermally oxidized at 1000 ° C., the silicon oxide film 80nm on a surface portion after forming, 400 ° C. in a 100% hydrogen atmosphere, heat treatment was carried out over a 30 min.

このようにして処理したシリコン酸化膜上に電子ビーム蒸着法を援用し、酸化インジウム錫電極を90nmの厚味にまで蒸着し、本発明による処理対象試料としてのCIS構造試料を幾つか作製した。 Thus the aid of electron beam deposition method to treated silicon oxide film, the indium tin oxide electrode was deposited to a thickness of 90 nm, a CIS structure samples to be processed samples of the invention were several prepared.

その後、これらCIS構造試料群に対して本発明を適用し、100%水素雰囲気中で200℃から500℃の温度範囲内の各温度で30分間に亙る熱処理を行なった。 Then, by applying the present invention to these CIS structure sample group were subjected to over heat treatment for 30 minutes at each temperature in the temperature range of 500 ° C. from 200 ° C. in a 100% hydrogen atmosphere.

このように処理したことの効果は界面準位密度D itの低減により、良く示すことができるが、周知のように、当該準位密度D itとCIS構造のいわゆるC−V特性(容量対電圧特性)とは深い相関があり、C−V特性の周波数依存性に基づき、当該界面準位密度D itを求めることができるので、理論値にほぼ一致した高周波100KHzにおけるC−V特性の曲線と低周波100Hzなおけるそれとの関係により、被検試料の界面準位密度D itを求めた。 Such effect of the treated it as the reduction of interface state density D it, may exhibit good, as is well known, the state density D it and the so-called C-V characteristic (capacitance versus voltage of the CIS structure There is a deep correlation with the characteristics), based on the frequency dependence of the C-V characteristic, it is possible to determine the interface state density D it, and the curve of the C-V characteristic at substantially the same high-frequency 100KHz to theoretical value low frequency 100Hz Note Keru the relationship with it, to determine the interface state density D it of the test sample.

第1図はバンド・ギヤップ中の界面準位密度の最大値D Figure 1 is the maximum value D of the interface state density in the band Giyappu
itmの水素アニール温度依存性を示している。 It represents a hydrogen annealing temperature dependency of itm.

本図から明らかなように、水素アニール温度が300℃よりも低い試料の界面準位密度D itmは総体的にほぼ10 11個/cm 2であり、あえて水素処理を行なわなかった試料のそれとほぼ同一のレベルにあった。 As apparent from the figure, the interface state density D itm lower samples than hydrogen annealing temperature is 300 ° C. is grossly approximately 10 11 / cm 2, dare substantially to that of the sample was not performed hydrotreating It was on the same level.

これに対し、本発明の趣旨に従い、300℃から500℃の間の温度範囲にて水素アニール処理を行なった試料では、 In contrast, in accordance with the spirit of the present invention, the sample was subjected to hydrogen annealing treatment at a temperature range between 500 ° C. from 300 ° C.,
界面準位密度D itmは一桁程度も改善され、10 10個/cm 2 Interface state density D itm is improved by approximately one digit, 10 10 / cm 2
のレベルとなった。 It became of the level.

また、水素アニール温度の上昇に伴ってフラット・バンド電圧V FBのシフトが観測された。 The shift of the flat band voltage V FB was observed with increasing hydrogen annealing temperature.

第2図はこのフラット・バンド電圧V FBの水素アニール温度依存性を示しているが、250℃を越えた温度でのフラット・バンド電圧V FBの正方向へのシフトは、第1図にも示した通り、C−V特性の形が理論値に近づき、界面準位密度D itが減少していることに対応しており、かつ、本発明により規定される300℃から500℃のアニール温度範囲内では、当該フラット・バンド電圧V FBを容易に制御可能なことが分かる。 Figure 2 is shows the hydrogen annealing temperature dependence of the flat band voltage V FB, the shift in the positive direction of the flat-band voltage V FB at the temperature in excess of 250 ° C., in Figure 1 as indicated, close to the shape theoretical value of C-V characteristics, the interface state density D it corresponds to is decreased, and the annealing temperature of 500 ° C. from 300 ° C. as defined by the present invention within, it can be seen the flat band voltage V FB can be easily controlled.

さらに透明導電酸化膜の曇りの有無を調べるため、先と同様に電子ビーム蒸着法を援用し、ただしシリコン基板ではなく石英基板上に酸化インジウム錫を90nmの厚味にまで蒸着した試料を用意し、波長600nmにおける透過率の水素アニール温度依存性を測定した。 To investigate further the presence or absence of cloudiness of the transparent conductive oxide film, the aid of earlier and electron beam vapor deposition method in the same manner, except that the indium tin oxide on a quartz substrate instead of preparing a sample was deposited to a thickness of 90nm in the silicon substrate It was measured hydrogen annealing temperature dependence of the transmittance at a wavelength 600 nm.

その結果は第3図に示されているが、アニール温度を50 Although the results are shown in Figure 3, the annealing temperature 50
0℃近傍にまで上げてくると透過率の減少が見られ、これはすなわち、これ以上にさらに温度を上げると酸化インジウム錫膜に曇りが生じ、透明導電酸化膜としての機能が劣化することを教えている。 0 ℃ come up to the vicinity of the observed decrease in transmittance, which namely, that no more further cloudy with indium tin oxide film raising the temperature occurs, functions as a transparent conductive oxide film is deteriorated It teaches.

このような実施例から明らかなように、処理自体は簡単な本発明の処理工程を適用しただけで、界面準位密度は大きく低減しており、界面特性の向上効果は顕著である。 As is apparent from this example, the process itself is only the application of the process simple present invention, the interface state density is greatly reduced, the effect of improving the interfacial properties is remarkable.

なお、同様の傾向は、上記実施例のように酸化インジウム錫以外、酸化錫、酸化亜鉛にても得られるものである。 The same trend, except indium tin oxide as in the above embodiment, a tin oxide, but also obtained by zinc oxide.

さらに、CVDやスプレー法等、電子ビーム蒸着法よりもダメージの少ない方法で透明導電酸化膜を形成した後の処理方法としても、本発明は全く同様に適用することができる。 Furthermore, CVD and spray method, also as a processing method after forming the transparent conductive oxide film with less process damage-than the electron beam evaporation method, the present invention may similarly be applied.

例えば、四塩化錫(SnCl 4 )と水蒸気とを原料とし、CVD For example, the tin tetrachloride (SnCl 4) and water vapor as a raw material, CVD
により成膜した酸化錫膜に対し、本発明に従って水素雰囲気中での熱処理を施した所、熱処理温度による界面準位密度の変化は少なかったが、第4図示のように、300 By contrast deposited tin oxide film was subjected to heat treatment in a hydrogen atmosphere according to the present invention, but was less variation in interface state density by the heat treatment temperature, as in the fourth illustrated, 300
℃以下の温度ではフラット・バンド電圧V FBの変化が著しく、かなり問題であったのに、本発明により規定される温度範囲下限である300℃以上では安定なフラット・ ° C. The following temperature significantly changes in flat band voltage V FB is considerably though was issues a stable flat is at a defined temperature range lower limit at which 300 ° C. Thus the present invention
バンド電圧V FBが得られた。 Band voltage V FB was obtained.

しかも、本発明の処理方法は、すでに述べた従来の水素プラズマ法における処理温度200℃に比せば高い温度範囲にあるにもかかわらず、形成された透明導電酸化膜の透明度の低下も水素処理時間の調節により、ほとんど問題とならなかった。 Moreover, the processing method of the present invention, despite already in high temperature range if Hise a processing temperature 200 ° C. in the conventional hydrogen plasma method described, lowering of transparency also hydrogen treatment of the formed transparent conductive oxide film by adjusting the time, was not a little problem.

また、上記した実施例ではいずれも水素雰囲気中での実験であったが、He,Ne,Ar等の不活性ガスを水素の希釈ガスとして混入した実験例においてもほぼ同様な望ましい効果が得られた。 Further, in the embodiment described above was the experiments both in a hydrogen atmosphere, the He, Ne, is substantially the same desired effect in experimental examples of the inert gas was mixed as a diluent gas of hydrogen such as Ar obtained It was.

ただし、すでに述べたように、本発明において指定している温度範囲(300℃〜500℃)を外れる温度範囲では、 However, as already mentioned, in a temperature range outside the temperature range that is specified in the present invention (300 ° C. to 500 ° C.), the
上記のようなCIS構造の特性改善ないし回復効果が必ずしも顕著に表れない場合が生じ、処理工程を一つ追加する程の効果は認められないことが多かった。 If characteristic improvement or recovery effect of the CIS structure as described above does not appear necessarily significantly occurs, the effect of the extent of adding one process step were often not observed. 本発明における温度範囲の限定はこのような事実に立脚したものである。 Limiting the temperature range of the present invention has been grounded in this fact.

[効果] 以上のように、本発明によると、従来の水素プラズマ処理のように、場合によっては特性改善のための処理が逆に透明導電酸化膜に大幅な曇りを生じさせてしまうようなおそれもなく、透明導電酸化膜形成時に発生した絶縁膜の損傷や絶縁膜と半導体界面における界面準位密度を効果的に低減することができる外、フラット・バンド電圧の安定化ないしは制御も可能となり、この種のCIS構造の特性を大いに改善ないし回復することができる。 [Effect] As described above, according to the present invention, as in conventional hydrogen plasma treatment, a risk processing that would cause significant fogging on the transparent conductive oxide film in reverse for cases Improvement without any outside can be effectively reduced interface state density at the damage and the insulating film and the semiconductor interface between the insulating film occurs during the transparent conductive oxide film formed, also enables stabilization or control of the flat-band voltage, characteristics of such CIS structures can greatly improve or recover.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

第1図は透明導電酸化膜に電子ビーム蒸着法により成膜した酸化インジウム錫膜を用いて成るCIS構造試料に対し、本発明に従う処理を施した場合の一例における熱処理温度対界面準位密度の特性図, 第2図は同じくCIS構造試料に対し、本発明処理を施した場合の一例における熱処理温度対フラット・バンド電圧の特性図, 第3図は本発明に従う処理を施すに際し、透明導電酸化膜の一例としての酸化インジウム錫膜における曇りの発生の如何を検討するため、熱処理温度と透過率との関係を測定した特性図, 第4図は透明導電酸化膜にCVDによって成膜した酸化錫膜を用いて成るCIS構造試料に対し、本発明に従う処理を施した場合の一例における熱処理温度対フラット・バンド電圧の特性図,である。 To CIS structure sample of using indium tin oxide film formed by an electron beam evaporation method in Figure 1 is a transparent conductive oxide film, the heat treatment temperature versus interface state density in an example when subjected to the process according to the invention characteristic diagram, Fig. 2 to likewise CIS structure sample, the characteristic diagram of the heat treatment temperature versus flat-band voltage in an example of the case subjected to the present invention process, when FIG. 3 is subjected to a process according to the present invention, a transparent conductive oxide to study the whether the haze occurs in the indium oxide Suzumaku as an example of a film, characteristic diagram of measurement of the relationship between the heat treatment temperature and the transmittance, Figure 4 is tin oxide was deposited by CVD on the transparent conductive oxide film to CIS structure sample comprising using a film, characteristic diagram of the heat treatment temperature versus flat-band voltage in an example of the case subjected to the process according to the present invention, it is.

Claims (1)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】半導体の上に絶縁膜を形成し、さらにその上に透明導電酸化膜を形成して成るCIS構造の処理方法であって: 上記透明導電酸化膜を形成した後、水素雰囲気中、または不活性ガス中に水素を含む雰囲気中、300℃から500℃ 1. A dielectric film is formed on the semiconductor, a further method of processing CIS structure obtained by forming a transparent conductive oxide film thereon: after forming the transparent conductive oxide film, in a hydrogen atmosphere or in an atmosphere containing hydrogen in an inert gas, 500 ° C. from 300 ° C.
    の温度範囲内での加熱処理を行なうことを特徴とする透明導電酸化膜を含むCIS構造の処理方法。 Processing method of the CIS structure including a transparent conductive oxide film and performing heat treatment within a temperature range of.
JP903890A 1990-01-18 1990-01-18 Processing method of cis structure including a transparent conductive oxide film Expired - Lifetime JPH0693514B2 (en)

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US5808315A (en) * 1992-07-21 1998-09-15 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor having transparent conductive film
JP3202362B2 (en) * 1992-07-21 2001-08-27 株式会社半導体エネルギー研究所 A method for manufacturing a semiconductor device
JP3587537B2 (en) 1992-12-09 2004-11-10 株式会社半導体エネルギー研究所 Semiconductor device
US5840620A (en) * 1994-06-15 1998-11-24 Seager; Carleton H. Method for restoring the resistance of indium oxide semiconductors after heating while in sealed structures
WO1998029902A1 (en) * 1996-12-27 1998-07-09 Radiant Technologies, Inc. Method for restoring the resistance of indium oxide semiconductors after heating while in sealed structures

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JPH0338756B2 (en) * 1979-08-05 1991-06-11 Handotai Energy Kenkyusho
JPS60163429A (en) * 1984-02-03 1985-08-26 Sumitomo Electric Ind Ltd Manufacture of amorphous silicon solar cell

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