JP2785173B2 - MIS type semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an intermediate structure between an amorphous structure and a crystalline structure (including both single crystal and polycrystal). The present invention relates to a MIS type semiconductor device using a semiconductor having a third state which is stable in terms of free energy. 2. Description of the Related Art Conventionally, an amorphous semiconductor has been defined as having a random interatomic distance and a random crystallographic arrangement. An amorphous semiconductor is not always stable in terms of free energy as compared with a crystalline semiconductor (CRYSTALLINE SEMICONDUCTOR) because of the random interatomic distance and crystallographic arrangement. In addition, in such an amorphous semiconductor, there are many unpaired bonds that are not chemically bonded to others due to the randomness. This unpaired bond becomes the center of recombination and extremely shortens the lifetime of the carrier, and it has been expected that the carrier killer is most eliminated. As a method for removing such dangling bonds, it has recently been known to neutralize with hydrogen or halogen. That is, this method can be represented by the following reaction formula, assuming that the semiconductor is silicon. Glow discharge or plasma CV for silane (SiH ₄ ), silicon tetrafluoride (SiF ₄ ), or a mixed gas thereof is obtained by using Si · + H · → Si-H Si · + F · → Si-F
The film prepared by the method D is composed of an amorphous semiconductor without addition of hydrogen and halogen, from 10 ²⁰ cm ^-3 to 10 ²² cm.
^-3 as the density of recombination centers, whereas the recombination center density is 10 ¹⁷ cm ^-3 to 10 ¹⁹ cm ^-3 and 10 ⁴ to 10 ⁶
Attention has been paid to reducing the density of the recombination centers by a factor of one. [0004] Compared with a single crystal semiconductor, an amorphous semiconductor is not only easier to manufacture, but also can form a large-sized (large-area, uniform) film. However, an amorphous semiconductor is not sufficient as a MIS type semiconductor device in terms of the density of recombination centers and electric conductivity. Therefore, amorphous semiconductors
It was not suitable for use in a MIS type semiconductor device. In order to eliminate this defect, the crystallization of the amorphous semiconductor is promoted by annealing. That is, an amorphous semiconductor is considerably inferior in characteristics as compared with a single-crystal semiconductor, though a process for promoting crystallization takes time and labor. For example, an amorphous semiconductor has a density of recombination centers of 10 ¹³ cm ^-3 to 10 ¹⁶ cm ^-3 and an electric conductivity of MIS type semiconductor device, which are required.
10 ^-6 (Ωcm) ^-1 to 10 ^-4 (Ωcm) ^-1
It is difficult to obtain a diffusion length of 1 μm to 50 μm. In order to solve the above problems, the present invention
By making the recombination center density, the electric conductivity, and the diffusion length of electrons and holes between the amorphous semiconductor and the crystalline semiconductor, a semiconductor having excellent properties is obtained.
It is an object to provide an IS type semiconductor device. In order to achieve the above object, a MIS type semiconductor device according to the present invention comprises a source region (43, 43 ') and a drain region (4) on a substrate (40).
4, 44 '), and the channel forming region (45, 4').
5 ′) and the channel forming region (4).
5,45) and a gate electrode (41, 41 ') is provided') a gate insulating film (42, 42 on the 'amorphous
In the channel forming region (45, 45 ′) having an intermediate structure between the crystal structure and the crystal structure , 0.1 mol% to 5 mol%
Characterized in that an amount of hydrogen has been added. The present invention relates to a MIS using a semiconductor having both the advantages of a single crystal semiconductor and the advantages of an amorphous semiconductor.
It focuses on manufacturing a semiconductor device. The amorphous semiconductor that has been subjected to the predetermined heat treatment is transformed into a semiconductor in which amorphous remains between microcrystals and intervenes. That is, since the semiconductor is amorphous between microcrystals, there is no interface between the microcrystals and the semiconductor has an amorphous structure and a crystalline structure.
In this state, electrons (electrons) or holes (holes) easily move. Therefore, for example, a semiconductor having an amorphous structure formed by a sputtering method and being transformed into a semiconductor having the above structure can be obtained at low cost and with excellent electric conductivity. In contrast, in a polycrystalline semiconductor, microcrystals are mixed, and an interface exists between the microcrystals. Therefore, in the polycrystalline semiconductor, the movement of electrons or holes is hindered by the interface existing between the microcrystals, and the electric conductivity deteriorates. The semiconductor has a crystallized lattice structure, and the crystal has lattice distortion, and is in a third stable state different from an amorphous semiconductor or a single crystal semiconductor. And, due to this lattice distortion, the light transition has the same direct transition as the amorphous semiconductor,
It is advantageous as a type semiconductor. In addition, the applicant is, MIS
In the channel formation region in the semiconductor device , or
It has been found that even when the amount of the halogen element is 0.1 mol% to 5 mol%, the electric conductivity is improved as compared with the amorphous semiconductor. That is, unlike the amorphous semiconductor, it is not necessary to neutralize dangling bonds by adding a large amount of hydrogen or a halogen element as large as 20 mol%.
This is convenient for IS type semiconductor devices. The present invention relates to a semiconductor (semi-amorphous) having the above structure.
Is defined as a semi-amorphous semiconductor, and the semiconductor device having such an intermediate structure and a semi-amorphous semiconductor is locally controlled. Is characterized by having a higher conductivity than that of an amorphous semiconductor. According to the present invention, a current, particularly a pulse current, is supplied to a specific path of an amorphous semiconductor in combination with the energy of photoexcitation by light irradiation or the energy of thermal excitation by heating. Local multiple heating, quenching, at such locations by recombination via
In particular, the material state is frozen (quickened) by the rapid cooling when the current is stopped. That is, the unpaired bond is activated, and the unpaired bond is combined with another unpaired bond in the vicinity thereof or a bond neutralized with another hydrogen or the like, whereby a normal bond is formed. A semi-amorphous semiconductor (SEMI-AMORPHOUS) that has an interatomic distance, cancels its dangling bonds, and freezes its neutralized state
SEMICONDUCTOR). According to the present invention, in a semiconductor, for example, silicon, a reaction such as Si. + Si..fwdarw.Si-Si Si. + Si-H.fwdarw.Si-Si + H. In addition to reducing the number of atoms, the heat generated by the reaction promotes rearrangement of atoms in a short-range order. EXAMPLE 1 This example mainly describes the manufacturing principle and existence theory of a semi-amorphous semiconductor. FIG. 1 is a diagram for explaining one embodiment of the present invention. In FIG.
In a semiconductor device, a conductor or a semiconductor electrode (3) (METAL) is selectively formed in an amorphous structure on an insulating substrate (4) having an amorphous structure, and then a semiconductor (1) (SEMICOND) is formed.
UCTOR: a semiconductor that is a generic name of an amorphous semiconductor or a semi-amorphous semiconductor), a translucent metal, or a counter electrode of a transparent electrode such as indium tin oxide (ITO).
(2) (METAL) is sequentially formed.
That is, the semiconductor device has a structure (MSM structure) in which a metal, a semiconductor, and a metal are sequentially stacked. The semiconductor (1) shown in FIG. 1 is a semiconductor containing silicon as a main component in this embodiment. First, the semiconductor (1) includes silane (SiH ₄ ), SiF ₄ , Si
A silicide gas such as H ₂ Cl ₂ is formed by a glow discharge method or a plasma CVD method to a thickness of 0.1 μm to 10 μm, particularly 1 μm to 5 μm. Semiconductor (1)
May be formed by using any of the sputtering method, the vacuum evaporation method, and the low pressure CVD method instead of these methods. The semiconductor (1) formed by any of these methods is formed as an amorphous semiconductor. Next, the state immediately after the growth of this amorphous semiconductor (as
In a (glow state), a semi-amorphous semiconductor is mixed with the amorphous semiconductor in an amount of 1% to 50% to transform the amorphous semiconductor into a semi-amorphous semiconductor. Further, the amorphous semiconductor includes 1
Metamorphosis that approaches a semi-amorphous semiconductor of 00% may be performed. Further, to shift a portion of the amorphous semiconductor on a semi-amorphous semiconductor, to 450 degrees to C is 30 degrees C to 150 degrees C lower temperature than the crystallization temperature and heated at a temperature of 700 ° C. Thereafter, the heated semi-amorphous semiconductor is placed in a mixed atmosphere of H and He, for example, in a mixed atmosphere of H ₂ : 0% to 10% and He: 90% to 60%, from 1 MHz to 100 MHz. Alternatively, plasma is generated by induction energy having an output of 300 W to 3 KW at a frequency of 1 GHz to 10 GHz to neutralize dangling bonds. He in the mixed atmosphere
Has the highest ionization voltage of all atoms. This He
Has a thermal conductivity of 0.123 Kcal / mHrC and neon of 0.0398,
Since it is the largest among all gaseous elements as compared with 0.0140 of argon, 0.0206 of nitrogen, etc., it is particularly important for performing a soaking reaction. This embodiment further improves the existence probability of the semi-amorphous semiconductor in the amorphous semiconductor, and grows the semiconductor immediately after growth (as grown state) having an existence probability of about 100% or more of 95% or more. The purpose is to let them. In the structure shown in FIG. 1, before and after the step of forming the amorphous semiconductor, a metal electrode or a semiconductor electrode heavily doped with an impurity (3) and an opposing electrode (2) formed by an impurity electrode are each vacuum-deposited. It can be obtained by forming by a method, a plasma CVD method or a low pressure CVD method. Each of the two electrodes (3) and (2) has a forward voltage of 1.0 / cm ² to 5 × 10 ⁴ / cm.
m ² for 100 seconds, especially 0.01 to 2 seconds,
A current, especially a pulse current, is passed. At this time, when the impurity is not doped, the amorphous semiconductor has an electric conductivity σ of 10 ⁻⁹ (Ωcm) ⁻¹ to 10 ⁻¹² (Ωcm) ^−1, which is equal to the insulating property. However, when light irradiation is performed on a predetermined portion of the amorphous semiconductor in the form of a spot having a diameter of 1 μm to 1 mm with an illuminance of 10 ⁴ LX or more, the electric conductivity σ is reduced at the portion where the light irradiation is performed. Is 10 ^-1 (Ωcm) ^-1 to 10 ^-6 (Ω
cm) ^-1 and 10 ⁶ times increase. By using this photocarrier, a large current can flow only in the portion where the light irradiation has been performed, and the amorphous semiconductor is transformed into a semi-amorphous semiconductor. Further, current does not flow around the region transformed into the semi-amorphous semiconductor, so that the structure as the amorphous semiconductor remains. An example of the characteristics of the semi-amorphous semiconductor will be described below. FIG. 2 is a diagram showing the relationship between the electrical conductivity of the semi-amorphous semiconductor of the present embodiment and the absolute temperature. In FIG. 2, the vertical axis represents the electrical conductivity σ, particularly the electrical conductivity σ of dark current without light irradiation, as a logarithm (Lo).
g), and the horizontal axis shows the absolute temperature. A curve (10) shown in FIG. 2 is an electric conductivity characteristic of the amorphous semiconductor. 3 × 10 A / c
When a current of m ² and 10 ³ A / cm ² are applied for 0.5 seconds, the curve (10) becomes the curve (11),
(12). Further, the amorphous semiconductor is a metallic impurity having a large atomic weight, such as a V-valent impurity such as As or Sb, a III-valent impurity such as Ga or In, Sn, P or the like.
0.1 mol% to 10 mol% of an IV-valent impurity such as b
(Atomic%), for example, 1.2 mol% (atomic%), the electrical conductivity characteristic of the curve (10 ') shown in FIG. 2 is obtained. Similarly, when an impurity-added amorphous semiconductor is supplied with a current of semi-amorphous semiconductor, a curve
From (10 ′), the electrical conductivity characteristics shown in curves (13) and (14) can be obtained. Thereby, each of the metallic impurities having a large atomic weight of III, IV, and V becomes an auxiliary agent for promoting the formation of a semi-amorphous semiconductor. On the other hand, B having a small atomic weight among the valences III,
Impurities such as P having a small atomic weight among V valences do not have an auxiliary action, and thus have different characteristics as impurities. FIG. 3 is a diagram showing the relationship between the spin density and the current density of the semi-amorphous semiconductor of this embodiment. FIG.
In the graph, the vertical axis shows the spin density of the dangling bond in electron spin resonance (ESR), and the horizontal axis shows the current density. 0.1 second, 0.5 second,
When the current is applied for 2.5 seconds each,
As shown in the figure, the curve (1
7), (16) and (18) can be obtained. From the measurement results, the semi-amorphous semiconductor is
4 shows an increase in electrical conductivity. That is, the dangling bonds of the amorphous semiconductor are reduced by the semi-amorphous semiconductor. The semi-amorphous semiconductor has an improved electric conductivity σ, and can improve carrier mobility by a factor of 10 ³ to 10 ⁶ . And these semi-conductors
An electron diffraction image of the body coating shows a semi-amorphous semiconductor
The crystal structure of the body was clearly observed. Further, in the amorphous semiconductor, the hydrogen content was 20 mol% (atomic%), but this hydrogen content was reduced by the conversion to a semi-amorphous semiconductor, and the hydrogen content was 0.1%.
Only about 1 mol% to 5 mol% (atomic%) was mixed. For this reason, it is considered that the result of the electron spin resonance is not that the unpaired bond is neutralized by hydrogen, but that silicon (Si) is bonded to each other and neutralized. From the above characteristics, the film formed by the so-called amorphous semiconductor has a structure in which the distance between crystal lattices and the position of the crystal lattice are random, whereas the film formed by the semi-amorphous semiconductor has a stable free energy. It is also assumed that it has a third stable point different from the crystal structure stable in terms of thermal energy in terms of free energy. Fig. 4 shows the coordinates (CO
FIG. 4 is a diagram showing a relationship between NFIGURATIONAL COORDINATE) and free energy. The horizontal axis in FIG. 4 indicates coordinates in a general phase space, and the vertical axis indicates free energy. FIG. 4 shows three states of the amorphous semiconductors (21) and (21 ′), the semi-amorphous semiconductor (22), and the crystalline semiconductor (23). (21 ') was found to be a third stable state rather than a metastable state for becoming a crystalline semiconductor (23). In FIG. 2, the substrate temperature (the temperature of the insulating substrate (4)) is set to 200 ° C. or 400 ° C. higher than room temperature.
, Low current densities of 3 A / cm ² and 10 ² A / cm ² are obtained, as shown by the room temperature curves (11) and (12). The features of this embodiment are that photo carriers are generated by local light irradiation (light spot) when applying a current to the amorphous semiconductor, and that the light spot is scanned (scanned). To make an amorphous semiconductor. At this time, it is extremely effective to promote thermal excitation by heating together to apply a current uniformly to a wide area without difficulty in practical use. The current density in this embodiment means the average of the density of the current flowing per unit area. The current density means the density of a current locally flowing in a region below the electrode. That is, the present embodiment can be applied not only to a small area of 1 mm × 1 mm or less, but also to a large area of 10 cm × 10 cm. As described above, in FIG.
The semiconductor (1) immediately below (2), that is, the semiconductor (1) in the region (20) is a semi-amorphous semiconductor. Further, the semiconductor (1) in the region (19) shown in FIG. 1 does not have the lower electrode (3), so that the amorphous semiconductor in the state immediately after growth (as grown state) or the amorphous semiconductor and the semi-amorphous semiconductor It becomes a mixed semiconductor. Further, the semiconductor (1) in the region (19 ')
It has an intermediate structure between the amorphous semiconductor immediately after growth (as grown state) and the semiconductor (1) in the region (20). The semiconductor (1) shown in FIG. 1 is a case of amorphous silicon, but Ge, GeSix (0 <x <1),
_{O 2- x (0 <x <} 2), SiC 1- x (0 <x <1), Si 3 N 4- x (0 <x <4)
As described above, the present invention can be similarly carried out with a compound or a mixture. The semiconductor according to the present invention also includes a semi-insulator in a limit where current can flow. Thus, in the case of silicon, the amorphous semiconductor had a carrier diffusion length of only about 300 mm. In contrast, the semi-amorphous semiconductor of this embodiment has a carrier diffusion length of 1 μm to 50 μm.
10 ⁴ times increase and carrier diffusion length to 1/10 or
I was able to approach 1/1000. When a semi-amorphous semiconductor was examined by an electron beam or X-ray diffraction method, the distance between atoms of this semi-amorphous semiconductor was 2.
2 ° to 2.5 °, and the interatomic distance of the single crystal is 2.3.
It had a strain that extended in the long-distance direction while substantially matching 一致. However, the crystal structure of the semi-amorphous semiconductor has a diamond structure on the order of a short range, and has a lot of lattice distortion in a range to be examined by a diffraction image. Due to this lattice distortion, it has been found that the light transition of the semi-amorphous semiconductor has a direct transition similarly to the amorphous semiconductor, unlike the indirect transition of single crystal silicon. Embodiment 2 Embodiment 2 relates to a MIS-FET (insulated gate type field effect semiconductor device). MIS of the present embodiment
FIG. 4 is a longitudinal sectional view for explaining an FET having an inverter structure and provided on a substrate. MIS-F shown in FIG.
ET is SOS (SILICON ON SAPPHIRE or SILICONO
N SILICON) structure. This SOS structure has about one oxide layer on a glass, ceramic or silicon substrate.
A silicon semiconductor layer in which an amorphous semiconductor is not doped with impurities is formed on an insulating substrate (40) having a thickness of μm and having a so-called amorphous surface. MIS-FE
T is a semi-amorphous semiconductor which is formed by selectively forming a part of the silicon semiconductor layer as a semi-amorphous semiconductor. This MIS-FET is formed by the following method. First, according to the method described in the first embodiment,
An amorphous semiconductor having a thickness of 0.3 μm to 1 μm is manufactured. Then, this amorphous semiconductor is provided with a mask coating that has a masking action against an oxidizing gas and oxidizes other portions to embed this oxide film, that is, silicon nitride (42).
It is selectively formed to a thickness of 0.2 μm to 0.5 μm. Next, using the mask coating, selective oxidation is performed on a part of the surface of the amorphous semiconductor to form an oxide (49) embedded in a part of the surface of the amorphous semiconductor. Thereafter, the mask coating is removed, and gate insulating films (42) and (42 ') are formed on the surface of the amorphous semiconductor again by high pressure or plasma oxidation to a thickness of 500 to 1000 mm. Next, a silicon semiconductor film for the gate electrodes (41) and (41 ') is formed on the surfaces of the gate insulating films (42) and (42') as an amorphous semiconductor or a semi-amorphous semiconductor. In particular, when a semi-amorphous semiconductor is used, Sb and As, which are conductive metals, are added to make it N-type, and In and Ga are added by 0.1 mol% to 5 mol% (atomic%), respectively, to make it P-type. . Thereafter, the silicon semiconductor film for the gate electrodes (41) and (41 ') is photo-etched, and the gate electrodes (41) and (41') and any one of the electrode leads of the source region and the drain region are formed.
(50), (50 ') and (50'') are formed. Next, in the case of an N-channel MIS-FET, As is doped by ion implantation with self-alignment using the gate electrode (41) as a mask, and the source regions (43), (4
3 ') and the drain regions (44), (44'). In the MIS-FET, an output electrode lead (50 ') connected to each of the drain regions (44) and (44') is connected to an overcoat film (interlayer) with respect to the _VDD electrode lead (50). Upper lead formed on insulating film)
Connected to (48). MIS-FE configured in this way
T indicates that when a pulse current is applied according to the first embodiment, each of the channel forming regions (45) and (45 ') becomes a semi-amorphous semiconductor, and at the same time, the source regions (43), (43') and the drain Each of the regions (44) and (44 ') is also made into a semi-amorphous semiconductor. Thus, the channel forming region (4
Each of (5) and (45 ') is made of an intrinsic or substantially intrinsic silicon semiconductor, and has an electric conductivity of 10 ⁻⁶ (Ωcm) ⁻¹ to 10 ⁻⁴ (Ωcm) ⁻ shown in Example 1. We were able to ^1. Further, as shown in Example 1, unnecessary dangling bonds were eliminated by hydrogen annealing. The MIS-FET is connected to a load MIS-F
When used as an ET, the gate electrode (41 ') is formed of an N @ + type to make it a depletion type. Also,
When the MIS-FET is used as a driver MIS-FET, the gate electrode (41) is formed of a P + type different from the respective conductivity types of the source region (43) and the drain region (44). The MIS-FET of this embodiment is a depletion type MIS-FET (DIS
-FET). When the minority carrier is used in the MIS-FET, each of the channel forming regions (45) and (45 ') of the N-channel MIS-FET is formed in a P-type. Although the present embodiment shows an example in which the MIS-FET constitutes an inverter, in the present invention, these MI-FETs are used.
An integrated circuit (IC) in which a plurality of S-FETs or inverters are integrated may be configured. Further, the present invention provides a MIS
-Integrated circuit (IC) that integrates not only FETs but also bipolar transistors, SIT (STATIC INDUCTION TRA)
Application to NSISTER), IIL (INTEGRATED INJECTION LOGIC), etc. is also possible. In this case, an element region such as a bipolar transistor or a diode is formed of a semi-amorphous semiconductor, and a part or all of an isolation region around the element region is formed of an amorphous semiconductor. According to the present embodiment, since an amorphous semiconductor can be easily changed to a semi-amorphous semiconductor simply by applying light and current, regions having different electric conductivity can be easily formed. As is apparent from the above description, the provision of the amorphous semiconductor and the semi-amorphous semiconductor of the present invention in the same semiconductor is the embodiment of the MIS-type photoelectric conversion device, MIS-FET
It can be applied to integrated circuits and optical memories using
Further, many applications based on the same technical concept are possible. According to the present invention, a semiconductor having an intermediate structure between an amorphous semiconductor and a crystalline semiconductor is obtained by heating a semiconductor having an amorphous structure formed on a substrate at a temperature lower than a crystallization temperature. The electric conductivity was further improved. According to the present invention, since the above-described semiconductor is used for the channel formation region, an inexpensive MIS type semiconductor device having excellent characteristics can be obtained. The semiconductor has a structure intermediate between an amorphous structure and a crystalline structure.
As a result, the light was directly transited similarly to the amorphous semiconductor, and a MIS semiconductor having excellent characteristics was obtained. Further, even when the amount of hydrogen in the semiconductor was 0.1 mol% to 5 mol%, the electrical conductivity was improved as compared with the amorphous semiconductor, and a MIS type semiconductor device having excellent characteristics was obtained.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram for explaining an embodiment of the present invention. FIG. 2 is a diagram showing the relationship between the electrical conductivity and the absolute temperature of the semi-amorphous semiconductor of this example. FIG. 3 is a diagram showing the relationship between the spin density and the current density of the semi-amorphous semiconductor of this example. FIG. 4 is a diagram showing a relationship between coordinates in a general phase space and free energy. FIG. 5 is a vertical cross-sectional view for explaining a MIS-FET of this embodiment having an inverter structure and provided on a substrate. [Description of References] 40 ... Insulating substrates 41, 41 '... Gate electrodes 42, 42' ... Gate insulating films 43, 43 '... Source regions 44, 44' ... Drain region 45, 45 '... channel forming regions 46, 46' ... isolation regions 50, 50 '... electrode leads

Claims (1)

(57) [Claims] In a semiconductor device in which a semiconductor including a source region, a drain region, and a channel formation region is provided over a substrate and a gate insulating film and a gate electrode are provided over the channel formation region , an intermediate between an amorphous structure and a crystal structure is provided . A MIS type semiconductor device, wherein 0.1 mol% to 5 mol% of hydrogen is added to a channel formation region having a structure .