JP2917388B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for forming a large grain Si film and a method for forming a gate insulating film.

[Prior Art] A method of forming a polycrystalline silicon thin film or a single crystal silicon thin film having a uniform crystal orientation and a large crystal grain size on an amorphous insulating substrate or an amorphous insulating film is known as SOI (Silicon).
On Insulator) technology. ｛References
SOI structure formation technology, industrial books II. Broadly speaking,
There are methods such as a recrystallization method, an epitaxial method, an insulating layer embedding method, and a bonding method. Recrystallization methods are classified into two methods: a method in which silicon is dissolved and recrystallized by laser annealing or electron beam annealing, and a solid phase growth method in which solid phase growth is performed without raising the temperature to the melting temperature.
The solid phase growth method is superior in that it can be recrystallized at a relatively low temperature. It has also been reported that despite the low-temperature heat treatment at 550 ° C., the crystal grains of the silicon thin film grew.
｛References IEEE Electron Device Letters, voi.EDL
-8, No. 8, p361, August 1987｝. Furthermore, in recent years, as the need for SOI or three-dimensional ICs, large liquid crystal display panels, and high-speed, high-resolution contact-type image sensors has increased, the technology of forming high-quality gate insulating films at low temperatures has become important. Was. Since the thermal oxidation method is a high-temperature process of about 900 to 1200 ° C., (1) an element cannot be formed on an inexpensive glass substrate. (2) Lateral diffusion of impurities. (3) In a three-dimensional IC, a lower layer element is adversely affected (diffusion of impurities, etc.). (4) A thermal oxide film of poly-Si has problems such as insufficient insulation withstand voltage and high interface state density. Currently, CDV method and optical CDV
Techniques for forming a gate oxide film by a plasma CVD method or a plasma CDV method are being studied.

[Problems to be Solved by the Invention] However, in the conventional solid phase growth method, after depositing an amorphous silicon film, the amorphous silicon film is once taken out to the atmosphere and then entered into the solid phase growth step. Therefore, oxygen and other impurities that hinder crystal growth are adsorbed on the surface of the amorphous silicon film, and crystal growth is not sufficiently performed.

In addition, in the conventional method of forming a gate oxide film, the surface of the silicon film is once exposed to the air, so that contamination is attached to the interface formed by the conventional process, resulting in an interface having a large interface state density. When a TFT is formed, the ON current is small, and the rise of the sub-Shreshhold region is slow.

The present invention solves such a problem, forms a silicon film having a large crystal grain size by a simple solid-phase growth method, and further creates an oxide film interface with a small interface state density to obtain an extremely excellent characteristic. It is intended to realize a TFT having:

[Means for Solving the Problems] A method of manufacturing a semiconductor device according to the present invention includes a step of forming an amorphous semiconductor thin film on a substrate, and a step of exposing the amorphous semiconductor thin film to the amorphous semiconductor film without exposing the amorphous semiconductor thin film to the atmosphere. Heat treating the thin film to form a crystal growth film, forming a first oxide film on the crystal growth film without exposing the crystal growth film to the atmosphere, the first oxide film and the crystal growth film Patterning, forming a second oxide film on the first oxide film and in contact with a side surface of the crystal growth film, and then forming a gate electrode on the second oxide film. Selectively implanting impurities into the crystal growth film.

In the method of manufacturing a semiconductor device according to the present invention, the first oxide film is formed by a plasma oxidation method.

The method for manufacturing a semiconductor device according to the present invention comprises the steps of:
H ₄ ) or disilane (SiH ₆ ) or trisilane (Si
Introducing a mixed gas containing at least ₃ H ₆ ) to form an amorphous semiconductor thin film on the substrate; and exhausting the mixed gas without exposing the mixed gas to the atmosphere or replacing the mixed gas with an inert gas. Forming a crystal growth film by growing the amorphous semiconductor thin film and forming a first oxide film by oxidizing a surface of the crystal growth film without exposing the crystal growth film to the atmosphere. Patterning the first oxide film and the crystal growth film; forming a second oxide film on the first oxide film and in contact with a side surface of the crystal growth film; Forming a gate electrode on the second oxide film and selectively implanting impurities into the crystal growth film.

Example In FIG. 1A, 1-1 is an amorphous insulating substrate. A quartz substrate or a glass substrate is used. Si
In some cases, a Si substrate covered with O ₄ may be used. When a quartz substrate or a Si substrate covered with SiO ₂ is used, it can withstand a high-temperature process at 1200 ° C, but when using a glass substrate, it is limited to a low-temperature process of about 600 ° C or less due to its low softening temperature. You. In addition, a glass substrate is sometimes used by coating it with an oxide film or a nitride film to prevent seepage of impurities from the substrate. First, an a-Si film 1-2 is deposited on the amorphous insulating substrate 1-1. The a-Si
It is desirable that the film 1-2 is uniform, does not contain fine crystallites, and has no nuclei of the crystal growth film. Deposition methods include EB (Electron Beam) evaporation, sputtering, and CVD.
Method, photo-CVD method, and plasma CVD method. The plasma CVD method is a method often used for manufacturing a photovoltaic element, a photodiode, a photosensitive drum, and the like. a-
To deposit a Si: H film, silane gas (SiH ₄ ) is diluted with helium gas (H _e ) or hydrogen gas (H ₂ ) to an appropriate concentration, and a high-frequency voltage is applied to cause decomposition and deposition. In the case of the plasma CDV method, a film can be formed even at a substrate temperature of 500 ° C. or lower. When a disilane gas or a trisilane gas is used instead of the silane gas, a film can be formed even at a lower substrate temperature. Further, if hydrogen plasma or argon plasma treatment is performed immediately before deposition, cleaning and film formation of the substrate surface can be continuously performed. FIG. 2 is a schematic sectional view of a chamber of the plasma CDV device. 2-1
Denotes a chamber, 2-2 denotes a high frequency power supply, 2-3 denotes a substrate holder, and 2-4 denotes a substrate.

After the formation of the a-Si: H film, the reaction gas such as silane used for the film formation is exhausted, and a vacuum is drawn in the chamber. At this time, the ultimate vacuum is desirably at least 1 × 10 ⁻⁵ Torr or less.

Subsequently, the substrate holder 2-3 in the chamber is gradually heated to solid-phase grow the a-Si: H film 1-2.
The upper limit of the heating temperature at this time is 600 ° C or 700 ° C.
In such low-temperature annealing, only crystal grains having a crystal orientation with a small activation energy for crystal growth grow selectively and grow slowly and slowly. In FIG. 1B, reference numeral 1-3 denotes a solid-phase grown Si film. Further, the inside of the chamber indicated by 2-1 in FIG. 2 may be an inert gas atmosphere such as a nitrogen gas, a helium gas, or an argon gas.
It is desirable that the temperature raising rate v _up be as small as possible so as to prevent rapid release of hydrogen from the a-Si: H film. After the solid phase growth is completed, the temperature lowering rate v _down is preferably smaller than v _up .
FIG. 3A shows a solid phase growth annealing temperature rise curve.
The vertical axis indicates the annealing temperature, and the horizontal axis indicates the time. In order to gradually release hydrogen, annealing may be performed while holding at a temperature of about 450 ° C. for a while. The temperature rise curve is shown in FIG.

Subsequently, an oxide film is continuously formed without exposing the solid-phase grown Si film to the atmosphere. After the solid phase growth is completed in the previous step, the inside of the chamber is evacuated again. About 1 × 10 ^-6 Torr vacuum
Oxygen gas is introduced into the chamber when the temperature becomes below. Then, high-frequency power is applied to generate oxygen plasma, and the surface of the solid-phase-grown Si film 1-3 is plasma-oxidized to form a thin oxide film 1-4. The internal pressure of the chamber is an oxygen atmosphere of about 0.1 to 1 Torr, and the substrate temperature is from room temperature to about 500 ° C. About 200 ° C is enough. High frequency power is applied in the range of 100W to 1000W. Oxide film 1-4
May be formed not only by a plasma oxidation method but also by a plasma CDV method in which a mixed gas of N20 gas and silane gas is decomposed by glow discharge. After forming oxide film 1-4, about 50
The oxide film 1-4 may be densified by annealing at 0 ° C. or lower.

Next, the oxide film 1-4 is patterned by photolithography, and then the solid-phase grown Si film is etched to form an island shape as shown in FIG. After film formation, the substrate is first taken out to the atmosphere in this step.

Next, as shown in FIG. 1E, a second layer oxide film 1-5 is deposited. As a deposition method, there are methods such as an LPCVD method, a photo-excitation CVD method, a plasma CVD method, an ECR plasma CVD method, and a high vacuum evaporation method.

Subsequently, as shown in FIG.
-6 is formed. As the gate electrode material, a polycrystalline silicon thin film, molybdenum silicide, or a metal film such as aluminum or chromium, or IT
A transparent conductive film such as O or SnO ₂ can be used. As a film forming method, there are a plasma CDV method, a CVD method, a sputtering method, a vacuum evaporation method, and the like. Plasma CVD
When an a-Si: H film doped with phosphorus or boron is deposited by a method and solid-phase grown is used as a gate electrode, gate wiring resistance can be reduced.

Subsequently, as shown in FIG.
Using -6 as a mask, an impurity is ion-implanted to form a source region 1-7 and a drain region 1-8 in a self-aligned manner. As the impurity, P ⁺ or As ⁺ is used for forming an Nch transistor, and B ⁺ or the like is used for forming a Pch transistor. As a method for adding impurities, there is a method such as a laser doping method or a plasma doping method in addition to the ion implantation method. Arrows indicated by 1-9 indicate ion beams of impurities. When a quartz substrate is used as the amorphous insulating substrate 1-1, a thermal diffusion method can be used. The impurity concentration is 1 × 10 ¹⁵ to 1 × 10
It should be about ²⁰ cm ^-3 .

Subsequently, as shown in FIG.
-10 is laminated. As the material of the interlayer insulating film, an oxide film or a nitride film is used. The film thickness may be any as long as the insulating property is good, but is usually about several thousand to several μm. As a method for forming a nitride film, an LPCVD method, a plasma CVD method, or the like is simple. For the reaction, a mixed gas of ammonia gas (NH ₃ ), silane gas, and nitrogen gas, or a mixed gas of silane gas and nitrogen gas is used.

Here, when hydrogen ions are introduced by a method such as a hydrogen plasma method, a hydrogen ion implantation method, or a method of diffusing hydrogen from a plasma nitride film, defects such as dangling bonds existing at the gate oxide film interface and the like become inactive. Be transformed into Such a hydrogenation step may be performed before stacking the interlayer insulating films 1-10.

Next, as shown in FIG. 1 (i), a contact hole is formed in the interlayer insulating film and the gate insulating film, a contact electrode is formed, and a source electrode 1-11 and a drain electrode 1-1 are formed.
It is assumed to be 12. The source electrode and the drain electrode are formed using a metal material such as aluminum. Thus, a thin film transistor is formed.

In the conventional solid-phase growth method, for example, after an a-Si film is deposited, it is taken out of the chamber to the atmosphere for solid-phase growth annealing and then installed again in an annealing furnace. In this way, the a-Si film was subjected to solid phase growth after being exposed to the air. Therefore, the surface of the a-Si film is contaminated with impurities such as oxygen that hinder crystal growth.
A long annealing time of several tens to several hundreds was required to increase the crystal grain size and improve the crystallinity of the Si film.

Further, in a conventional method of manufacturing a thin film transistor using a solid phase growth method, a-
Since the Si: H film was removed from the chamber after solid phase growth, the surface of the solid phase grown Si film was once exposed to the atmosphere. Therefore, various contaminants adhered to the surface and were contaminated. The interface of the gate oxide film formed in this manner has a large interface state density, causing deterioration of transistor characteristics. Further, it has been a cause of deteriorating the reliability and stability of characteristics of the element.

According to the present invention, the formation of an a-Si: H film, solid phase growth, and the gate oxide film interface can be continuously processed in the same chamber. Therefore, the time required for the solid phase growth of the a-Si: H film is reduced, and a solid phase grown Si film having a large crystal grain size and excellent crystallinity can be obtained by annealing for several hours. Further, since a very clean gate oxide film interface is formed, the interface order density of the interface is reduced, and a highly reliable device can be realized.

Conventionally, since a gate insulating film was not suitable, a sufficient withstand voltage and a good characteristic were not obtained even when a TFT was manufactured using a good solid-phase grown Si film, but according to the present invention, It is possible to realize a very excellent solid-phase growth TFT.

Since deposition can be performed at a substrate temperature of several thousand to several hundred degrees Celsius, a glass substrate having a low softening temperature can be used.

Since a gate insulating film having characteristics close to a thermally oxidized SiO ₂ film can be obtained at a low temperature, it greatly contributes to the development of SOI technology. The number of photolithography steps does not increase at all. Since it can be manufactured even in a low-temperature process of 600 ° C. or less, a glass substrate that is inexpensive and has a low heat-resistant temperature can be used. Although an excellent silicon thin film can be obtained, the cost does not increase.

When a thin film transistor is formed using the gate insulating film and the large grain polycrystalline silicon thin film obtained by the present invention,
Excellent characteristics are obtained. Compared with the conventional case, the ON current of the thin film transistor increases and the OFF current decreases. Also, the threshold voltage is reduced, and the transistor characteristics are greatly improved. The unbalance between the characteristics of the N channel and the P channel is also improved.

Since a thin film transistor having excellent characteristics can be manufactured over an amorphous insulating substrate, a sufficiently high-speed operation can be realized even when the driver circuit is applied to an active matrix substrate integrated on the same substrate. Furthermore, there is a great effect on reduction of power supply voltage, reduction of current consumption, and improvement of reliability. Further, since it can be manufactured by a low-temperature process of 600 ° C. or less, the effect is large even when the active matrix substrate is reduced in cost and its area is increased.

When the present invention is applied to a contact type image sensor in which a photoelectric conversion element and its scanning circuit are integrated in the same chip, a very large effect is obtained when reading speed is increased, resolution is increased, and further gradation is obtained. Produce When a higher resolution is achieved, application to a contact image sensor for color reading becomes easier. Of course, the effect is great also for reduction of power supply voltage, reduction of current consumption, and improvement of reliability. Further, since it can be manufactured by a low-temperature process, the length of the contact-type image sensor chip can be increased, and a single chip can realize a reading device for large facsimile such as A4 size or A3 size. Therefore, it is possible to avoid troublesome techniques such as double splicing of sensor chips and unreliable technology, and the mounting yield is improved.

In addition, application to a high-definition liquid crystal television or a thermal head in which drive circuits are integrated on the same substrate is also possible.

Not only quartz substrate or a glass substrate, a sapphire substrate (Al ₂ O ₃₎ or _{MgO · Al 2 O 3, BP} , can be used crystalline insulating substrate CaF ₂ and the like.

Although the above embodiments have been described with reference to thin film transistors as an example, the present invention can be applied to devices using thin films such as ordinary MOS transistors, bipolar transistors, and heterojunction bipolar transistors. Further, the present invention can be applied to an element utilizing SOI technology such as a three-dimensional device.

In the embodiment, a case where a plasma CVD apparatus is used as a method for forming an amorphous semiconductor thin film has been described.
Other methods such as an evaporation method, a sputtering method, and a reduced pressure CVD method can also be used. In addition, although it has been described that solid phase growth and gate oxidation are performed in the same chamber, there is no problem even if another chamber is used unless the substrate is taken out to the atmosphere.

[Effects of the Invention] As described above, according to the configuration of the present invention, a clean gate insulating film interface is formed, so that a highly reliable element can be realized.

[Brief description of the drawings]

1 (a) to 1 (i) are process sectional views showing an embodiment of the present invention. FIG. 2 is a sectional view of a chamber of the plasma CVD apparatus. 3 (a) and 3 (b) are diagrams showing a temperature rise curve showing annealing conditions for solid phase growth. 1-2; a-Si: H film 1-3; solid-phase grown Si film 1-4; thin gate interface 1-5; second oxide film

──────────────────────────────────────────────────続 き Continued on the front page (58) Fields surveyed (Int.Cl. ⁶ , DB name) H01L 29/786 H01L 21/336 H01L 21/20

Claims (3)

(57) [Claims] A step of forming an amorphous semiconductor thin film on a substrate; a step of heat-treating the amorphous semiconductor thin film without exposing the amorphous semiconductor thin film to the atmosphere to form a crystal growth film; Forming a first oxide film on the crystal growth film without exposing the crystal growth film to the atmosphere, patterning the first oxide film and the crystal growth film; Forming a second oxide film so as to be in contact with a side surface of the crystal growth film, and thereafter forming a gate electrode on the second oxide film and selectively implanting impurities into the crystal growth film; A method for manufacturing a semiconductor device, comprising: 2. The method according to claim 1, wherein the first oxide film is formed by a plasma oxidation method. 3. A monosilane (SiH ₄ ) or disilane (SiH ₄ )
A step of introducing a mixed gas containing at least H ₆ ) or trisilane (Si ₃ H ₆ ) to form an amorphous semiconductor thin film on a substrate; and Replacing the gas with an inert gas, forming the amorphous semiconductor thin film by crystal growth of a crystal growth film, and oxidizing the crystal growth film surface without exposing the crystal growth film to the atmosphere. Forming a first oxide film; patterning the first oxide film and the crystal growth film; forming a second oxide film on the first oxide film and in contact with a side surface of the crystal growth film. Forming a gate electrode on the second oxide film,
Selectively implanting impurities into the crystal growth film.