JPH0334076B2 - - Google Patents
Info
- Publication number
- JPH0334076B2 JPH0334076B2 JP19657281A JP19657281A JPH0334076B2 JP H0334076 B2 JPH0334076 B2 JP H0334076B2 JP 19657281 A JP19657281 A JP 19657281A JP 19657281 A JP19657281 A JP 19657281A JP H0334076 B2 JPH0334076 B2 JP H0334076B2
- Authority
- JP
- Japan
- Prior art keywords
- display
- signal
- output
- cpu
- clock signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000001360 synchronised effect Effects 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 4
- 230000000630 rising effect Effects 0.000 claims 2
- 238000006243 chemical reaction Methods 0.000 description 10
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 6
- 101000746134 Homo sapiens DNA endonuclease RBBP8 Proteins 0.000 description 2
- 101000969031 Homo sapiens Nuclear protein 1 Proteins 0.000 description 2
- 102100021133 Nuclear protein 1 Human genes 0.000 description 2
- 101150080085 SEG1 gene Proteins 0.000 description 2
- 101100421134 Schizosaccharomyces pombe (strain 972 / ATCC 24843) sle1 gene Proteins 0.000 description 2
- 239000013256 coordination polymer Substances 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Landscapes
- Digital Computer Display Output (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19657281A JPS5897088A (ja) | 1981-12-07 | 1981-12-07 | 表示ram制御方式 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19657281A JPS5897088A (ja) | 1981-12-07 | 1981-12-07 | 表示ram制御方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5897088A JPS5897088A (ja) | 1983-06-09 |
JPH0334076B2 true JPH0334076B2 (enrdf_load_stackoverflow) | 1991-05-21 |
Family
ID=16359965
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19657281A Granted JPS5897088A (ja) | 1981-12-07 | 1981-12-07 | 表示ram制御方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5897088A (enrdf_load_stackoverflow) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0673061B2 (ja) * | 1984-04-23 | 1994-09-14 | 株式会社東芝 | 表示制御回路 |
JPS63887A (ja) * | 1986-06-19 | 1988-01-05 | Hitachi Maxell Ltd | メモリカ−トリツジ |
-
1981
- 1981-12-07 JP JP19657281A patent/JPS5897088A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5897088A (ja) | 1983-06-09 |
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