JPH0332103B2 - - Google Patents

Info

Publication number
JPH0332103B2
JPH0332103B2 JP21331084A JP21331084A JPH0332103B2 JP H0332103 B2 JPH0332103 B2 JP H0332103B2 JP 21331084 A JP21331084 A JP 21331084A JP 21331084 A JP21331084 A JP 21331084A JP H0332103 B2 JPH0332103 B2 JP H0332103B2
Authority
JP
Japan
Prior art keywords
post
access
instruction
memory
store
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP21331084A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61100845A (ja
Inventor
Mikio Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP21331084A priority Critical patent/JPS61100845A/ja
Publication of JPS61100845A publication Critical patent/JPS61100845A/ja
Publication of JPH0332103B2 publication Critical patent/JPH0332103B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Complex Calculations (AREA)
JP21331084A 1984-10-12 1984-10-12 メモリアクセス同期制御方式 Granted JPS61100845A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21331084A JPS61100845A (ja) 1984-10-12 1984-10-12 メモリアクセス同期制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21331084A JPS61100845A (ja) 1984-10-12 1984-10-12 メモリアクセス同期制御方式

Publications (2)

Publication Number Publication Date
JPS61100845A JPS61100845A (ja) 1986-05-19
JPH0332103B2 true JPH0332103B2 (enrdf_load_stackoverflow) 1991-05-09

Family

ID=16637016

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21331084A Granted JPS61100845A (ja) 1984-10-12 1984-10-12 メモリアクセス同期制御方式

Country Status (1)

Country Link
JP (1) JPS61100845A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06168263A (ja) * 1992-11-30 1994-06-14 Fujitsu Ltd ベクトル処理装置
US20090063734A1 (en) * 2005-03-14 2009-03-05 Matsushita Electric Industrial Co., Ltd. Bus controller

Also Published As

Publication number Publication date
JPS61100845A (ja) 1986-05-19

Similar Documents

Publication Publication Date Title
US4412303A (en) Array processor architecture
US4365292A (en) Array processor architecture connection network
US5307483A (en) Synchronization instruction for multiple processor network
JP2677414B2 (ja) 命令実行のシリアライズ制御方式
KR920006851A (ko) 데이터 처리시스템 및 방법
EP0125855B1 (en) Buffer-storage control system
CA2497807A1 (en) Vector processing apparatus with overtaking function
WO1996027833A1 (fr) Unite de traitement informatique
JPH0564825B2 (enrdf_load_stackoverflow)
JP3505728B2 (ja) 記憶制御装置
JPH0332103B2 (enrdf_load_stackoverflow)
JP3628265B2 (ja) マルチプロセッサシステム装置
US5185879A (en) Cache system and control method therefor
US4547848A (en) Access control processing system in computer system
JPH0285960A (ja) 情報処理システム
CA2157435C (en) Vector data bypass mechanism for vector computer
JPH0373039A (ja) 処理装置およびマルチプロセッサシステム
KR920008426B1 (ko) 내부 버스라인 수를 줄인 데이타 처리 장치
JP2719227B2 (ja) 処理装置
JPH01280858A (ja) 主記憶装置のロック制御方式
JP2513846B2 (ja) ベクトル命令生成方式
JP2002024010A (ja) メモリロード制御システム及びそのメモリロード制御方式
JP2912738B2 (ja) シリアライズ制御方法
JPS6266348A (ja) キヤツシユメモリ制御装置におけるストアチエツク方式
JPH0473183B2 (enrdf_load_stackoverflow)

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees