JPH0473183B2 - - Google Patents

Info

Publication number
JPH0473183B2
JPH0473183B2 JP62031790A JP3179087A JPH0473183B2 JP H0473183 B2 JPH0473183 B2 JP H0473183B2 JP 62031790 A JP62031790 A JP 62031790A JP 3179087 A JP3179087 A JP 3179087A JP H0473183 B2 JPH0473183 B2 JP H0473183B2
Authority
JP
Japan
Prior art keywords
vector
unit
instruction
scalar
sent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62031790A
Other languages
English (en)
Japanese (ja)
Other versions
JPS63198151A (ja
Inventor
Kenichi Sakai
Kazushi Sakamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3179087A priority Critical patent/JPS63198151A/ja
Publication of JPS63198151A publication Critical patent/JPS63198151A/ja
Publication of JPH0473183B2 publication Critical patent/JPH0473183B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053Vector processors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
  • Multi Processors (AREA)
JP3179087A 1987-02-13 1987-02-13 情報処理装置 Granted JPS63198151A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3179087A JPS63198151A (ja) 1987-02-13 1987-02-13 情報処理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3179087A JPS63198151A (ja) 1987-02-13 1987-02-13 情報処理装置

Publications (2)

Publication Number Publication Date
JPS63198151A JPS63198151A (ja) 1988-08-16
JPH0473183B2 true JPH0473183B2 (enrdf_load_stackoverflow) 1992-11-20

Family

ID=12340861

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3179087A Granted JPS63198151A (ja) 1987-02-13 1987-02-13 情報処理装置

Country Status (1)

Country Link
JP (1) JPS63198151A (enrdf_load_stackoverflow)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0685166B2 (ja) * 1985-07-19 1994-10-26 富士通株式会社 マルチプロセッサシステムの命令制御方式

Also Published As

Publication number Publication date
JPS63198151A (ja) 1988-08-16

Similar Documents

Publication Publication Date Title
US6671827B2 (en) Journaling for parallel hardware threads in multithreaded processor
US5293500A (en) Parallel processing method and apparatus
US4930068A (en) Data processor having different interrupt processing modes
JP2644780B2 (ja) 処理依頼機能を持つ並列計算機
US5440747A (en) Data processor with control logic for storing operation mode status and associated method
US20040205719A1 (en) Hop method for stepping parallel hardware threads
EP0398639B1 (en) Serializing system between vector instruction and scalar instruction in data processing system
KR19990044957A (ko) 데이터 처리기에서의 후속 명령 처리에 영향을 미치는 방법 및장치
US5497496A (en) Superscalar processor controlling fetching of instructions based upon number of empty instructions registers detected for each cycle
US6405234B2 (en) Full time operating system
US7565659B2 (en) Light weight context switching
JP2531760B2 (ja) ベクトル処理装置
US4152763A (en) Control system for central processing unit with plural execution units
JP3431941B2 (ja) データ処理システムにおける命令の実行順序を決定する方法および装置
US6738837B1 (en) Digital system with split transaction memory access
US6675290B1 (en) Processor for improving instruction utilization using multiple parallel processors and computer system equipped with the processor
CA1272295A (en) Multi-channel shared resource processor
JP2009193378A (ja) ベクトル処理装置
US20140136818A1 (en) Fetch less instruction processing (flip) computer architecture for central processing units (cpu)
EP1237081B1 (en) Multi-processor system
JPH0473183B2 (enrdf_load_stackoverflow)
JPH02211534A (ja) 並列処理装置
KR900001999B1 (ko) 멀티프로세서 시스템(multiprocessor system)
JP4738891B2 (ja) データ処理装置およびそのポーリング・ループ管理方法
JPS629460A (ja) マルチプロセツサシステムの命令制御方式

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees