JPH0328103B2 - - Google Patents

Description

[Detailed Description of the Invention] [Summary] 16-level quadrature amplitude modulation (hereinafter referred to as 16-level QAM)
When reproducing a carrier wave from a carrier wave, error signals are generated not only for signal points on the diagonal line but also for other signal points using a simple additional circuit to improve reproduction ability.

[Industrial application field]

The present invention relates to a 16-value QAM carrier wave recovery circuit.

There is a demand for a carrier wave regeneration circuit with high regeneration ability and low cost.

[Conventional technology]

Conventional carrier regeneration circuits have two types: all-signal point control type and selective control type.

Among these, the all signal point control type uses an A/D converter and uses the error signal obtained when the signal points are identified in detail, and determines whether the phase is leading or lagging based on the relationship between the I-ch and Q-ch error signals. to control the VCO and regenerate the carrier wave.

The selection control type is shown in FIG.

In Figure 3, the input IF signal is VCO11
The output is mixed by a π/2 phase shifter 12 with an oscillation signal having a different π/2 phase from each other by mixers 13 and 14, and further output as I-ch and Q-ch baseband signals via low-pass filters 15 and 16. be done.

The I-ch and Q-ch baseband signals are transmitted through absolute value circuits 17 and 18, an adder 19, a subtracter 20,
Discriminators 21 to 26, exclusive OR circuits 27 to 3
0, OR circuit 31, D-type flip-flop 32
A circuit consisting of the following selects a signal point and detects a phase error.

Output a of exclusive OR circuits 27, 28, 29,
b and c result in determination results having boundaries as shown in FIG. 5 a, b, and c, respectively. Moreover, the discriminators 21, 2
6. Outputs d, e, and f of the exclusive OR circuit 30 result in determination results having boundaries as shown in FIG. 5, d, e, and f, respectively. Therefore, when the output f is "0", it represents a signal point on the diagonal line (black circle), and when it is "1", it represents another signal point (white circle). It is input to terminal C, and the output c is determined by its falling edge. Whether the judgment output Q is "0" or "1" indicates whether the output of the VCO 11 is in a delayed phase or an advanced phase, so this output Q is passed through the loop filter 33 to the VCO 11 as a control voltage. When input, a carrier wave synchronized with the input signal is obtained from the VCO 11.

[Problem that the invention seeks to solve]

However, the former all-signal-point control type that uses the error signal from the A/D converter has the problem that phase error information cannot be extracted accurately and that erroneous error signals are extracted due to amplitude fluctuations. Ta.

Further, the latter selective control type has a problem in that when non-selected signal points are consecutive, malfunction occurs due to a pattern effect that deteriorates control error reproduction C/N and error rate characteristics.

[Means for solving problems]

In order to solve the above-mentioned problems, the present invention includes a signal point identification section 2 that identifies whether or not the signal obtained from the detection section 1 is a point on the diagonal of the seating surface plane, as shown in FIG. A first error signal generating section 3 generates an error signal with the diagonal line as the boundary when the point is on the upper side, and generates an error signal with the boundary as a straight line passing through the point and parallel to the diagonal line when the point is not on the diagonal line. and a selection unit 5 that selects the output of the first error signal generation unit 3 or the second error signal generation unit 4 based on the determination result from the identification unit 2, The output of the selection section 5 is applied to the VCO 7 via a loop filter 6.

[Effect]

As described above, in the present invention, if the signal point is on the diagonal line, the control is similar to the conventional selection control type, and if the signal point is not on the diagonal line, the error signal passes through that point and uses a straight line parallel to the diagonal line as the boundary. is occurring.

Therefore, since all signal points are controlled, malfunctions due to pattern effects do not occur, and since all signal points are bordered by a straight line at 45 degrees to the coordinate axis, the influence of amplitude fluctuations is small and accurate phase errors can be achieved. Information can be obtained.

〔Example〕

A block diagram of an embodiment of the present invention is shown in FIG. In FIG. 2, the same reference numerals as in FIG. 4 indicate the same objects, and what is different from FIG. This is the point where it disappears.

The fourth point is where signals a to f are created from the input signal.
Since it is the same as the figure, the explanation will be omitted. The outputs g to j of the exclusive OR circuits 38 to 41 result in determination results having boundaries as shown in FIG. 3 g to j. Here, the output is for a signal point (white circle) that is not on the diagonal line, and the VCO
11 indicates whether the output is a delayed phase or an advanced phase. Then, the selector 42 selects and outputs either output c or output j based on a signal indicating whether the signal point is on the diagonal of the output f, and the D-type flip-flop 32 selects and outputs either the output c or the output j based on the signal indicating whether the signal point is on the diagonal line of the output f. The selector output is determined every time it falls and is output to Q. The Q output is loop filter 3
3 as a control voltage to the VCO 11,
The carrier wave reproduced from the VCO 11 is output.

In this way, the π/2 phase shifter 12, the mixer 13,
14, low-pass films 15 and 16 constitute a detection section, absolute value circuits 17 and 18, and discriminators 21 and 2
6. The exclusive OR circuit 30 constitutes a signal point discriminator, and includes an adder 19, a subtracter 20, and discriminators 22,2
3, 24, 25, exclusive OR circuit 27, 28,
29 constitutes a first error signal generation section, and the discriminator 3
4, 35, 36, 37, exclusive OR circuit 38,
39, 40, and 41 constitute a second error signal generation section, and the selector 42 and the D-type flip-flop 32 constitute a selection section.

[Effects of the Invention] As described above, according to the present invention, all signal points are used and the influence of amplitude fluctuations is small, so that stable carrier wave reproduction can be performed.

[Brief explanation of the drawing]

Figure 1 is a block diagram of the principle of the present invention, Figure 2 is a block diagram of an embodiment of the present invention, and Figure 3 is a diagram of Figures 2 g to j.
FIG. 4 is a block diagram of a conventional carrier wave recovery circuit, and FIG. 5 is a diagram showing determination of the outputs of FIGS. 4a to 4f. In the drawing, 1 is a detection section, 2 is a signal point identification section, 3 is a first error signal generation section, 4 is a second error signal generation section, 5 is a selection section, 6 is a loop filter,
7 is a VCO, 17 and 18 are absolute value circuits, 19 is an adder, 20 is a subtracter, 21 to 26, 34 to 37 are discriminators, 27 to 30, 38 to 41 are exclusive OR circuits, and 42 is a selector , 32 indicate D-type flip-flops, respectively.

Claims (1)

[Claims] 1. In the demodulation of 16-level orthogonal amplitude modulation, there is a detection unit 1 that orthogonally detects a 16-level quadrature amplitude modulated wave input using a regenerated carrier wave; A signal point identification unit 2 that identifies whether it is a signal point on the diagonal of a coordinate plane indicating a point (hereinafter referred to as a first type signal point) or another signal point (hereinafter referred to as a second type signal point) and a first inputting the detection output and outputting an error signal for the first type signal point with one straight line passing through both of the first type signal points in each quadrant of the coordinate plane as a boundary. an error signal generating section 3, which inputs the detection output and passes through the two signal points of the second type in each quadrant of the coordinate plane, respectively, and generates the first signal;
a second signal point outputting an error signal for the second type signal point with two straight lines parallel to the boundary line of the second type signal point as the boundary;
an error signal generation section 4; and a selection section that selects and outputs either the output of the first error signal generation section 3 or the output of the second error signal generation section 4 based on the output from the signal point identification section. 5
A loop filter receives the output of the selection section 5 and outputs a control signal, and a voltage controlled oscillator 7 outputs a recovered carrier wave whose frequency is controlled by the output of the loop filter to the detection section 6. A carrier wave regeneration circuit characterized by: