JP4182594B2 - PAL sequence discrimination method and circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to PAL (Phase Alternation The present invention relates to a PAL sequence discrimination method and circuit suitable for use in video equipment of the (Line) system. More specifically, an internal sequence signal used for color signal demodulation processing of a PAL video signal can be generated satisfactorily.
[0002]
[Prior art]
In color signal demodulation processing of a PAL video signal, an internal sequence signal having a period of two horizontal lines that is inverted every horizontal line of the input video signal is generated, and color signal demodulation processing is performed using this internal sequence signal. . In that case, the phase of the generated internal sequence signal and the PAL sequence of the input video signal must match, and the phase of the generated internal sequence signal is controlled by discriminating between these matches / mismatches (V It is necessary to reverse the axis.
[0003]
Therefore, as a conventional PAL sequence discrimination method, for example, a method is known in which discrimination is performed based on the sign of the burst portion of a signal appearing in the V-axis system of the system. That is, in this first method, if the value of the burst portion of the V-axis system is positive, the line is a line in which the V-axis component of the signal is transmitted non-inverted, and the value of the burst portion of the V-axis system is negative. If so, it can be determined that the line is a line in which the V-axis component of the signal is transmitted with inversion.
[0004]
Further, for example, a method is known in which discrimination is performed based on a difference between lines in a burst portion of a signal appearing in the V-axis system of the system. In this second method, the value of the previous line is subtracted from the value of the current line with respect to the value of the burst portion of the V-axis system, and if this subtraction result is positive, the V-axis component of the signal is non-inverted for that line. If the transmitted line and the subtraction result are negative, it can be determined that the line is a line transmitted by inverting the V-axis component of the signal.
[0005]
[Problems to be solved by the invention]
However, in these methods, processing is performed depending on the demodulation axis (U / V axis). Therefore, in these methods, a normal operation can be performed only in a state where the demodulation axis of the system such as the video equipment and the axis of the input color signal coincide (phase locked state). The allowable error in the determination is ± 45 degrees in the first method and ± 90 degrees in the second method.
[0006]
On the other hand, in a system such as the above-described video equipment, usually APC (Automatic Phase The above-described condition is established in a steady state by providing the control. However, if there is a discontinuity in the carrier frequency or phase of the chrominance signal due to, for example, switching of the signal source, the system demodulation axis and the input chrominance signal axis will not coincide with each other at that moment, and the system transient response will converge. Thus, it takes about several milliseconds to several tens of milliseconds to reach the steady state.
[0007]
Therefore, the conventional PAL sequence discrimination method described above can be discriminated only when such a transient response is almost converged. In this case, the change in color due to the transient response of APC is smooth, whereas the change in color due to the failure to properly distinguish the PAL sequence results in a discontinuous change between lines. Such a delay in discriminating the PAL sequence causes a possibility that the reliability of the system and the commercial value are remarkably lowered.
[0008]
Furthermore, in the system such as the video equipment described above, for example, a VTR (Video Tape When a video signal for special playback of (Recorder) is supplied, the above problem becomes more prominent. That is, in the special reproduction of the VTR, the color signal carrier is often discontinuous at the noise bar. At this time, a transient response similar to that described above is generated, and color disturbance occurs after each noise bar, which is particularly disturbing.
[0009]
As described above, in the conventional PAL sequence determination method described above, since the determination operation is performed after the convergence of the APC transient response, the color disturbance period becomes longer, and the system reliability and the commercial value are significantly reduced. It is what produces.
[0010]
As another problem, in the above-described PAL sequence determination method, there is a possibility that erroneous determination may occur due to an instantaneous signal level drop or disappearance such as dropout in a VTR.
[0011]
That is, when such a dropout occurs, in the first method described above, if the burst portion disappears, the determination result is determined by noise, so the determination result becomes random. In the second method, when the burst portion disappears, one of the values from which the original line difference should be taken becomes almost 0. Therefore, the second method is equivalent to the first method described above, and the phase error tolerance is increased. Is less likely to be affected by noise.
[0012]
This application has been made in view of such points, and the problem to be solved is that in the conventional PAL sequence discrimination method and circuit, the discrimination operation is after convergence of the transient response of APC. The color disturbance period becomes longer, the reliability of the system and the commercial value are remarkably lowered, and there is a possibility that erroneous discrimination may occur due to an instantaneous decrease or disappearance of the signal level such as dropout.
[0013]
[Means for Solving the Problems]
  Therefore, in the present invention, the burst phase is alternately shifted to +45 degrees and −45 degrees for each horizontal line in accordance with the generated internal sequence signal, and the magnitude of the difference between the lines of the phase-shifted burst is a predetermined discrimination threshold.(Added value of sum of lines of phase-shifted burst and predetermined offset)In this case, it is determined that the internal sequence signals are inconsistent. According to this, the sequence determination can be performed even if the phase is not locked because it does not depend on the demodulation axis of the system. In addition, since there is a margin in the discrimination threshold, it is possible to prevent erroneous discrimination due to a momentary drop in level by setting an appropriate discrimination threshold.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
  That is, the first embodiment of the present invention is a PAL sequence discrimination method in color signal demodulation processing of a PAL input video signal, which is an internal sequence signal of two horizontal line cycles that is inverted for each horizontal line of the input video signal. In accordance with the internal sequence signal, the burst phase is alternately shifted to +45 degrees and −45 degrees for each horizontal line, and the magnitude of the line-to-line difference of the phase-shifted burst is obtained.The sum of the line-to-line sum of the phase-shifted burst and the specified offset amountAs described above, it is determined that the internal sequence signal does not match the PAL sequence of the input video signal.
[0015]
  The second embodiment of the present invention is a PAL sequence determination circuit in color signal demodulation processing of a PAL input video signal, and an internal sequence of two horizontal line cycles that is inverted for each horizontal line of the input video signal. An internal sequence signal generating means for generating a signal, a phase shift means for alternately shifting the burst phase to +45 degrees and -45 degrees for each horizontal line in accordance with the internal sequence signal, and the magnitude of the line-to-line difference of the phase shifted burst A line difference calculating means for determining the difference between the lines.The sum of the line-to-line sum of the phase-shifted burst and the specified offset amountAs described above, it is determined that the internal sequence signal does not match the PAL sequence of the input video signal.
[0016]
Hereinafter, the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a configuration of an embodiment of a PAL sequence determination circuit to which the present invention is applied. The embodiment shown in FIG. 1 forms a circuit by digital signal processing. In FIG. 1, the signal from the input terminal 1 to which the carrier color signal or the composite video signal is supplied is supplied to the first and second multipliers 2a and 2b for phase detection.
[0017]
Also, a carrier wave phase generation circuit 4 is provided, and from this carrier wave phase generation circuit 4, for example, a sawtooth wave signal whose frequency is substantially the same as that of a color carrier wave is generated. Therefore, the output value of the carrier wave phase generation circuit 4 has a phase meaning. Further, the carrier wave phase generation circuit 4 is phase-locked by the above-mentioned APC so that the system demodulation axis and the input color signal axis coincide with each other in a steady state.
[0018]
Here, for example, a phase error is detected by the phase detector 3a from output signals of burst gates 12a and 12b described later. That is, the output signals of the burst gates 12a and 12b are designed so that, for example, the V-axis signal has a zero value and the U-axis signal has a negative value in a phase locked state. Therefore, a phase error is detected from these outputs by the phase detector 3a. The phase error is fed back to the carrier wave phase generation circuit 4 through the loop filter 3b, so that the phase control (APC) of the generated sawtooth wave signal is performed so that the demodulation axis of the system coincides with the axis of the input color signal. ) Is performed.
[0019]
Further, the sawtooth wave signal generated by the carrier wave phase generation circuit 4 passes through an arithmetic circuit 5 for performing phase shift described later, for example, a ROM (Read Only The data is supplied to a conversion table 6 for sine and cosine (Memory). Thus, in this conversion table 6, for example, signals converted into sine and cosine as shown in FIGS. 2A and 2B are formed according to the phase indicated by the sawtooth wave signal as shown in F of FIG. The
[0020]
These sine and cosine signals are supplied to multipliers 2a and 2b, respectively, and the chrominance signals are frequency-converted to the base band, respectively, so that quadrature two-component signals are extracted. Further, the quadrature two-component signals extracted from the multipliers 2a and 2b are supplied to a color signal processing circuit 8 for demodulating the PAL color signal through low-pass filters 7a and 7b that extract the base band of the color signal. The The color signal processing circuit 8 is processed in accordance with an internal sequence signal synchronized with the horizontal synchronizing signal (H) from the sequence generating circuit 9.
[0021]
Further, the switch 10 for selecting a value corresponding to a phase of, for example, ± 45 degrees is controlled by the internal sequence signal from the sequence generation circuit 9, and a signal as shown in E of FIG. Then, the 0 level signal is switched to the signal from the switch 10 only by the switch 11 at the timing of the burst portion, and for example, a signal as shown in FIG. Further, this signal is supplied to the arithmetic circuit 5 described above. Note that the ratio between the horizontal scanning period and the waveform period in FIG. 2 is different from the actual one for the sake of explanation.
[0022]
Thereby, for example, a sawtooth wave signal having a phase value shifted alternately to +45 degrees and −45 degrees for every horizontal line only at the timing of the burst portion as shown in FIG. This signal is composed of a digital value of a predetermined bit, and the value overflowed by the shift is ignored, that is, the value next to the maximum value is set to the minimum value. This signal is converted into sine and cosine by the conversion table 6 and supplied to the multipliers 2a and 2b.
[0023]
Further, the components of the color signal of the base band of two orthogonal components extracted from the above-described low-pass filters 7a and 7b are supplied to the burst gates 12a and 12b, and the signal of the burst part is extracted. The extracted signal is supplied to an inter-line difference calculation circuit 13 for determining the magnitude of the line-to-line difference, and the calculated line-to-line difference magnitude is supplied to the comparison circuit 14 to obtain a predetermined discrimination threshold from the terminal 15. To be compared. Further, when the magnitude of the difference between the lines is equal to or greater than a predetermined discrimination threshold, the output signal is supplied to the sequence generation circuit 9 and the internal sequence signal generated is inverted. The terminal 16 is supplied with a horizontal synchronizing signal (H).
[0024]
That is, in this circuit, when the internal sequence signal matches the PAL sequence of the input video signal, as shown in FIG. 3, for example, the signal of the burst portion in the horizontal scanning period in which (RY) is not inverted The phase of the burst phase that has been shifted by +45 degrees and the phase of the burst that has been phase shifted by shifting the signal of the burst portion in the horizontal scanning period in which (R−Y) is inverted by −45 degrees are the same phase. For this reason, the magnitude of these line differences taken out from the line difference calculation circuit 13 is almost zero.
[0025]
On the other hand, when the internal sequence signal does not match the PAL sequence of the input video signal, as shown in FIG. 4, for example, the signal of the burst portion in the horizontal scanning period in which (RY) is inverted is shifted by +45 degrees. The burst phase that has been subjected to the phase shift process and the burst phase that has been subjected to the phase shift process in which the signal of the burst part in the horizontal scanning period in which (R−Y) is not inverted are shifted by −45 degrees are opposite to each other. For this reason, a signal approximately twice the burst level is extracted from the inter-line difference calculation circuit 13, and an output signal equal to or greater than a predetermined determination threshold is extracted from the comparison circuit 14.
[0026]
Thus, for example, by selecting a predetermined discrimination threshold supplied from the terminal 15 to the comparison circuit 14 to be larger than 0 and smaller than a size corresponding to twice the burst level, the internal sequence signal described above becomes the PAL of the input video signal. It is possible to determine whether the sequence matches or does not match. 3 and 4 are drawn in a state where the demodulation axis and the axis of the input video signal coincide with each other for the sake of clarity, but here, the phase-shifted burst is in-phase or anti-phase between the lines. Since only the problem is, the whole may be rotated while maintaining the relative relationship, and the coincidence of the axes is not a requirement.
[0027]
In the above description, the case where the frequencies are the same is described, but the frequency coincidence is not a necessary condition. That is, since the frequency of the color subcarrier is generally accurate, the frequency variable range of the normal converted carrier is set to a standard frequency of about ± 500 Hz to 1 kHz. Therefore, the difference between the color subcarrier frequency and the converted carrier frequency of the input video signal is about 1 kHz at the maximum.
[0028]
On the other hand, the phase rotation after frequency conversion per line when this frequency difference is 1 kHz is about 23 degrees. Therefore, considering this frequency variation in the above-described determination, it is only necessary to distinguish between the case where the phase-shifted burst line relationship is 0 ± 23 degrees and the case where it is 180 ± 23 degrees. When this is converted into the output of the interline difference calculation circuit 13, it corresponds to approximately 0.40 times and 1.96 times the burst level, respectively, and can be discriminated if the above-described discrimination threshold is set during this time. is there.
[0029]
For example, if the discrimination threshold is set to about 1.5 times the burst level, the comparison circuit 14 does not generate an inversion instruction pulse even if one of the two bursts related to discrimination disappears. be able to. This is effective, for example, as a countermeasure against erroneous discrimination due to dropout in the above-described VTR playback.
[0030]
Further, as shown in FIG. 5, a continuity determination circuit 20 may be provided between the comparison circuit 14 and the sequence generation circuit 9. The continuity determination circuit 20 transmits a pulse to the subsequent stage only when, for example, the comparison circuit 14 generates inversion instruction pulses continuously for a predetermined number of lines. According to this configuration, it is possible to further reduce the risk of erroneous determination caused by dropout or instantaneous noise.
[0031]
Further, FIG. 6 shows a specific configuration of the inter-line difference calculation circuit 13. Here, A in FIG. 6 is a vector difference calculated faithfully based on the principle. In FIG. 6A, for example, signals delayed by delay circuits (1HDL) 21a and 21b of one horizontal period are subtracted by subtracting circuits 22a and 22b from the signals of the above-described burst gates 12a and 12b, respectively. These subtracted outputs are squared by the squaring circuits 23a and 23b and supplied to the adding circuit 24. The added output is supplied to the square root (√) circuit 25 to calculate a signal corresponding to the difference between the lines. .
[0032]
In this way, the magnitude of the line-to-line difference can be obtained. However, considering that the discrimination threshold has a margin as described above, the circuit scale can be reduced by performing, for example, approximate calculation. That is, in the circuit of FIG. 6B, the square root circuit 25 can be omitted by using the absolute value (ABS) circuits 26a and 26b instead of the square calculation and adding the absolute values by the adding circuit 27. Further, as shown in FIG. 6C, the approximate value of the signal corresponding to the difference between the lines is also calculated by supplying the outputs of the absolute value circuits 26a and 26b to the maximum value (MAX) circuit 28 and taking out the larger one. .
[0033]
Accordingly, in this circuit, the burst phase is alternately shifted to +45 degrees and −45 degrees for each horizontal line according to the generated internal sequence signal, and the magnitude of the phase difference between the lines of the phase-shifted burst is equal to or greater than a predetermined determination threshold value. In some cases, it is not dependent on the demodulation axis of the system by discriminating that the internal sequence signals do not match, so sequence discrimination can be performed even if the phase is not locked, and there is a margin in the discrimination threshold. By setting the discrimination threshold, it is possible to prevent erroneous discrimination due to a momentary drop in level.
[0034]
As a result, in the conventional PAL sequence discrimination method and circuit, since the discrimination operation is after convergence of the transient response of APC, the color disturbance period becomes long, and the reliability and commercial value of the system are remarkably lowered. According to the present invention, these problems can be easily solved in the case where there is a risk of erroneous discrimination due to a momentary drop or disappearance of the signal level such as dropout.
[0035]
FIG. 7 is a block diagram showing the configuration of another embodiment of the PAL sequence determination circuit to which the present invention is applied. Also in the configuration of FIG. 7, the signal from the input terminal 1 to which the carrier color signal or the composite video signal is supplied is supplied to the first and second multipliers 2a and 2b for phase detection.
[0036]
Also, a carrier wave phase generation circuit 4 is provided, and from this carrier wave phase generation circuit 4, for example, a sawtooth wave signal whose frequency is substantially the same as that of a color carrier wave is generated. Therefore, the output value of the carrier wave phase generation circuit 4 has a phase meaning. Further, the carrier wave phase generation circuit 4 is phase-locked by, for example, APC so that the demodulation axis of the system and the axis of the input color signal coincide with each other in a steady state.
[0037]
Here, for example, a phase error is detected by the phase detector 3a from output signals of burst gates 12a and 12b described later. That is, the output signals of the burst gates 12a and 12b are designed so that, for example, the V-axis signal has a zero value and the U-axis signal has a negative value in a phase locked state. Therefore, a phase error is detected from these outputs by the phase detector 3a. The phase error is fed back to the carrier wave phase generation circuit 4 through the loop filter 3b, so that the phase control (APC) of the generated sawtooth wave signal is performed so that the demodulation axis of the system coincides with the axis of the input color signal. ) Is performed.
[0038]
Further, the sawtooth wave signal generated by the carrier wave phase generation circuit 4 passes through an arithmetic circuit 5 for performing phase shift described later, for example, a ROM (Read Only The data is supplied to a conversion table 6 for sine and cosine (Memory). As a result, a signal converted into sine and cosine by the conversion table 6 is formed.
[0039]
These sine and cosine signals are supplied to multipliers 2a and 2b, respectively, and the chrominance signals are frequency-converted to the base band, respectively, so that quadrature two-component signals are extracted. Further, the quadrature two-component signals extracted from the multipliers 2a and 2b are supplied to a color signal processing circuit 8 for demodulating the PAL color signal through low-pass filters 7a and 7b that extract the base band of the color signal. The The color signal processing circuit 8 is processed in accordance with an internal sequence signal synchronized with the horizontal synchronizing signal (H) from the sequence generating circuit 9.
[0040]
Further, the switch 10 for selecting a value corresponding to a phase of, for example, ± 45 degrees is controlled by the internal sequence signal from the sequence generation circuit 9. Then, the signal of the 0 level is switched to the signal from the switch 10 only at the timing of the burst portion by the switch 11. Further, this signal is supplied to the arithmetic circuit 5 described above.
[0041]
As a result, a signal whose phase value is alternately shifted to +45 degrees and −45 degrees is extracted from the arithmetic circuit 5 only for the timing of the burst portion for each horizontal line. This signal is composed of a digital value of a predetermined bit, and the value overflowed by the shift is ignored, that is, the value next to the maximum value is set to the minimum value. This signal is converted into sine and cosine by the conversion table 6 and supplied to the multipliers 2a and 2b.
[0042]
In addition, the baseband color signal components of the two orthogonal components extracted from the low-pass filters 7a and 7b are supplied to the burst gates 12a and 12b, and the signals of the burst portion are extracted. This extracted signal is supplied to an inter-line difference calculation circuit 13 for obtaining the magnitude of the inter-line difference. The extracted signal is also supplied to the inter-line sum calculation circuit 17 for obtaining the magnitude of the inter-line sum. Further, an arbitrary offset from the terminal 19 is added to the calculated inter-line sum by the adding circuit 18.
[0043]
Then, the magnitude of the line difference calculated by the above-described line difference calculation circuit 13 is supplied to the comparison circuit 14 and compared with a predetermined discrimination threshold value from the adder circuit 18, and the magnitude of the line difference is a predetermined discrimination. The internal sequence signal generated when the output signal is supplied to the sequence generation circuit 9 when the threshold value is exceeded is inverted. The terminal 16 is supplied with a horizontal synchronizing signal (H).
[0044]
That is, in the configuration of FIG. 7, the sum of the inter-line sum of the phase-shifted bursts and the predetermined offset amount is used as the discrimination threshold. And according to this structure, even if the average burst level of an input video signal changes, the effect that discrimination | determination can be performed stably can be acquired. The above-described offset value may be 0 in principle, but this value can be selected as necessary. For example, if a positive value is given, the inversion of the internal sequence signal can be made difficult to occur.
[0045]
Further, also in the configuration of FIG. 7, a continuity determination circuit 20 can be provided between the comparison circuit 14 and the sequence generation circuit 9 as shown in FIG. The continuity determination circuit 20 transmits a pulse to the subsequent stage only when, for example, the comparison circuit 14 generates inversion instruction pulses continuously for a predetermined number of lines. This can further reduce the risk of erroneous discrimination caused by dropout or instantaneous noise.
[0046]
FIG. 8 shows a specific configuration of the portion surrounded by the line in FIG. 7 including the inter-line difference calculation circuit 13 and the inter-line sum calculation circuit 17. In FIG. 8, parts corresponding to those in the configuration shown in FIG.
[0047]
Here, A in FIG. 8 is a faithful calculation based on the principle. In FIG. 8A, for example, signals delayed by delay circuits (1HDL) 21a and 21b of one horizontal period are subtracted by subtracting circuits 22a and 22b from the signals of the above-described burst gates 12a and 12b, respectively. These subtracted outputs are squared by the squaring circuits 23a and 23b and supplied to the adding circuit 24. The added output is supplied to the square root (√) circuit 25 to calculate a signal corresponding to the difference between the lines. .
[0048]
Further, the signals from the burst gates 12a and 12b and the signals delayed by the delay circuits 21a and 21b are added by the adder circuits 31a and 31b. These addition outputs are squared by the square circuits 32a and 32b, respectively, and supplied to the addition circuit 33. This addition output is supplied to the square root (√) circuit 34 to calculate a signal corresponding to the sum between lines. . In this way, the difference between lines and the sum of lines can be obtained.
[0049]
Furthermore, considering that there is a margin in the discrimination threshold as described above, the circuit scale can be reduced by performing approximate calculation, for example. That is, in the circuit shown in FIG. 8B, the absolute value (ABS) circuits 26a, 26b and 35a, 35b are used in place of the square calculation, and these absolute values are added by the adder circuits 27 and 36, thereby the square root circuit 25. , 34 can be omitted. Further, as shown in FIG. 8C, the difference between the lines and the sum between the lines can also be obtained by supplying the outputs of the absolute value circuits 26a, 26b and 35a, 35b to the maximum value (MAX) circuits 28, 37 and taking out the larger one. An approximate value of the corresponding signal is calculated.
[0050]
Accordingly, in this circuit, the burst phase is alternately shifted to +45 degrees and −45 degrees for each horizontal line according to the generated internal sequence signal, and the magnitude of the phase difference between the lines of the phase-shifted burst is equal to or greater than a predetermined determination threshold value. In some cases, it is not dependent on the demodulation axis of the system by discriminating that the internal sequence signals do not match.Therefore, the sequence can be discriminated even when the phase is not locked, and there is a margin in the discrimination threshold. By setting the discrimination threshold, it is possible to prevent erroneous discrimination due to a momentary drop in level.
[0051]
As a result, in the conventional PAL sequence discrimination method and circuit, since the discrimination operation is after convergence of the transient response of APC, the color disturbance period becomes long, and the reliability and commercial value of the system are remarkably lowered. According to the present invention, these problems can be easily solved in the case where there is a risk of erroneous discrimination due to a momentary drop or disappearance of the signal level such as dropout.
[0052]
Further, according to the configuration of FIG. 7, it is possible to determine stably even if the average level of the burst changes by using the sum of the inter-line sum of the phase-shifted burst and a predetermined offset amount as a determination threshold. In addition, the probability of misclassification due to noise can be reduced for the same reason.
[0053]
The present invention is not limited to the above-described embodiment. For example, application to a system using a conversion carrier that does not phase-lock with respect to a color carrier of an input signal and a phase shift process of a burst signal in the baseband. Various modifications are possible, such as application to a system to be performed and a system whose input is already in the baseband.
[0054]
1 and 7 have been described with reference to the case where digital signal processing is used, the present application can also be implemented in analog signal processing. That is, FIG. 9 shows a configuration of a main part of the embodiment when the above-described signal processing is performed by analog signal processing, for example. In the circuit of FIG. 9, for example, a color burst separated from an input carrier color signal or a composite video signal is supplied to a signal generation circuit 4a such as an APC method or a ringing method to generate a sine waveform signal having a predetermined phase, for example. Is done.
[0055]
Here, the signal from the signal generation circuit 4a is phase-locked so that the demodulation axis of the system and the axis of the input color signal coincide with each other in a steady state. This signal is selected by the switch 10 through the phase shifters 5a and 5b that perform a phase shift of ± 45 degrees, and further selected by the original signal and the switch 11. The switch 10 is controlled by the internal sequence signal from the sequence generation circuit 9 described above, and the signal not subjected to the phase shift is switched to the signal from the switch 10 at the switch 11 only at the timing of the burst portion.
[0056]
As a result, a signal whose phase is alternately shifted to +45 degrees and −45 degrees is taken out from the switch 11 only for the timing of the burst portion. Then, the signal is directly shifted by 90 degrees in one side and further in the other by the phase shifter 6a, and supplied to the multipliers 2a and 2b, respectively. Therefore, also in this circuit, the phase-shifted sine and cosine signals similar to those in FIGS. 1 and 7 are supplied to the multipliers 2a and 2b. Even in this case, the same processing as the digital signal processing described above can be performed.
[0057]
Thus, according to the PAL sequence determination method described above, an internal sequence signal having a period of two horizontal lines that is inverted for each horizontal line of the input video signal is generated, and the burst phase is alternately set to +45 degrees for each horizontal line in accordance with the internal sequence signal. The phase shift is shifted to −45 degrees, and the magnitude of the line-to-line difference of the phase-shifted burst is obtained, and when the magnitude of the line-to-line difference is equal to or greater than a predetermined discrimination threshold, the internal sequence signal is changed to the PAL sequence of the input video signal. By determining that they do not match, it does not depend on the demodulation axis of the system, so even if the phase is not locked, sequence determination can be performed, and there is room in the determination threshold, so an appropriate determination threshold should be set. Thus, it is possible to prevent erroneous discrimination due to a momentary drop in level.
[0058]
Further, according to the above-described PAL sequence determination circuit, the internal sequence signal generating means for generating the internal sequence signal having a period of 2 horizontal lines that is inverted for each horizontal line of the input video signal, and the horizontal sequence alternately according to the internal sequence signal. Includes a phase shift means for shifting the burst phase to +45 degrees and -45 degrees, and an interline difference calculation means for obtaining the magnitude of the difference between the lines of the phase-shifted burst. By determining that the internal sequence signal is inconsistent with the PAL sequence of the input video signal when it is above the determination threshold, the sequence can be determined even if the phase is not locked because it does not depend on the demodulation axis of the system. In addition, since there is a margin in the discrimination threshold, an instantaneous level can be set by setting an appropriate discrimination threshold. In which it is possible to prevent erroneous determination by the bottom.
[0059]
Note that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention.
[0060]
【The invention's effect】
Therefore, according to the first aspect of the invention, the burst phase is alternately shifted to +45 degrees and −45 degrees for each horizontal line in accordance with the generated internal sequence signal, and the magnitude of the line-to-line difference of the phase-shifted burst is predetermined. By determining that the internal sequence signals do not match when the threshold value is equal to or greater than the threshold value, it is possible to perform sequence determination even if the phase is not locked because the system does not depend on the demodulation axis of the system. Therefore, it is possible to prevent erroneous discrimination due to a momentary drop in level by setting an appropriate discrimination threshold.
[0061]
According to the second aspect of the present invention, even if the average level of the burst changes by obtaining an added value of the sum of the lines of the phase-shifted burst and a predetermined offset amount, and using this added value as a determination threshold value. It is possible to make a stable determination, and for the same reason, the probability of erroneous determination due to noise can be reduced.
[0062]
Furthermore, according to the invention of claim 3, the burst phase is alternately shifted to +45 degrees and −45 degrees for each horizontal line in accordance with the generated internal sequence signal, and the magnitude of the line-to-line difference of the phase-shifted burst is predetermined. By determining that the internal sequence signals do not match when the threshold value is equal to or greater than the threshold value, it is possible to perform sequence determination even if the phase is not locked because the system does not depend on the demodulation axis of the system. Therefore, it is possible to prevent erroneous discrimination due to a momentary drop in level by setting an appropriate discrimination threshold.
[0063]
According to a fourth aspect of the present invention, there is provided addition value calculating means for obtaining an addition value between the sum of lines of the phase-shifted burst and a predetermined offset amount, and by using this addition value as a discrimination threshold, Even if the average level changes, it is possible to make a stable determination, and for the same reason, the probability of erroneous determination due to noise can be reduced.
[0064]
As a result, in the conventional PAL sequence discrimination method and circuit, since the discrimination operation is after convergence of the transient response of APC, the color disturbance period becomes long, and the reliability and commercial value of the system are remarkably lowered. According to the present invention, these problems can be easily solved in the case where there is a risk of erroneous discrimination due to a momentary drop or disappearance of the signal level such as dropout.
[Brief description of the drawings]
FIG. 1 is a configuration diagram of an embodiment of a PAL sequence determination circuit according to the present invention.
FIG. 2 is a waveform diagram for explaining the operation;
FIG. 3 is a diagram for explaining the operation;
FIG. 4 is a diagram for explaining the operation;
FIG. 5 is a configuration diagram of a main part of the modified embodiment.
6 is a configuration diagram of a main part of FIG. 1;
FIG. 7 is a configuration diagram of another embodiment of a PAL sequence determination circuit according to the present invention.
8 is a configuration diagram of a main part of FIG. 7;
FIG. 9 is a configuration diagram of a main part of another embodiment.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Input terminal to which carrier color signal or composite video signal is supplied, 2a, 2b ... multiplier, 3a ... phase detector, 3b ... loop filter, 4 ... carrier phase generation circuit, 5 ... calculation for phase shift Circuit: 6 ... Conversion table, 7a, 7b ... Low pass filter (LPF), 8 ... Color signal processing circuit, 9 ... Sequence generator, 10 ... Switch for selecting a value corresponding to a phase of ± 45 degrees, 11 ... Burst unit Switch for switching to a value corresponding to ± 45 degrees only, 12a, 12b ... burst gate, 13 ... inter-line difference calculation circuit, 14 ... comparison circuit, 15 ... terminal to which a discrimination threshold is supplied, 16 ... horizontal synchronization signal Terminal to which (H) is supplied

Claims (2)

A PAL sequence determination method in color signal demodulation processing of a PAL input video signal,
Generating an internal sequence signal having a period of two horizontal lines that is inverted every horizontal line of the input video signal;
According to the internal sequence signal, the burst phase is alternately shifted to +45 degrees and −45 degrees every horizontal line,
While determining the magnitude of the line-to-line difference of the phase shifted burst,
It is determined that the internal sequence signal does not match the PAL sequence of the input video signal when the magnitude of the difference between the lines is equal to or greater than the sum of the inter-line sum of the phase-shifted burst and a predetermined offset amount. to,
P AL sequence determination method. A PAL sequence determination circuit in color signal demodulation processing of a PAL input video signal,
  An internal sequence signal generating means for generating an internal sequence signal having a period of 2 horizontal lines that is inverted every horizontal line of the input video signal;
Phase shift means for alternately shifting the burst phase to +45 degrees and −45 degrees for each horizontal line in accordance with the internal sequence signal;
An inter-line difference calculating means for determining the magnitude of the inter-line difference of the phase-shifted burst,
It is determined that the internal sequence signal does not match the PAL sequence of the input video signal when the difference between the lines is equal to or greater than the sum of the inter-line sum of the phase-shifted burst and a predetermined offset amount. To
PAL sequence discrimination circuit.

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