JPH07298299A - Phase correction circuit - Google Patents

Abstract

PURPOSE:To reduce effectively a velocity error in a color signal reproduced from a VTR. CONSTITUTION:Color difference signals r-y, b-y after frequency correction by a feedback APC are fed respectively to an amplitude detection circuit 10, a phase detection circuit 12, and a phase error difference detection circuit 14, in which an amplitude, a phase, a phase error theta, and a phase error difference thetad are corrected respectively. A subtractor 16 corrects the phase error theta. A phase tilt arithmetic circuit 18 obtains a phase tilt (k) based on the phase error thetad and an integration circuit 20 approximate linearly the phase error for 1H based on the phase tilt (k). A subtractor 22 corrects the error of linear approximation. A sin ROM 24, a 90 deg. shift circuit 26, a sin ROM 28 and multipliers 30, 32 apply processing to an output of the subtractor 22 to obtain color differernce signals R-Y, B-Y after phase correction respectively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase correction circuit for correcting or correcting an error in phase or frequency of a color signal of a television, and more specifically, it is suitable for correction of so-called velocity error. The present invention relates to a phase correction circuit.

[0002]

2. Description of the Related Art In a VTR, for example, jitter is generated during signal reproduction, as is well known. Since the phase of the color signal includes hue information, when the phase or frequency changes due to jitter, the hue changes on the reproduction screen.

As a background art for correcting such phase variation or frequency variation of color signals, see Technical Report of Television Society Vol.15, No.36, pp.1-6, "Digital Signal Processing of SVHS VTR". Some have been disclosed. This example
Feedforward APC (Automatic Phase Contro)
The phase is corrected by l). Explaining with reference to FIG. 7, the color difference signals and burst signals reproduced and demodulated on the normal demodulation axes R (red) -Y (luminance) and B (blue) -Y in the figure are EB and ER, respectively. , A. On the other hand, the color difference signal and the burst signal having the phase error θ are
Eb, Er, Ar and Ab respectively. Eb, Er, Ar,
Ab has a relationship in which EB, ER, and A are rotated by a phase error θ.

When these relationships are shown by mathematical expressions, ER = Er.cos.theta. + Eb.sin.theta. (1) EB = -Er.sin.theta. + Eb.cos.theta .... (2) Ar = A.sin.theta. (3) Ab = −A · cos θ ………… (4) sin θ = Ar / √ (Ar ² + Ab ² ) ………… (5) cos θ = −Ab / √ (Ar ² + Ab ² ) ………… (6)

Therefore, if the expressions (5) and (6) are calculated and the results are used to calculate the expressions (1) and (2), the color difference signals EB and ER having no phase error can be obtained. . This calculation corresponds to rotating all the color signals for 1H (one horizontal scanning period) in the same direction by the same amount so that the phase error θ becomes zero. On the other hand, the value of the phase error θ is calculated from the color difference component of the burst signal, and the phase error θ is set to 0.
There is also a method of rotating all 1H color signals in the same direction by the same amount.

[0006]

However, even if the phase error is corrected at the timing of the burst signal as in the background art described above, if the frequency is different, a phase shift called a velocity error will gradually occur. Frequency control is generally performed by feedback APC, but since it is not perfect, a phase error occurs.

FIG. 8 shows a state of error correction according to the background art. It is assumed that the phase error as shown in FIG. 9A exists in the color signal after the correction by the feedback APC. According to the background art, the phase error is corrected at the timing of the first burst signal of 1H. Therefore,
The correction amount by feed-forward APC is shown in (A) of the same figure.
As indicated by the arrow. The correction of this correction amount is the first
This is applied to the entire color signal in the H period. Therefore, the correction amount is as shown in FIG.

When the phase error shown in FIG. 7B is corrected for the phase error shown in FIG. 7A, the result is shown in FIG. In this way, since a constant correction is performed for each 1H, no phase error occurs at the 1H start position (dotted line position). However, the phase error due to the subsequent velocity error is not corrected, and the phase of the color signal becomes discontinuous at the start / end position (dotted line position) of 1H.

Considering this point on the screen, it becomes as shown in FIG. The state in which there is a phase error in FIG.
It is assumed that the state is (A). When the phase correction by the feedforward APC according to the background art is performed, 1H
At the beginning of the image, there is no phase error and the hue is good. Therefore, on the screen, as shown in FIG. 8B, a good display with almost no left half phase error is obtained. But,
The hue shifts in the right half due to the phase error. As described above, when there is a velocity error, the phase shifts at a position apart from the burst sampling point, that is, the start point of 1H.

The present invention focuses on these points, and an object thereof is to effectively reduce velocity error.

[0011]

In order to achieve the above object, the present invention detects a difference in a phase error for each predetermined period, for example, one horizontal period of a television, and based on the detected difference, exists in that period. The phase error is corrected and the approximation error is corrected. This approximation error is obtained, for example, assuming that the phase error exists linearly.

When the present invention is applied to the phase correction of the color signal of the television reproduced from the VTR, so-called velocity error is effectively reduced, and the hue on the screen becomes good in the horizontal direction. The above and other objects of the present invention,
Features and advantages will be apparent from the following detailed description and the accompanying drawings.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Although there may be many embodiments of the phase correction circuit of the present invention, a suitable number of embodiments will now be shown and described in detail. FIG. 1 shows the configuration of the embodiment. In the figure, the color difference signals r-y and b-y after frequency correction by the feedback APC are input to the amplitude detection circuit 10, the phase detection circuit 12, and the phase error difference detection circuit 14, respectively. The phase error difference detection circuit 14 is a circuit for detecting the phase error θ of the input signal and the difference θd of the phase error between the burst signal of the input horizontal line and the burst signal 1H before.

The subtractor 16 is a circuit for subtracting the phase error θ from the output of the phase detection circuit 12. The operation of the subtractor 16 corresponds to the operation of the feedforward APC shown in FIGS. 8 (B) and 8 (C). The phase gradient calculating circuit 18 is a circuit for obtaining the gradient of the phase error in the 1H period. In this embodiment, since the signal processing is performed digitally, the slope k of the phase error corresponding to one clock is obtained. The integrator circuit 20 is a circuit for integrating the slope k of the phase error as the clock advances. Subtractor 1
Reference numeral 8 is a circuit for subtracting the integration slope of the integration circuit 20 from the output of the subtractor 16.

The 1H delay circuit 21 inputs the input signal to 1H.
This is a circuit for delaying and outputting. The subtractor 22 is a circuit for subtracting the integrated value from the output of the 1H delay circuit 21. The operation of the subtractor 22 is as shown in FIG.
The phase error shown in is reduced. The sinROM 24 is a circuit for obtaining the RY axis component from the corrected phase. The 90 ° shift circuit 26 is a circuit for shifting the corrected phase by 90 °. The sinROM 28 is a circuit for obtaining the BY axis component from the shifted phase. The 90 ° shift circuit 26 and the sinROM 28
Can also be configured by a cosROM. However, with the configuration shown in the figure, the sinROM2
4, 28 can be shared, the memory capacity can be reduced, and the circuit configuration can be simplified.

The 1H delay circuit 33 inputs the input signal to 1H.
This is a circuit for delaying and outputting. Multipliers 30, 32
Is the output of the sinROMs 24, 28 multiplied by the amplitude of each r-y, b-y delay signal output from the 1H delay circuit 33, and the phase-corrected color difference signals R-Y, B-Y.
Is a circuit for obtaining. 1H delay circuit 21, 33
The feed-forward type processing becomes possible by the delay processing by.

FIG. 2 shows a configuration example of the phase error difference detection circuit 14. In the figure, the color difference signals r-y and b-y before phase correction are both gate integration circuits 14
It is input to A and 14B together with the burst gate signal. In the gate integration circuits 14A and 14B, the input signal is extracted at the timing of the burst gate signal. That is, the burst signal in the input signal is taken out and integrated. The integrated signal is divided by the divider 14C, and the result of the division is t by the tan ^-1 circuit 14D.
an ^-1 is calculated. Thus, the phase error θ is obtained by the phase error detection circuit. The phase error θ is supplied to the subtractor 14E on the one hand and to the 1H delay circuit 14F on the other hand. The subtracter 14E obtains the difference θd of the phase error θ of about 1H input.

FIG. 3 shows an example of the configuration of the phase gradient calculating circuit 18. In the figure, the counting circuit 18A includes
The 1H synchronization signal SYNC and the clock signal CLK are input, and the clock is counted in the 1H period. In the subtractor 18B, the normal value output circuit 1
The predetermined value 910 (the number of clocks included in the period of 1H at normal time) output from 8C is subtracted. 1 / (910 + x) RO
In M18D, the reciprocal of the input, that is, 1 / (910 + d)
Is required. This reciprocal is multiplied by the phase error difference θd in the multiplier 18E. That is, the 1 / (910 + x) ROM 18D and the multiplier 18E divide the phase error difference θd by the number of clocks of 1H to obtain a phase gradient k = θd corresponding to one clock.
/ (910 + d) is required. In the integrating circuit 20, the phase gradients k are sequentially added and integrated. As a result, the linear approximation graph GB shown in FIG. 5 is obtained.

Next, the overall operation of the embodiment configured as described above will be described. The color difference signals r-y and b-y after frequency correction by the feedback APC are the amplitude detection circuit 1
0, the phase detection circuit 12, and the phase error difference detection circuit 14, respectively. In the amplitude detection circuit 10, the color difference signal r
The amplitudes of −y and by are detected respectively. The phase detection circuit 12 detects the phases of the color difference signals r-y and b-y, respectively.

On the other hand, the phase error difference detection circuit 14 obtains the phase error θ. In the subtractor 16, the phase detection circuit 1
The phase error θ is subtracted from the phase detected by 2. By this, the phase correction of the feedforward APC shown in FIGS. 8B and 8C is performed.
FIG. 4A shows the phase error after the phase correction by the feedforward APC, which is the same as FIG. 8C.

The phase error difference detection circuit 14 further determines the phase error difference θd (see FIG. 5). Then, the phase gradient calculating circuit 18 obtains the phase gradient k based on the phase error θd, and the integrating circuit 2 calculates based on the phase gradient k.
At 0, the graph GB in FIG. 5 is obtained. FIG. 4B shows the phase correction amount output from the integrating circuit 20.
In the subtractor 22, the phase error after the correction by the subtractor 16, that is, the phase error shown in FIG.
The phase correction amount shown in is subtracted. The phase error after subtraction is
It becomes as shown in FIG.

That is, the phase error shown in FIG. 4C is obtained by subtracting the linear approximation graph GB from the graph GA in FIG. In this way, since the linear approximation is performed, some phase error remains, but as is clear from comparison with the phase error according to the background art shown in FIG. 8C, the phase error is reduced very effectively. To be done.

Returning to FIG. 1, the phase data after the phase error correction output from the subtractor 22 is stored in the sinROMs 24 and 9.
It is supplied to each 0 ° shift circuit 26. The 90 ° shift circuit 26 shifts the input phase data by 90 °. In the sinROM 24, the R-Y axis component corresponding to the input phase data is obtained. In the sinROM 28, the BY axis component corresponding to the input phase data is obtained. In the multipliers 30 and 32, the amplitudes of the color difference signals r-y and by are multiplied by the corresponding coordinate axis components, respectively, and the phase-corrected color difference signals R-Y and BY are obtained, respectively.

As described above, according to this embodiment, the following effects can be obtained. (1) The phase error difference for each 1H is detected, the phase error remaining after the feedforward APC is linearly approximated based on this, and the linear approximation error is corrected.
Velocity error can be reduced very effectively. FIG. 6C shows a screen after phase error correction according to this embodiment, and a screen with almost no hue shift can be obtained over the entire screen.

(2) The feedback APC always has a delay, and the amount of phase correction differs depending on the frequency. Therefore, in order to improve the jitter of the low frequency of several hundred Hz or less while eliminating the influence of the high frequency noise of several KHz or more in the output of the VTR, the noise around 1 KHz, which is the intermediate between them, is eliminated. Need to improve,
Feedback APC could not successfully make such improvement. However, in this embodiment, FIG.
The discontinuity of the phase for every 1H shown in (C) is eliminated, and the phase becomes continuous as shown in FIG. 4 (C). Therefore, P around 1 KHz which could not be improved by feedback APC
It is possible to excellently correct M (phase modulation) component noise. The operation of this embodiment results in frequency correction of the color difference signal, and in a broad sense, TBC (Time Bas).
e Correcter) operation. As a result, the phase correction has the same meaning as the frequency correction.

The present invention can be modified in various ways based on the above disclosure, for example, as follows. (1) In the above-mentioned embodiment, the present invention is applied to the phase correction in the color signal of the television, but if the phase of the signal to be corrected is corrected so as to correspond to the reference signal, It is also applicable to such things. (2) In the above embodiment, the phase error after feed-forward APC was linearly approximated, but a statistical appearance curve of the phase error may be obtained and the curve corresponding to it may be approximated. In this case, a circuit for obtaining the curve may be connected instead of the integrating circuit 20.

[0027]

As described above, according to the present invention, the phase error corrected by the feedforward APC is linearly approximated to further correct the error. Therefore, the phase error can be effectively reduced. You can

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a phase error difference detection circuit according to the embodiment.

FIG. 3 is a block diagram showing a configuration of a phase gradient calculating circuit of the embodiment.

FIG. 4 is a signal waveform diagram showing a state of phase correction according to the embodiment.

FIG. 5 is a signal waveform diagram showing a state of linear approximation in the embodiment.

FIG. 6 is a diagram showing correspondence between phase correction of color signals and a television screen.

FIG. 7 is a diagram showing a phase shift of a color signal.

FIG. 8 is a signal waveform diagram showing a state of phase correction according to the background art.

[Explanation of symbols]

10 ... Amplitude detection circuit 12 ... Phase detection circuit (phase detection means) 14 ... Phase error difference detection circuit (phase error detection means, phase error difference detection means) 16 ... Subtractor (first correction means) 18 ... Phase gradient calculation Circuit (approximate error calculating means, phase slope calculating means) 20 ... Integrating circuit (approximate error calculating means, integrating means) 22 ... Subtractor (second correcting means) 24, 28 ... sinROM 26 ... 90 ° shift circuit 30, 32 … Multiplier GA… Phase error GB… Linear approximation

Claims (2)

[Claims] 1. A phase detecting means for detecting a phase of a signal to be corrected; a phase error detecting means for detecting a phase error between a signal to be corrected and a reference signal in a predetermined cycle; a phase relative to a phase detected by the phase detecting means. First correction means for correcting the phase error detected by the error detection means; Phase error difference detection means for detecting the difference between the phase errors in a predetermined cycle; Error calculating means for approximating the phase error of the above by a predetermined function; second correcting means for correcting the approximating error calculated by the approximating error calculating means to the phase corrected by the first correcting means. Phase correction circuit characterized in that 2. Each of the means is a circuit that digitally processes a signal based on a clock, and the approximation error calculation means calculates a phase gradient around one clock in a predetermined cycle by using a phase error difference. 2. The phase correction circuit according to claim 1, further comprising: a phase-gradient calculating means for performing the calculation; and an integrating means for integrating the phase gradient calculated thereby to obtain an approximation error by a straight line.