JPH03273684A - Semiconductor storage device and manufacture thereof - Google Patents

Abstract

PURPOSE:To obtain a semiconductor storage device for allowing a sufficient number of repetition times for rewriting to be achieved easily by allowing a film thickness of a peripheral part which is in contact with a first floating gate electrode of a tunneling insulating film to be thicker. CONSTITUTION:Film thickness of a tunneling insulating film 4 is oxidized to be 100Angstrom on a drain region. Further, a polysilicon film where phosphor is doped on the thin tunneling insulating film 4 is formed and then a first floating gate electrode 5 consisting of a polysilicon film is formed. Then, an insulating film 6 consisting of silicon oxide, etc., is formed to be approximately 200Angstrom on a first floating gate electrode 5 which consists of the polysilicon film. In this thermal oxidation process, oxidation proceeds in a peripheral boundary part of the first floating gate electrode 5 which is adjacent to the tunneling insulating film 4, thus allowing film thickness at a peripheral part of a region below the first floating gate electrode 5 which induces tunneling of the tunneling insulating film 4 to be essentially thick.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor memory device comprising a floating gate field effect transistor and a method for manufacturing the same.

Conventional technologyEEPROM (elect) which can be electrically written and erased
Rally Erasable and Prog
A floating gate type semiconductor memory device that performs writing and erasing using a tunnel current is well known as one type of RAMable ROM. This floating gate type semiconductor memory device uses a tunnel current flowing through a thin insulating film on a diffusion layer to accumulate charge in a floating gate electrode on the insulating film, changing the threshold voltage of the transistor and transmitting information. The principle is to memorize. The configuration will be explained below with reference to FIG. 2.

As shown in the figure, a source region 12 and a drain region 13 containing N-type impurities are formed in a P-type silicon substrate 11, and a relatively thick silicon oxide film, etc. is formed across the source region 12 and drain region 13. An insulating film 14 is formed, and a hole is formed in only a portion of the insulating film 14, and a thin tunneling insulating film 15 made of a silicon oxide film or the like that serves as a tunneling medium is formed in the opening. 15 and an insulating film 14, a floating gate electrode 1 made of a polysilicon film or the like is provided.
6. It has a structure in which an insulating film 17 made of a silicon oxide film or the like and a control gate electrode 18 made of a polysilicon film or the like are sequentially laminated. In addition, in a floating gate type semiconductor memory device as shown in the figure, normally 15 to 20 V is applied.
The thickness of the thin tunneling insulating film 15, which serves as a tunneling medium, is 10 mm so that writing and erasing can be performed with a voltage of approximately
It needs to be very thin, about 0A.

Conventionally, when manufacturing a floating gate type semiconductor memory device as described above, the drain region 1 is
3, a relatively thick insulating film 14 is formed on the insulating film 14.
A hole is formed in a portion of the hole to reach the drain region 13 using a known photo-etching technique, and then a thin tunneling insulating film 15 made of a silicon oxide film or the like having a thickness of about 100 A is formed in the hole by a known thermal oxidation method. Form.

Next, a bloating gate electrode 16 made of a polysilicon film is formed on the thin tunneling insulating film 15 serving as a tunneling region, and after an oxidation treatment is performed, a control gate electrode 18 is formed of a polysilicon film or the like.

Problems to be Solved by the Invention In such a conventional semiconductor memory device, the cross-sectional shape of the opening formed by photoetching in the relatively thick insulating film 14 is quite vertical, and
If a very thin tunneling insulating film 15 is formed, the thickness of the peripheral part of the opening in contact with the silicon substrate 11 will become thinner, and strain and traps will easily occur in the peripheral part during oxidation. This poses the problem that rewriting makes it extremely easy to destroy, making it extremely difficult to ensure reliability.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a semiconductor memory device and a method for manufacturing the same that can easily ensure a sufficient number of repeatable rewrites.

Means for Solving the Problems In order to achieve the above object, the present invention has a source region and a drain region formed facing each other on one main surface of a semiconductor substrate of one conductivity type, and a source region and a drain region formed to be a tunneling medium. a thin tunneling insulating film formed; a first floating gate electrode formed on a portion of the tunneling insulating film corresponding to the upper part of the drain region;
an insulating film formed on the floating gate electrode excluding the opening, and a second insulating film formed on the insulating film including the opening.
In a semiconductor memory device having a floating gate electrode, an insulating film formed on the second floating gate electrode, and a control gate electrode formed on the insulating film, the first floating gate electrode of the tunneling insulating film This structure has a structure in which the film thickness is thicker at the peripheral portion in contact with the gate electrode.

Effect: With the above-described configuration, the thin tunneling insulating film of the present invention has a thicker film thickness at the peripheral part in contact with the first floating gate electric bridge, so troubles and destruction due to distortion and traps in the peripheral part are less likely to occur. .

EXAMPLE Hereinafter, an example of the present invention will be described with reference to FIG.

First, as shown in FIG. 2A, a source region 2 made of an N-type diffusion layer is formed on a P-type silicon substrate 1 by a known selective diffusion technique. A drain region 3 is formed. In this example, the impurity concentration was controlled to be approximately 5×10''/cd. Next, as shown in FIG. 2B, a thin tunneling insulating film 4 that can serve as a tunneling medium is formed.

In order to effectively utilize the tunneling effect, the thickness of the tunneling insulating film 4 must be approximately 50 to 150 Å, but in this example, it is oxidized in a steam atmosphere at 900°C so that the thickness becomes 10 OA on the drain region. gave shape to it. Furthermore, the thin tunneling insulating film 4 is doped with phosphorus (approximately 3
A polysilicon film having a diameter of about 1000 A was formed using a vapor phase epitaxy method, and then a first layer of polysilicon film was formed using a known photoetching technique.
A floating gate electrode 5 is formed. Next, as shown in FIG. 2C, an insulating film 6 made of silicon oxide or the like is formed to a thickness of about 200 A on the first floating gate electrode 5 made of a polysilicon film by a normal thermal oxidation method. In this thermal oxidation step, as shown in the figure, oxidation progresses at the peripheral boundary of the first floating gate electrode 5 that is in contact with the tunneling insulating film 4, and the first floating gate of the tunneling insulating film 4 undergoes tunneling. The film thickness at the periphery of the area under the electrode 5 becomes substantially thicker. Thereafter, a predetermined portion of the polysilicon film is opened using a well-known photoetching technique to reach the first floating gate electrode 5 made of polysilicon, and then the polysilicon film doped with phosphorus (approximately 3 x 1020 ell-'') is etched with air. Approximately 300 OA is formed using a phase growth method, and a second floating gate electrode 7 made of a polysilicon film or the like is shaped using a known photoetching technique and electrically connected to the first floating gate electrode 5 to form a floating gate electrode. form.

Next, as shown in FIG. 1D, an insulating film 8 made of a silicon oxide film or the like is formed to a thickness of about 400 A on the second floating gate electrode 7 by a normal thermal oxidation method. Then dope phosphorus (approx. 3 x 10”am-
') A polysilicon film with a diameter of about 40
00A is formed, and by a known photoetching technique,
By forming a control gate electrode 9 made of a polysilicon film or the like, a floating gate type semiconductor memory device as shown in the figure can be fabricated.

Although this embodiment has been described with respect to the P-type silicon substrate 1, it is also applicable to N-type silicon substrates and other general semiconductor substrates.

Effects of the Invention As is clear from the above embodiments, according to the present invention, even if a thin silicon oxide film of about 100 A is formed in the tunneling region, it will not come into contact with the floating gate electrode in the tunneling region during the subsequent thermal oxidation process. The film thickness at the periphery becomes thicker, and even if repeated rewriting is performed, it becomes difficult to break in the periphery, making it easier to ensure reliability, and providing a highly reliable floating gate type semiconductor memory device.

[Brief explanation of drawings]

1A to 1D are partial cross-sectional views in the order of steps for explaining a semiconductor memory device according to an embodiment of the present invention and its manufacturing method, and FIG. 2 is a partial cross-sectional view of a conventional semiconductor memory device. be. 1... P-type silicon substrate (semiconductor substrate), 2.
...source region, 3...drain region,
4... Tunneling insulating film, 5... First floating gate electrode, 6... Insulating film, 7... Second floating gate electrode, 8
...Insulating film, 9...Control gate electrode.

Claims (2)

[Claims] (1) A source region and a drain region formed facing each other on one main surface of a semiconductor substrate of one conductivity type, a thin tunneling insulating film formed to serve as a tunneling medium, and a thin tunneling insulating film on the tunneling insulating film. , a first floating gate electrode formed in a part corresponding to the upper part of the drain region, an insulating film formed except for the opening on the first floating gate electrode, and the insulating film including the opening. A semiconductor memory device comprising: a second floating gate electrode formed on a film; an insulating film formed on the second floating gate electrode; and a control gate electrode formed on the insulating film. A semiconductor memory device in which a tunneling insulating film has a thicker peripheral portion in contact with a first floating gate electrode. (2) A step of forming a source region and a drain region at positions facing each other on one main surface of a semiconductor substrate of one conductivity type, a step of forming a tunneling insulating film to serve as a tunneling medium over the entire surface, and a step of forming the tunneling insulating film on the entire surface. forming a first floating gate electrode on a part of the film corresponding to the upper part of the drain region; forming an insulating film except for the opening above the first floating gate electrode; forming a second floating gate electrode on the insulating film including the second floating gate electrode, forming an insulating film on the second floating gate electrode, and forming a control gate electrode on the insulating film. A method of manufacturing a semiconductor memory device having the following.