JPH03262132A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To avoid the development of defects by a method wherein two layer structure of sidewall layers comprising a silicon oxide film and another silicon oxide film on the gate electrode sidewalls is formed so as to form a tungsten electrode using the sidewalls as masks. CONSTITUTION:Phosphorus ions are implanted in a silicon substrate 2 using a gate electrode 6 comprising polysilicon formed on a silicon substrate through the intermediary of a gate oxide film 4 so as to form impurity regions 8,10. Next, a silicon oxide film 12 is deposited on the whole surface using LPCVD process while sidewall layers 12a are formed using anisotropic plasma etching process. Next, another silicon oxide film 14 is deposited on the whole surface likewise to form sidewall layers 4a. Next, arsenic ions are implanted using the sidewall layers 14a as masks to form respective high concentration impurity regions 16, 18. Next, a tungsten layer 24 is formed on a gate electrode 6 by CVD process simultaneously to form respective tungsten electrodes 26, 28. Through these procedures, the title semiconductor device can be highly integrated by lowering the resistance in source.drain regions.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a method of manufacturing a semiconductor device, particularly a method of manufacturing an insulated gate field effect semiconductor device having a tungsten electrode. The purpose of the present invention is to provide a method for manufacturing a semiconductor device that can prevent tungsten from lateral erosion at the interface of a semiconductor substrate, lower the resistance of the source and drain regions, and realize high stacking. , a step of forming a gate electrode on a semiconductor substrate of a first conductivity type via a Goo 1-oxide film, and performing ion implantation using the Goo 1-electrode as a mask, and forming a second gate electrode on the surface of the semiconductor substrate.
After forming a conductive type impurity layer and growing a silicon oxide film over the entire surface, anisotropic etching is performed to leave the silicon oxide film only on the side walls of the gate electrode to form a first sidewall layer. After the silicon nitride film is grown on the entire surface, anisotropic etching is performed to leave the silicon nitride film only on the sidewalls of the first sidewall layer to form a second sidewall layer. and a step of growing a tungsten layer using the first and second sidewall layers as masks and forming a tungsten electrode on the impurity layer.

[Industrial Field of Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing an insulated gate field effect semiconductor device having a tungsten electrode.

[Prior Art] In recent years, with the miniaturization of insulating devices and field effect semiconductor devices, the junction depths of source and drain regions have become shallower, resulting in a problem of increased resistance in these source and train regions. As a method to solve this problem, as shown in FIG. 2, the use of tungsten (W) for the source and train electrodes is being considered.

That is, for example, a gate oxide film 4 is formed on a p-type silicon substrate 2.
The goo 1 to electrode 6 are formed through the steps. Ion implantation is then performed using this gate electrode 6 as a mask to form a lightly doped n-type impurity region 10 on the surface of the silicon substrate 2.

Next, a sidewall layer 30 made of a silicon oxide film is formed on the sidewall of the gate electrode 6. Then, ion implantation is performed again using the gate electrode 6 and the sidewall layer 30 as a mask, and the n-type impurity region 10 on the surface of the silicon substrate 2 is implanted.
A heavily doped n+ type impurity region 18 is formed overlying the first and second regions.

In this way, the n-type impurity region 10 and the n+ type impurity region 18
A drain region 22 is formed. Although not shown, a source region consisting of an n- type impurity region and an n+ type impurity region is formed in the same manner as this drain region 22.

Next, a tungsten layer is grown on the source region (not shown) and drain region 22 to form a tungsten electrode (not shown) as a source electrode and a tungsten electrode 32 as a train electrode, respectively.

[Problems to be Solved by the Invention] However, in the method of manufacturing an insulated gate field effect semiconductor device using tungsten electrodes as the source and drain electrodes, for example, when forming the tungsten@pole 32 on the train region 22, As shown in part A of FIG. 2, the tungsten electrode 32 is largely eroded in the lateral direction along the interface between the sidewall layer 30 and the silicon substrate 2.

This is because the tungsten electrode 32 erodes the silicon oxide film of the sidewall layer 30 while etching, and the tungsten electrode 32 grows into the silicon substrate 2 in a self-limiting manner. This greatly exceeds the depth of erosion caused by this phenomenon.

In order to suppress such lateral erosion at the interface, it is conceivable to change the sidewall layer from a silicon oxide film to a silicon nitride film. However, although the sidewall layer made of a silicon nitride film prevents erosion of the tungsten electrode, it traps hot carriers more easily than a silicon oxide film, so there is a problem that the device characteristics deteriorate more severely.

In addition, due to stress when forming the sidewall layer made of silicon nitride film, defects occur in the silicon substrate near the edge of the gate electrode, and these defects tend to generate leakage current that depends on the substrate bias. be.

Therefore, the present invention provides a method for manufacturing a semiconductor device using a tungsten electrode, without deteriorating the device characteristics.
It is an object of the present invention to provide a method for manufacturing a semiconductor device that can prevent tungsten from lateral erosion at the interface of a semiconductor substrate, reduce the resistance of source and train regions, and realize high integration.

[Means for Solving the Problem] The above problem consists of a step of forming a gate electrode on a semiconductor substrate of a first conductivity type via a gate oxide film, and performing ion implantation into the gate 1 using the electrode as a mask. After forming an impurity layer of the second conductivity type on the surface of the semiconductor substrate and growing a silicon oxide film on the entire surface, anisotropic etching is performed to leave the silicon oxide film only on the side walls of the gate electrode. Step 1 of forming a sidewall layer;
After growing a silicon nitride film on the entire surface, performing anisotropic etching to leave the silicon nitride film only on the sidewalls of the first sidewall layer to form a second sidewall layer; This is achieved by a method for manufacturing a semiconductor device, comprising the steps of growing a tungsten layer using the first and second sidewall layers as masks, and forming a tungsten electrode on the impurity layer.

[Function] In the present invention, since the sidewall layer has a double #J layer of a silicon oxide film and a silicon nitride film, the outer silicon nitride film suppresses erosion of the tungsten electrode in the lateral direction of the semiconductor substrate interface. At the same time, trapping of carriers into the hole 1 and generation of defects in the silicon substrate can be reduced by the inner silicon oxide film.

"Example" The present invention will be specifically described below based on an illustrative example.

FIG. 1 is a process diagram showing a method of manufacturing an insulated gate field effect semiconductor device according to an embodiment of the present invention.

For example, on a p-type silicon substrate 2, a gate oxide film 4 made of polysilicon, for example, with a thickness of 0, is formed through a gate oxide film 4 of 200 nm thick.
．． A gate electrode 6 with a thickness of 4 μm is formed. Using this gate electrode 6 as a mask, phosphorus (P) ions are implanted to form an n-type impurity region 8.10 on the surface of the silicon substrate 2 (see FIG. 1<a)).

Next, L P CV D (Low Pressure
e CC11e+caVapor Depositio
A silicon oxide film 12 having a thickness of 100 nm is grown over the entire surface using the method (see FIG. 1(b)). Subsequently, the silicon oxide film 12 is removed using an anisotropic plasma etching method, and the gate voltage tif! A site wall layer 12a having a thickness of approximately 1008 cm is formed by leaving the silicon oxide film 12 only on the 6 side walls (see FIG. 1C).

Next, using the LPCVD method again, silicon nitride II! is applied to the entire surface. 14 (see FIG. 1(d)). Subsequently, the silicon nitride film 14 is removed using an anisotropic plasma etching method, and the sidewall layer 12all! I
The silicon nitride film 14 is left only on the walls, and the thickness is 150 mm.
A sidewall layer 14a having a thickness of approximately A is formed. In this way, side wall layers 12a and 14a having a double structure consisting of a silicon oxide film and a silicon nitride film are formed on the side walls of the gate electrode 6.
(see FIG. 1(e)).

At this time, the thickness of the sidewall layer 14a consisting of the outer silicon nitride film is about 150A, and the thickness is at least 10A.
Note that the thickness should be 0 Å or more.

This is because the depth of erosion due to the self-limiting growth of the tungsten electrode formed on the silicon substrate 2 in a later step into the silicon substrate 2 is approximately 100A, so that this tungsten electrode is formed on the sidewall layer 14a,
This is to suppress the lateral erosion of the interface between the silicon substrate 2 and the silicon substrate 2 to the depth of erosion due to self-limiting growth of the tungsten layer.

Next, using the sidewall layers 12a and 14a as masks, arsenic (As) ions are implanted to form highly concentrated n+ type impurity regions 16 and 18 overlapping the n- type impurity regions 8.10 on the surface of the silicon substrate 2, respectively. form. In this way, a source region 20 consisting of the n- type impurity region 8 and the n+ type impurity region 16 is formed, and a drain region 20 consisting of the n- type impurity region 10 and the n+ type impurity region 18 is formed.
20 is formed. In this way, the drain region 22 is a so-called LDD (Ligbtly Doped
Drain>m structure is formed (see FIG. 1(f)).

Then WP 6 as the source and S i as the reducing agent
)I4 by CVD method using each
A tungsten layer of 1000 nm thick is grown at 0°C. At this time, the tungsten layer is selectively grown only on the exposed gate electrode 6 and silicon substrate 2 using the sidewall layers 12a and 14a as a mask, since the reduction reaction rate of WF6 is highly dependent on the underlying layer. It will be done.

In this way, a tungsten layer 24 which becomes a part of the gate electrode 6 is formed on the gate electrode 6, and a tungsten layer 24 is formed on the gate electrode 6.
Tungsten@#126 as a source electrode and tungsten electrode 28 as a train electrode are formed on the 0 and train regions 22, respectively (see FIG. 1<g))
.

In this way, in the above embodiment, the sidewall layer 12
The tungsten electrodes 26 and 28 formed by selective growth using a and 14a as masks are connected to the source, drain t&
By using it as a source and drain region 20.
22 resistance can be reduced.

and the gate electrode 6 and these tungsten electrodes 26.
Since the sidewall layers 1 and 4a are provided between the sidewall layer 14a and the silicon substrate 28, and the outer sidewall layer 14a is formed of a silicon nitride film, the tungsten electrode 26.28 is placed next to the interface between the sidewall layer 14a and the silicon substrate 2. Erosion in this direction can be suppressed to the depth of erosion due to self-limiting growth. On the other hand, since the inner sidewall layer 12a is formed of a silicon oxide film, compared to a silicon nitride film, the device characteristics deteriorate due to hot carrier effects and the silicon substrate 2 near the edge of the gate I-electrode 6 due to stress. It is possible to reduce the occurrence of defects inside.

Effects of the Invention As described above, according to the present invention, the first sidewall layer made of a silicon oxide film and the second sidewall layer made of a silicon nitride film are formed on the goo 1 to the pole sidewall 1 2 . In order to form a tungsten electrode using the first and second sidewall layers as masks, the semiconductor substrate interface is It is possible to suppress the erosion of the tungsten electrode in the lateral direction, and the inner silicon oxide film can reduce the deterioration of device characteristics due to hot carrier effects and the occurrence of defects in the semiconductor substrate due to stress.

As a result, the source,
High integration can be achieved by lowering the resistance of the train region.

In the figure, 2...Silicon substrate, 4...Gate oxide film, 6...Gate electrode, 8.10...N-type impurity region, 12a , 14
a, 30... side wall layer, 12...
...Silicon oxide film, 14...1 silicon nitride, 16.18...n++ impurity region, 20...
... Source region, 22 ... Drain region, 24 ... Tungsten layer, 26.28.32 ... Tungsten electrode.

[Brief explanation of drawings]

FIG. 1 is a process diagram showing a method for manufacturing a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a process sectional view for explaining a conventional method for manufacturing a semiconductor device.

Claims (1)

[Claims] 1. A step of forming a gate electrode on a semiconductor substrate of a first conductivity type via a gate oxide film, and performing ion implantation using the gate electrode as a mask to form a second conductivity type on the surface of the semiconductor substrate. forming a mold impurity layer; and after growing a silicon oxide film on the entire surface, anisotropic etching is performed to leave the silicon oxide film only on the side walls of the gate electrode to form a first sidewall layer. A step of growing a silicon nitride film over the entire surface and then performing anisotropic etching to leave the silicon nitride film only on the side walls of the first sidewall layer to form a second sidewall layer. A method for manufacturing a semiconductor device, comprising: growing a tungsten layer using the first and second sidewall layers as masks, and forming a tungsten electrode on the impurity layer.