JPH0325011B2 - - Google Patents

Info

Publication number
JPH0325011B2
JPH0325011B2 JP59073276A JP7327684A JPH0325011B2 JP H0325011 B2 JPH0325011 B2 JP H0325011B2 JP 59073276 A JP59073276 A JP 59073276A JP 7327684 A JP7327684 A JP 7327684A JP H0325011 B2 JPH0325011 B2 JP H0325011B2
Authority
JP
Japan
Prior art keywords
resist
light
resist film
substrate
substrate surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP59073276A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60216553A (ja
Inventor
Kazuo Matsuzaki
Akinori Shimizu
Misao Saga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Corporate Research and Development Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Corporate Research and Development Ltd filed Critical Fuji Electric Corporate Research and Development Ltd
Priority to JP59073276A priority Critical patent/JPS60216553A/ja
Publication of JPS60216553A publication Critical patent/JPS60216553A/ja
Publication of JPH0325011B2 publication Critical patent/JPH0325011B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices

Landscapes

  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
JP59073276A 1984-04-12 1984-04-12 フォトエッチング法 Granted JPS60216553A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59073276A JPS60216553A (ja) 1984-04-12 1984-04-12 フォトエッチング法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59073276A JPS60216553A (ja) 1984-04-12 1984-04-12 フォトエッチング法

Publications (2)

Publication Number Publication Date
JPS60216553A JPS60216553A (ja) 1985-10-30
JPH0325011B2 true JPH0325011B2 (enExample) 1991-04-04

Family

ID=13513463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59073276A Granted JPS60216553A (ja) 1984-04-12 1984-04-12 フォトエッチング法

Country Status (1)

Country Link
JP (1) JPS60216553A (enExample)

Also Published As

Publication number Publication date
JPS60216553A (ja) 1985-10-30

Similar Documents

Publication Publication Date Title
JP3333274B2 (ja) ３又はそれ以上の位相シフトを有する位相シフトリソグラフィマスクの自己整合作製法
KR0128828B1 (ko) 반도체 장치의 콘택홀 제조방법
JPS6258652B2 (enExample)
US4546066A (en) Method for forming narrow images on semiconductor substrates
JPH0325011B2 (enExample)
JPH02262319A (ja) パターン形成方法
JPS6150377B2 (enExample)
JPS6386550A (ja) 多層配線層の形成方法
KR0137618B1 (ko) 포토레지스트 패턴 형성방법
JP3663551B2 (ja) レジスト・パターンの形成方法
JP2768139B2 (ja) 半導体装置の製造方法
JPH01106049A (ja) パターン形成方法
JP2676833B2 (ja) フォトレジストパターンの形成方法
JP3061037B2 (ja) レジストパターンの形成方法
JP3540503B2 (ja) パターン形成方法
JPH0651489A (ja) ハーフトーン位相シフトフォトマスクの製造方法
KR940011204B1 (ko) 미세패턴 형성방법
JPH08293454A (ja) レジストパターンの形成方法
JPH10333318A (ja) 位相シフトフォトマスク及びその製造方法
KR0140469B1 (ko) 반도체 소자의 감광막 패턴 제조방법
JPH06338452A (ja) レジストパタ−ンの形成方法
JPS628513B2 (enExample)
JPH08203821A (ja) パターン形成方法
KR970002430B1 (ko) 반도체 소자의 감광막패턴 제조방법
JPS60203944A (ja) ポジ型フオトレジストの除去法