JPH03227041A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPH03227041A JPH03227041A JP2023481A JP2348190A JPH03227041A JP H03227041 A JPH03227041 A JP H03227041A JP 2023481 A JP2023481 A JP 2023481A JP 2348190 A JP2348190 A JP 2348190A JP H03227041 A JPH03227041 A JP H03227041A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- resin
- inner leads
- lead frame
- leads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 44
- 239000002184 metal Substances 0.000 abstract description 18
- 229910001111 Fine metal Inorganic materials 0.000 abstract 1
- 239000011347 resin Substances 0.000 description 8
- 229920005989 resin Polymers 0.000 description 8
- 238000007789 sealing Methods 0.000 description 7
- 230000000694 effects Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4899—Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids
- H01L2224/48996—Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/48998—Alignment aids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、樹脂封止型半導体装置の構造に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to the structure of a resin-sealed semiconductor device.
従来、半導体素子搭載部のないリードフレームを用いた
樹脂封止型半導体装置は次のようになっていた。すなわ
ち半導体素子と半導体素子搭載部のないリードフレーム
の内部リードは、25〜30Jimの金属細線のみで接
続されており、金属細線によってのみ半導体素子は保持
され、さらに半導体素子及び内部リードを封止用樹脂に
より封止する構造となっていた。Conventionally, a resin-sealed semiconductor device using a lead frame without a semiconductor element mounting portion has been constructed as follows. In other words, the semiconductor element and the internal leads of the lead frame without the semiconductor element mounting part are connected only with a 25-30 Jim thin metal wire, and the semiconductor element is held only by the metal wire, and the semiconductor element and the internal lead are also connected to each other for sealing. The structure was sealed with resin.
上述した従来の樹脂封止型半導体装置では、半導体素子
を保持するのが、半導体素子と半導体素子搭載部のない
リードフレームの内部リードを接続する同一の太さの2
5〜30μm中の金属細線のみであるため、半導体素子
及びリードフレームの内部リードを封止用樹脂により封
止する際、半導体素子は樹脂に流され易く、金属細線が
引張られて切断したり、あるいは半導体素子の上部角の
部分に金属細線が触れ、電気的に短絡してしまうなどの
欠点がある。また、金属細線が引張られた対辺では、金
属細線がたるみ、金属細線どうし、あるいは金属細線と
この金属細線と絶縁されているべき内部リードが短絡し
てしまうという欠点がある。In the conventional resin-sealed semiconductor device described above, the semiconductor element is held by two wires of the same thickness that connect the semiconductor element and the internal leads of the lead frame that does not have a semiconductor element mounting section.
Since it is only a thin metal wire of 5 to 30 μm, when the semiconductor element and the internal leads of the lead frame are sealed with a sealing resin, the semiconductor element is easily washed away by the resin, and the thin metal wire is pulled and cut. Alternatively, the thin metal wire may touch the upper corner of the semiconductor element, resulting in an electrical short circuit. Further, on the opposite side where the thin metal wire is stretched, the thin metal wire becomes slack, resulting in a short circuit between the thin metal wires or between the thin metal wire and the internal lead that should be insulated from the thin metal wire.
本発明は、半導体素子搭載部のないリードフレームを用
いた樹脂封止型半導体装置において、半導体素子搭載部
のないリードフレームの内部リードの一部のリードが、
他のリードより長く、しかもその先端が上または下ある
いは上下に突起した構造であるという特徴を有している
。The present invention provides a resin-sealed semiconductor device using a lead frame without a semiconductor element mounting part, in which some of the internal leads of the lead frame without a semiconductor element mounting part are
It is characterized by being longer than other leads, and having a structure in which its tip protrudes upward, downward, or upward and downward.
次に、本発明につき図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図(a)、(b)は本発明の第1の実施例を説明す
る平面図とA−A’断面図である。半導体素子1は、図
に示すように半導体素子1上の電極6を介して半導体素
子搭載部のないリードフレーム2の内部リード2′と金
属細線3により接続されており、また他の内部リード2
′より長く、先端の上下に突起のある内部リード4は半
導体素子1から0.1〜0.5mmの場所に位置してい
る。FIGS. 1(a) and 1(b) are a plan view and a sectional view taken along the line AA' for explaining a first embodiment of the present invention. As shown in the figure, the semiconductor element 1 is connected via an electrode 6 on the semiconductor element 1 to an internal lead 2' of a lead frame 2 without a semiconductor element mounting part by a thin metal wire 3, and is connected to another internal lead 2.
The internal lead 4, which is longer than the lead 4 and has projections on the top and bottom of its tip, is located at a distance of 0.1 to 0.5 mm from the semiconductor element 1.
このような構造にすることにより、封止用樹脂5により
封止する際に半導体素子1が封止用樹脂5により力を受
は移動しても、内部リード4によって保持されるため、
金属細線3が変形することを防止することかで−きる。With this structure, even if the semiconductor element 1 receives force from the sealing resin 5 and moves during sealing with the sealing resin 5, it is held by the internal leads 4.
This can be done by preventing the thin metal wire 3 from being deformed.
なお、上記実施例では内部リード4の先端の上下に突起
を設けた場合について説明したが、上または下だけでも
同様の効果がある。In the above embodiment, the case where projections are provided on the top and bottom of the tip of the internal lead 4 has been described, but the same effect can be obtained even if only the projection is provided on the top or bottom.
第2図(a)、(b)は、本発明の第2の実施例の平面
図とA−A’断面図である。半導体素子1は、図に示す
ように半導体素子1上の電極6を介して半導体素子搭載
部のないリードフレーム2の内部リード2′と金属細線
3で接続されている。また他の内部リード2′より長く
先端の上下に突起のある内部リード4は半導体素子1の
方向の面に絶縁層7を設けた構造となっており、半導体
素子1から0.1〜0.5mmの距離に位置している。FIGS. 2(a) and 2(b) are a plan view and a sectional view taken along the line AA' of a second embodiment of the present invention. As shown in the figure, the semiconductor element 1 is connected by a thin metal wire 3 to an internal lead 2' of a lead frame 2 having no semiconductor element mounting portion via an electrode 6 on the semiconductor element 1. The internal lead 4, which is longer than the other internal leads 2' and has protrusions on the top and bottom of its tip, has an insulating layer 7 on the surface facing the semiconductor element 1, and is 0.1 to 0.0 mm away from the semiconductor element 1. It is located at a distance of 5mm.
この実施例では内部リード4に半導体素子1が直接接す
ることがないため、内部リード4が使用できない、ある
いは内部リード4は半導体素子1と同電位でなければな
らない等の制約を排することができるという利点がある
。In this embodiment, since the semiconductor element 1 does not come into direct contact with the internal lead 4, restrictions such as the internal lead 4 not being able to be used or the internal lead 4 having to be at the same potential as the semiconductor element 1 can be eliminated. There is an advantage.
以上説明したように本発明は、半導体素子搭載部のない
リードフレームの内部リードの一部を他の内部リードよ
り長くし、その先端の上または下あるいは上下に突起を
設け、半導体素子を保持することにより、封止用樹脂に
て封止する際、半導体素子が封止用樹脂によって流され
ることを防止し、しかも金属細線が引張られ、切断した
り、あるいは、半導体素子上部角の部分に金属細線が触
れ、電気的に短絡したりあるいは金属細線どうしあるい
は金属細線と絶縁されているべき内部リードが短絡して
しまうことを防止できる効果カイある。また、内部リー
ドの上下に突起を設けることにより、封止の際多少半導
体素子が上下方向に移動しても、上記の効果は損われる
ことはな藝)。As explained above, the present invention makes a part of the internal leads of a lead frame that does not have a semiconductor element mounting part longer than other internal leads, and provides protrusions above, below, or above the tips to hold semiconductor elements. This prevents the semiconductor element from being washed away by the encapsulating resin when encapsulating with the encapsulating resin, and also prevents the thin metal wires from being pulled and cut, or the semiconductor element from being exposed to metal at the upper corner of the element. This has the effect of preventing the thin wires from touching and causing an electrical short circuit, or shorting the internal leads that should be insulated from each other or from the thin metal wires. Furthermore, by providing protrusions above and below the internal leads, the above-mentioned effects will not be impaired even if the semiconductor element moves up and down a little during sealing.
第1図(a>、(b)は、本発明の第1の実施例の平面
図とA−A’断面図、第2図(a)(b)は、本発明の
第2の実施例の平面図とA−A′断面図である。
1・・・半導体素子、2・・・半導体素子搭載部のない
リードフレーム、2′・・・内部リード、3・・・金属
細線、4・・・先端に突起のある内部リード、5・・・
封止用樹脂、6・・・電極、7・・・絶縁層。Fig. 1 (a>, (b) is a plan view and AA' sectional view of the first embodiment of the present invention, and Fig. 2 (a) and (b) are the second embodiment of the present invention. 1 is a plan view and a sectional view taken along line A-A'. 1... Semiconductor element, 2... Lead frame without semiconductor element mounting part, 2'... Internal lead, 3... Metal thin wire, 4...・Internal lead with protrusion at the tip, 5...
Sealing resin, 6... electrode, 7... insulating layer.
Claims (1)
封止型半導体装置において、半導体素子搭載部のないリ
ードフレームの内部リードの一部のリードが他のリード
より長くしかもその先端が上または下あるいは上下に突
起した構造であることを特徴とする樹脂封止型半導体装
置。In a resin-sealed semiconductor device using a lead frame without a semiconductor element mounting part, some of the internal leads of the lead frame without a semiconductor element mounting part are longer than other leads, and their tips are on top, bottom, or above and below. A resin-sealed semiconductor device characterized by having a protruding structure.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2023481A JPH03227041A (en) | 1990-01-31 | 1990-01-31 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2023481A JPH03227041A (en) | 1990-01-31 | 1990-01-31 | Resin-sealed semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03227041A true JPH03227041A (en) | 1991-10-08 |
Family
ID=12111720
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2023481A Pending JPH03227041A (en) | 1990-01-31 | 1990-01-31 | Resin-sealed semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03227041A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10146307A1 (en) * | 2001-09-19 | 2003-05-08 | Infineon Technologies Ag | Visual monitoring of semiconducting component housings involves detecting faulty casings and/or coverings of wire contacts by detecting different degrees of reflection and/or intensity values |
-
1990
- 1990-01-31 JP JP2023481A patent/JPH03227041A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10146307A1 (en) * | 2001-09-19 | 2003-05-08 | Infineon Technologies Ag | Visual monitoring of semiconducting component housings involves detecting faulty casings and/or coverings of wire contacts by detecting different degrees of reflection and/or intensity values |
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