JPH03214763A - Lead frame for semiconductor integrated circuit device and the device using the same - Google Patents

Lead frame for semiconductor integrated circuit device and the device using the same

Info

Publication number
JPH03214763A
JPH03214763A JP970990A JP970990A JPH03214763A JP H03214763 A JPH03214763 A JP H03214763A JP 970990 A JP970990 A JP 970990A JP 970990 A JP970990 A JP 970990A JP H03214763 A JPH03214763 A JP H03214763A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
device
printed board
same
integrated circuit
island
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP970990A
Inventor
Hideaki Koyama
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components

Abstract

PURPOSE: To reduce a thermal resistance between a case and its environment by extending a heat sink pin protruding from an island in contact with a heat source toward a rear surface, and soldering it to a ground plane at the time of mounting on a printed board.
CONSTITUTION: A heat sink pin 2 is formed in an integral structure with an island 6 to protrude from the bottom of a molding resin 1. When an IC package is mounted on a printed board 8, the pin 2 is bonded to the surface of a copper foil 9 at the rear side of a printed board 8 through the board 8 via a solder layer 7. It is then sealed with molding resin 1. Thus, its thermal resistance can be reduced without increasing a mounting area to cope with a monolithic large-scale circuit.
COPYRIGHT: (C)1991,JPO&Japio
JP970990A 1990-01-19 1990-01-19 Lead frame for semiconductor integrated circuit device and the device using the same Pending JPH03214763A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP970990A JPH03214763A (en) 1990-01-19 1990-01-19 Lead frame for semiconductor integrated circuit device and the device using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP970990A JPH03214763A (en) 1990-01-19 1990-01-19 Lead frame for semiconductor integrated circuit device and the device using the same

Publications (1)

Publication Number Publication Date
JPH03214763A true true JPH03214763A (en) 1991-09-19

Family

ID=11727779

Family Applications (1)

Application Number Title Priority Date Filing Date
JP970990A Pending JPH03214763A (en) 1990-01-19 1990-01-19 Lead frame for semiconductor integrated circuit device and the device using the same

Country Status (1)

Country Link
JP (1) JPH03214763A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0650373U (en) * 1992-06-12 1994-07-08 八重洲無線株式会社 Mounting structure of the laser diode
US5444025A (en) * 1991-10-23 1995-08-22 Fujitsu Limited Process for encapsulating a semiconductor package having a heat sink using a jig
US5563773A (en) * 1991-11-15 1996-10-08 Kabushiki Kaisha Toshiba Semiconductor module having multiple insulation and wiring layers
US6455348B1 (en) 1998-03-12 2002-09-24 Matsushita Electric Industrial Co., Ltd. Lead frame, resin-molded semiconductor device, and method for manufacturing the same
JP2014013908A (en) * 2006-04-06 2014-01-23 Freescale Semiconductor Inc Molded semiconductor package with integrated through hole technology (tht) heat spreader pin and method of manufacturing the same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5444025A (en) * 1991-10-23 1995-08-22 Fujitsu Limited Process for encapsulating a semiconductor package having a heat sink using a jig
US5659200A (en) * 1991-10-23 1997-08-19 Fujitsu, Ltd. Semiconductor device having radiator structure
US5563773A (en) * 1991-11-15 1996-10-08 Kabushiki Kaisha Toshiba Semiconductor module having multiple insulation and wiring layers
JPH0650373U (en) * 1992-06-12 1994-07-08 八重洲無線株式会社 Mounting structure of the laser diode
US6455348B1 (en) 1998-03-12 2002-09-24 Matsushita Electric Industrial Co., Ltd. Lead frame, resin-molded semiconductor device, and method for manufacturing the same
JP2014013908A (en) * 2006-04-06 2014-01-23 Freescale Semiconductor Inc Molded semiconductor package with integrated through hole technology (tht) heat spreader pin and method of manufacturing the same
US8659146B2 (en) 2006-04-06 2014-02-25 Freescale Semiconductor, Inc. Lead frame based, over-molded semiconductor package with integrated through hole technology (THT) heat spreader pin(s) and associated method of manufacturing

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