JPH0412555A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0412555A
JPH0412555A JP11624990A JP11624990A JPH0412555A JP H0412555 A JPH0412555 A JP H0412555A JP 11624990 A JP11624990 A JP 11624990A JP 11624990 A JP11624990 A JP 11624990A JP H0412555 A JPH0412555 A JP H0412555A
Authority
JP
Japan
Prior art keywords
heat sink
heat
semiconductor device
semiconductor element
recessed portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11624990A
Other languages
Japanese (ja)
Inventor
Hideaki Nagura
名倉 英明
Masahiro Ihara
井原 正弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP11624990A priority Critical patent/JPH0412555A/en
Publication of JPH0412555A publication Critical patent/JPH0412555A/en
Pending legal-status Critical Current

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To make it possible to efficiently dissipate the generated heat by mounting a semiconductor element on a recessed portion or a projected portion to decide a position of a heat sink, and then by packaging it with resin. CONSTITUTION:A heat sink 1 is formed by a copper plate or an aluminum plate which has high heat conduction. A mounting hole 3 is perforated through the fin of the heat sink, and a recessed portion 4 of the heat-dissipating to decide the position in the central part of the heat sink. A packaged semiconductor element 6 is mounted on the recessed portion 4 of the heat sink by soldering or other methods, and is coated by a package 7 consisting of epoxy resin. In this way, the heat to be generated in a device for semiconductor can be efficiently dissipated.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は各種電子機器に使用される大電力用の半導体装
置に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a high-power semiconductor device used in various electronic devices.

従来の技術 従来、半導体装置の大電力化をはかる方法として、パッ
ケージ自体を大きくし、ICチップからの放熱をよくす
る方法、あらかじめパッケージした半導体装置を放熱フ
ィンにネジ締め等で取付け、放熱フィンにより放熱をよ
くする方法および回路基板に半田付けする方法などがあ
る。
Conventional technology Conventionally, as a method for increasing the power consumption of semiconductor devices, there has been a method of increasing the size of the package itself to improve heat dissipation from the IC chip. There are methods to improve heat dissipation and methods to solder it to the circuit board.

発明が解決しようとする課題 しかしながら上記の構成では半導体装置内に熱が蓄積さ
れるという問題点、半導体装置を使用する電子機器の容
積によって放熱フィンの大きさが限定されるという問題
点および回路基板の大きさによって放熱効果が異なると
いう問題点を有していた。
Problems to be Solved by the Invention However, with the above configuration, there are problems that heat is accumulated within the semiconductor device, the size of the heat dissipation fin is limited depending on the volume of the electronic device that uses the semiconductor device, and the circuit board. The problem was that the heat dissipation effect differed depending on the size.

本発明は上記の問題点を解決するもので、半導体装置内
で発生する熱を効率的に放散させることができる半導体
装置を提供することを目的とする。
The present invention solves the above-mentioned problems, and an object of the present invention is to provide a semiconductor device that can efficiently dissipate heat generated within the semiconductor device.

課題を解決するための手段 この目的を達成するために本発明の半導体装置は、半導
体素子に位置決め用の凹面または凸面を設けた放熱板を
接続し樹脂でパッケージした構成を有している。
Means for Solving the Problems To achieve this object, the semiconductor device of the present invention has a structure in which a heat sink having a concave or convex surface for positioning is connected to a semiconductor element and packaged with resin.

作用 この構成によって、半導体素子と放熱板を接着する半田
の流れをよくすると同時に、半導体装置の取付けを正確
に規定できることとなる。
Function: This structure improves the flow of the solder that bonds the semiconductor element and the heat sink, and at the same time allows the mounting of the semiconductor device to be accurately defined.

実施例 以下本発明の一実施例について、図面を参照しながら説
明する。
EXAMPLE An example of the present invention will be described below with reference to the drawings.

第1図に示すように、放熱板1は熱伝導度のよい銅板や
アルミニウムなどで形成され、その放熱フィンには取付
は孔3が設けられ、また中央部分には位置決め用の凹面
4が形成されている。そして、第2図および第3図に示
すようにパッケージされた半導体素子6が、この放熱板
1の凹面4に半田付けなどにより取り付けられ、エポキ
シ樹脂からなるパッケージ7で被覆されている。
As shown in Fig. 1, the heat dissipation plate 1 is made of a copper plate or aluminum with good thermal conductivity, and its heat dissipation fins are provided with holes 3 for mounting, and a concave surface 4 for positioning is formed in the central part. has been done. As shown in FIGS. 2 and 3, a packaged semiconductor element 6 is attached to the concave surface 4 of the heat sink 1 by soldering or the like, and covered with a package 7 made of epoxy resin.

以上のように構成された半導体装置の熱抵抗の測定値を
、従来例と比較して第4図に示す。
FIG. 4 shows the measured values of the thermal resistance of the semiconductor device configured as described above, in comparison with a conventional example.

これから明らかなように、本実施例の熱抵抗が従来例の
それに比べて低く、またそのばらつきも小さい。
As is clear from this, the thermal resistance of this embodiment is lower than that of the conventional example, and its variation is also small.

以上のように、本実施例によれば凹面を設けた放熱板に
半導体素子を半田付けし樹脂によりパッケージする構成
により、熱抵抗が大巾に低下し発生する熱を効率的に放
散させられるので、大電力化できる。放熱板への取付は
位置が正確に規定できるので、半導体装置の特性および
外形寸法のばらつきを少なくすることができる。さらに
半導体装置の放熱フィン取付は孔を利用してアルミニウ
ム板などの放熱フィンを取付けることにより、層の大電
力化がはかれる。また、あらかじめパッケージした半導
体素子に放熱板を付加する構成であるので、製造工程で
高額な設備や高価な材料を必要とせず、総合的なコスト
低減もできる。
As described above, according to this embodiment, the semiconductor element is soldered to a heat sink with a concave surface and packaged with resin, so that the thermal resistance is greatly reduced and the generated heat can be efficiently dissipated. , high power can be achieved. Since the mounting position on the heat sink can be precisely defined, variations in the characteristics and external dimensions of the semiconductor device can be reduced. Furthermore, when attaching heat dissipating fins to semiconductor devices, by using the holes to attach heat dissipating fins made of aluminum plates or the like, it is possible to increase the power consumption of the layer. Furthermore, since the configuration is such that a heat sink is added to a prepackaged semiconductor element, expensive equipment and expensive materials are not required in the manufacturing process, and overall costs can be reduced.

なお実施例において、凹面4を段けた放熱板1を用いた
が、第5図に示すように凸面5を設けた放熱板2を用い
てもよい。
In the embodiment, a heat sink 1 having stepped concave surfaces 4 was used, but a heat sink 2 having a convex surface 5 as shown in FIG. 5 may also be used.

発明の効果 以上の説明からも明らかなように、本発明は、半導体素
子を、放熱板の位置決め用の凹面または凸面の部分に取
付け、さらに樹脂でパッケージした構成であるので、発
生する熱を効率的に放散させることがで、大電力用半導
体装置を実現できるものである。
Effects of the Invention As is clear from the above explanation, the present invention has a structure in which a semiconductor element is attached to a concave or convex surface for positioning a heat sink, and is further packaged with resin, so that the generated heat can be efficiently dissipated. By effectively dissipating the energy, it is possible to realize a high-power semiconductor device.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)は本発明の半導体装置の一実施例における
放熱板の正面図、同図(b)はその側面図、同図(e)
はその底面図である。第2図(a)は本発明の半導体装
置の一実施例における半導体素子の一例の正面図、同図
(b)はその側面図である。第3図(a)は同じ(半導
体素子の他の例の正面図、同図(b)はそのA−A″断
面図である。第4図は本発明の一実施例と従来例の半導
体装置の熱抵抗の測定値の分布図、第5図(a)は本発
明の半導体装置の他の実施例における放熱板の正面図、
同図(b)はその側面図、同図(C)はその底面図であ
る。 1.2・・・・・・放熱板、4・・・・・・凹面、5・
・・・・・凸面、6・・・・・・半導体素子、7・・・
・・・パッケージ。 代理人の氏名 弁理士 粟野重孝 ほか1名第1図 第2図 第 図 第 図 一買杷例 第 図
FIG. 1(a) is a front view of a heat sink in an embodiment of the semiconductor device of the present invention, FIG. 1(b) is a side view thereof, and FIG. 1(e)
is its bottom view. FIG. 2(a) is a front view of an example of a semiconductor element in an embodiment of the semiconductor device of the present invention, and FIG. 2(b) is a side view thereof. FIG. 3(a) is a front view of another example of the same semiconductor element, and FIG. 3(b) is a sectional view taken along line A-A''. FIG. A distribution diagram of measured values of thermal resistance of the device, FIG. 5(a) is a front view of a heat sink in another embodiment of the semiconductor device of the present invention,
The figure (b) is the side view, and the figure (C) is the bottom view. 1.2... Heat sink, 4... Concave surface, 5...
... Convex surface, 6 ... Semiconductor element, 7 ...
···package. Name of agent: Patent attorney Shigetaka Awano and one other person Figure 1 Figure 2 Figure 2 Figure 1

Claims (1)

【特許請求の範囲】[Claims]  あらかじめパッケージされた半導体素子に、位置決め
用の凹面または凸面を設けた放熱板を接続し樹脂でパッ
ケージした半導体装置。
A semiconductor device in which a heat sink with a concave or convex surface for positioning is connected to a pre-packaged semiconductor element and packaged with resin.
JP11624990A 1990-05-02 1990-05-02 Semiconductor device Pending JPH0412555A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11624990A JPH0412555A (en) 1990-05-02 1990-05-02 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11624990A JPH0412555A (en) 1990-05-02 1990-05-02 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0412555A true JPH0412555A (en) 1992-01-17

Family

ID=14682461

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11624990A Pending JPH0412555A (en) 1990-05-02 1990-05-02 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0412555A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6693350B2 (en) 1999-11-24 2004-02-17 Denso Corporation Semiconductor device having radiation structure and method for manufacturing semiconductor device having radiation structure
US6703707B1 (en) 1999-11-24 2004-03-09 Denso Corporation Semiconductor device having radiation structure
US6946730B2 (en) 2001-04-25 2005-09-20 Denso Corporation Semiconductor device having heat conducting plate

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6693350B2 (en) 1999-11-24 2004-02-17 Denso Corporation Semiconductor device having radiation structure and method for manufacturing semiconductor device having radiation structure
US6703707B1 (en) 1999-11-24 2004-03-09 Denso Corporation Semiconductor device having radiation structure
US6798062B2 (en) 1999-11-24 2004-09-28 Denso Corporation Semiconductor device having radiation structure
US6891265B2 (en) 1999-11-24 2005-05-10 Denso Corporation Semiconductor device having radiation structure
US6960825B2 (en) 1999-11-24 2005-11-01 Denso Corporation Semiconductor device having radiation structure
US6967404B2 (en) 1999-11-24 2005-11-22 Denso Corporation Semiconductor device having radiation structure
US6992383B2 (en) 1999-11-24 2006-01-31 Denso Corporation Semiconductor device having radiation structure
US6998707B2 (en) 1999-11-24 2006-02-14 Denso Corporation Semiconductor device having radiation structure
US6946730B2 (en) 2001-04-25 2005-09-20 Denso Corporation Semiconductor device having heat conducting plate
US6963133B2 (en) 2001-04-25 2005-11-08 Denso Corporation Semiconductor device and method for manufacturing semiconductor device

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