JPH0319311A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To contrive improvement in preciseness of positioning of the pattern of a semiconductor device by a method wherein, after the asymmetrical region of the lower layer photoresist located in the vicinity of the target on the semiconductor substrate has been removed, an upper layer photoresist is coated, and a pattern is formed. CONSTITUTION:A target 12, which becomes the reference for positioning, is formed on the surface of a semiconductor substrate 11, and a lower layer photoresist 13 is coated thereon using a spin coating method and the like. An asymmetrical region 16 is generated on the lower layer photoresist located in the vicinity of the target 12. Said region 16 is exposed and removed by developing using a mask for exposure of a target region 17 only containing the asymmetrical region 16 of the lower layer photoresist. Then, the part of the lower layer photoresist 13, which is the part remained after removal of the target region 17, is prebaked, and an upper layer photoresist 18 is coated thereon. The dimensional difference between the target 12 and the target region 17 is not made larger than it is necessary in order to lessen the asymmetry of the upper photoresist.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device for improving the accuracy of alignment of fine patterns such as LSI. [Summary of the invention] In a process of forming a pattern using two or more layers of photoresist, a lower layer of photoresist is removed from a target area for alignment, and then an upper layer of photoresist is applied to form a pattern. ．． Since there is no underlying photoresist in the target area, the target can be clearly identified and the exact position of the target can be recognized during alignment, allowing highly accurate alignment.

[Conventional technology]

In a pattern forming process for performing A1 wiring of an LSI, etc., it is a necessary condition to improve pattern alignment accuracy as elements become smaller. For this pattern alignment, as shown in FIG. 2, a cross-shaped target mark 1 having submicron-order steps is provided on the surface of the semiconductor substrate, and a mask of alignment marks 2 is placed over the target mark 1. After aligning and aligning, a pattern is formed. During this alignment, if the coated photoresist is pre-baked or exposed for alignment, the transparency of the photoresist decreases, making it difficult to see the reflected light from the target mark, and making the alignment inaccurate. There were times when I ended up.

Therefore, in order to remove the photoresist in the area including the alignment mark 2, there is also known an apparatus that uses the local exposure window 3 to expose the photoresist to another light source, and then removes the photoresist. 1963-296220).

[Problem to be solved by the invention]

When forming a fine pattern on a semiconductor substrate with steps such as an LSI, it is desirable to use a multilayer photoresist with two or more layers. In pattern forming using a multilayer photoresist, in order to accurately align the target with the target on the semiconductor substrate, it is necessary to provide the target with a certain level of height difference. When applying photoresist on this target using the Subin coating method, etc.
As shown in FIG. 3, after coating the lower layer photoresist 13 on the target 12 provided on the semiconductor substrate 11, the thickness of the photoresist is 1
5 becomes asymmetrical with respect to the center line 14 of the target. This causes the position of the target to appear optically shifted.

An object of the present invention is to realize highly accurate positioning without causing the target position to appear shifted.

[Means to solve the problem]

In order to solve the above-mentioned problems, the present invention removes the asymmetrical region of the lower photoresist near the target on the semiconductor substrate, and then coats the upper layer photoresist to form a pattern, thereby improving the alignment accuracy of the pattern. It measures the improvement of

[Effect]

By removing the asymmetric areas of the underlying photoresist on the target, there is no optical misalignment and no attenuation of reflected light from the target. Furthermore, even if the upper layer photoresist is applied, since the lower layer photoresist is applied near the target, the asymmetry caused by the upper layer photoresist is so small that it can be ignored.

〔Example〕

An embodiment of the present invention will be described using FIG. First, a target opening 2 serving as a reference for positioning is formed on the surface of the semiconductor substrate 11, and a lower layer photoresist 13 is coated by a subin coating method or the like. An asymmetrical region l6 of the lower photoresist near the target eye 2 is generated. A cross-sectional view after coating the lower photoresist is shown in FIG. 1a.

Next, a mask is used to expose only the target area 17 including the asymmetric area 16 of the lower photoresist, and the photoresist is developed and removed. A cross-sectional view of the target area after removing the lower photoresist layer is shown in Figure 1b. Next, the remaining portion of the lower photoresist 13 from which the target region 17 has been removed is prebaked, and the upper photoresist 18 is applied thereon. A cross-sectional view after coating the upper layer photoresist is shown in FIG. 1C. In order to reduce the asymmetry of the upper layer photoresist, it is preferable not to make the dimensional difference between the target 12 and the target region 17 larger than necessary. Furthermore, if the upper layer photoresist is applied without prebaking the lower layer photoresist 13, mixing of the upper and lower layer photoresists is likely to occur, so when using a multilayer photoresist, prebaking the lower layer photoresist is a necessary step. .

The type and type of photoresist can be freely selected and used within the spirit of the present invention.

In the embodiments of the present invention, a two-layer structure of a lower photoresist and an upper photoresist has been described, but even when the lower photoresist has multiple layers, the method for manufacturing the lower photoresist of the present invention may be applied to multiple layers of photoresist. A similar effect can be obtained by applying

〔Effect of the invention〕

By using the method of manufacturing a semiconductor device in which the photoresist in the target area is removed according to the present invention, asymmetry of the photoresist does not occur, so there is no misalignment during alignment, and the tardetes can be clearly seen. Highly accurate positioning can be achieved.

3--11・1 2-----1・3 4-・5-・1-1・−・16−・−・−・− 17・−・−・1・・ 18・−・1 part Exposure window part semiconductor substrate target lower layer photoresist target center line Photoresist thickness, one lower layer photoresist l, asymmetrical area, one target area, one upper layer photoresist

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view at each step of the embodiment of the present invention,
is a cross-sectional view after applying the lower layer photoresist, b is a cross-sectional view after removing the lower layer photoresist in the target 81 area, C is a cross-sectional view after the upper layer photoresist}4 cloth, and Figures 2 a to C are the conventional alignment FIG. 3 is a plan view of the mark used and a cross-sectional view showing the asymmetry of the photoresist. ■−・・・−・・−・Target mark 2−・−・11−−−1−1 Positioning mark 0 91τ mark a Cliff surface view after coating of lower layer photoresist b 18-H. 1. Figure 1. A plan view of the mark used for the conventional (out-of-place positioning) Figure 2.

Claims (1)

[Claims] In a step of forming a pattern on a semiconductor substrate using two or more layers of photoresist, after coating a lower layer photoresist on a target having a step formed on the semiconductor substrate for alignment, the target locally removing the underlying photoresist over the area;
A method of manufacturing a semiconductor device in which a pattern is formed by coating an upper layer of photoresist after baking.