JPH03192801A - Monolithic microwave integrated circuit device - Google Patents

Monolithic microwave integrated circuit device

Info

Publication number
JPH03192801A
JPH03192801A JP33361689A JP33361689A JPH03192801A JP H03192801 A JPH03192801 A JP H03192801A JP 33361689 A JP33361689 A JP 33361689A JP 33361689 A JP33361689 A JP 33361689A JP H03192801 A JPH03192801 A JP H03192801A
Authority
JP
Japan
Prior art keywords
resistor
capacitor
bias circuit
circuit
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP33361689A
Other languages
Japanese (ja)
Inventor
Nagisa Ayaki
綾木 なぎさ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP33361689A priority Critical patent/JPH03192801A/en
Publication of JPH03192801A publication Critical patent/JPH03192801A/en
Pending legal-status Critical Current

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  • Junction Field-Effect Transistors (AREA)
  • Waveguide Connection Structure (AREA)
  • Microwave Amplifiers (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To improve the effect of preventing reflection of a microwave in a bias circuit and to prevent the oscillation by forming a resistor made of a conductive layer on a board as a bias circuit, connecting an open stub made of a microstrip line forming a small capacitance to one end of the resistor and connecting a parallel plate type capacitor to the other end. CONSTITUTION:The bias circuit 6 consists of an open stub 19 comprising a microstrip line connecting to one terminal of a resistor 9 and a parallel flat plate type capacitor 10 connecting to the other terminal of the resistor 9. Since the capacitance of the small capacitor connecting to one terminal of the resistor 9 is very accurately set by an open stub 19, a filter circuit comprising the small capacitance capacitor set by the said open stub 19, the resistor 10 and the capacitor 10 is formed to provide a desired characteristic. Thus, the power reflecting coefficient at the operating frequency band when viewing the bias circuit 6 from a connecting terminal 13 is designed to be very close to the unity and the leakage of a microwave is prevented.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は、UHFHF上の超高周波帯で動作するモノ
リシック・マイクロ波集積回路(以下、MMICと略称
する)(、,間するものであり、特に改良ざる。
[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a monolithic microwave integrated circuit (hereinafter abbreviated as MMIC) that operates in an ultra-high frequency band on UHFHF. Especially improved colander.

(従来の技術) 第3図は一般に用いられているMMICの等何回路図て
、(1)はMMIC中に形成される能動回路部である例
えばGaAS電界効果トランジスタ(以下、FETと称
す)てあり、そのソースは接地され、トレインは出力端
子(2)に接続され、ゲートは整合回路(3)を経てゲ
ート入力端子(4)−に接続されている。ゲート入力端
子(4)はまた整合回路(5)を経てFET (Hのゲ
ートにバイアス電圧を印加するためのバイアス回路(6
)に接続されている。バイアス回路(6)は小官にのキ
ャパシタ(8)と、抵抗(9)と、比較的大きな容量の
キャパシタ(10)とからなり、これらキャパシタ(8
)、抵抗(9)、キャパシタ(10)は、マイクロ波信
号かバイアス電源端子(11)に漏洩するのを防止し、
また漏洩したマイクロ波か反射して発振するのを防止す
るための濾波回路として作用する。
(Prior Art) Figure 3 shows a circuit diagram of a commonly used MMIC, and (1) shows an active circuit formed in the MMIC, such as a GaAS field effect transistor (hereinafter referred to as FET). Its source is grounded, its train is connected to the output terminal (2), and its gate is connected to the gate input terminal (4) through a matching circuit (3). The gate input terminal (4) also passes through a matching circuit (5) to a bias circuit (6) for applying a bias voltage to the gate of the FET (H).
)It is connected to the. The bias circuit (6) consists of a small capacitor (8), a resistor (9), and a relatively large capacitor (10).
), resistor (9), and capacitor (10) prevent the microwave signal from leaking to the bias power supply terminal (11),
It also acts as a filter circuit to prevent leaked microwaves from being reflected and oscillated.

第4図は第3図のバイアス回路(6)を質重Cに実現し
た場合のパターンの平面図を示す。第4図で、第3図と
同等または相当部分には同じ参照番号を付す。第4図て
、半絶縁性GaAs基板(図示せず)」−に形成した導
電層からなる抵抗(9)の両端にはそれぞれ平行平板型
キャパシタ(8)と(10)か接続されている。小容量
の平行平板型キャパシタ(8)は下地電極(81)、絶
縁膜(82)、およびL地電極(83)からなり、下地
電極(81)は第3図の整合回路(5)および抵抗(9
)を形成する導電層に接続され、上地電極(83)は接
地されている。また、比較的大きな容量の平行平板型キ
ャパシタ(In)も同様に下地電極(91)、絶縁膜(
92)、および上地電極(93)からなり、下地電極(
91)はバイアス電源端子(11)および抵抗(9)を
形成する導電層に接続され、上地電極(93)は接地さ
れている。
FIG. 4 shows a plan view of a pattern when the bias circuit (6) of FIG. 3 is realized with a weight C. In FIG. 4, parts that are equivalent or corresponding to those in FIG. 3 are given the same reference numerals. In FIG. 4, parallel plate capacitors (8) and (10) are connected to both ends of a resistor (9) made of a conductive layer formed on a semi-insulating GaAs substrate (not shown). A small capacity parallel plate capacitor (8) consists of a base electrode (81), an insulating film (82), and an L base electrode (83), and the base electrode (81) is connected to the matching circuit (5) and a resistor in FIG. (9
), and the upper electrode (83) is grounded. Similarly, a parallel plate capacitor (In) with a relatively large capacity also has a base electrode (91) and an insulating film (
92), and an upper electrode (93);
91) is connected to a conductive layer forming a bias power supply terminal (11) and a resistor (9), and an upper electrode (93) is grounded.

(発明か解決しようとする課題) 上記のような従来のMMIGでは、バイアス回路(6)
の濾波回路を構成する小容量のキャパシタ(8)も比較
的大容量のキャパシタ(lO)と同様に平行平板型キャ
パシタとして構成されているため、この手合−1のキャ
パシタ(8)を構成する電極あるいは絶縁膜の周辺効果
の影響か強く表われ、各電極(81)、(83)の寸法
、絶縁膜(82)の厚み等を正確に調整しても、その容
ta値を所望の値に設定することか困難である。手合に
のキャパシタ(8)として所望の容重−値か得られない
場合は、マイクロ波が・漏洩し、バイアス回路(6)て
反射波か発生し、またこれによって不所望な発振が生ず
ることかあり、このため、ICの低反射化、低雑音化、
高利得化か困難になる等の問題かあった。
(Invention or problem to be solved) In the conventional MMIG as described above, the bias circuit (6)
Since the small capacity capacitor (8) constituting the filtering circuit is also configured as a parallel plate capacitor like the relatively large capacity capacitor (lO), the electrodes constituting the capacitor (8) of this scheme-1 Alternatively, the peripheral effect of the insulating film appears strongly, and even if the dimensions of each electrode (81), (83), the thickness of the insulating film (82), etc. are adjusted accurately, the capacitance ta value does not reach the desired value. It is difficult to set up. If the desired capacitance value cannot be obtained for the capacitor (8), microwaves may leak and a reflected wave may be generated by the bias circuit (6), which may also cause undesired oscillation. Yes, for this reason, it is possible to reduce the reflection and noise of the IC.
There were problems such as difficulty in increasing the gain.

この発明は、特に小容量のキャパシタ(8)の粘度を向
−卜させて、バイアス回路(6)における発振防11−
、マイクロ波阻1ト俺力を向上させ、バイアス回路(6
)ての反射か低く、低雑音、高利得のMMCをキlIる
ことを[1的とする。
This invention particularly improves the viscosity of a small capacity capacitor (8) to prevent oscillation in the bias circuit (6).
, improve the power of microwave blocking, bias circuit (6
) to create a low-noise, high-gain MMC with low reflections.

(課題を解決するための手段) この発明によるMMICは、能動回路にバイアス電圧を
供給するバイアス回路として、基板1−に形成した導電
層からなる抵抗と、該抵抗の一端に接続され、小容量キ
ャパシタとして作用するマイクロストリップ線路よりな
るオーブンスタブと、上記抵抗の他端に接続された平行
平板型キャパシタとからなる回路か使用されている。
(Means for Solving the Problems) The MMIC according to the present invention has a resistor made of a conductive layer formed on a substrate 1- as a bias circuit for supplying a bias voltage to an active circuit, and a resistor connected to one end of the resistor with a small capacitance. A circuit is used consisting of an oven stub consisting of a microstrip line acting as a capacitor and a parallel plate capacitor connected to the other end of the resistor.

(作   用) この発明によれば、小容量キャパシタとしてマイクロス
トリップ線路からなるスタブを使用しているから、その
容量値を精度よく設定することができ、バイアス回路(
6)における発振防止能力、マイクロ波阻止能力か向上
する。
(Function) According to the present invention, since a stub made of a microstrip line is used as a small capacitance capacitor, its capacitance value can be set accurately, and the bias circuit (
The oscillation prevention ability and microwave blocking ability in 6) are improved.

(実 施 例) 第1図はこの発明による質重Cの等何回路を示し、第2
図は第1図のMMIGで使用されるバイアス回路(6)
のパターンの平面図を示す、第1図および第2図の素子
中、第3図および第4図の従来のMMIGと同一素子に
ついては同じ参照番号を付す。
(Embodiment) Fig. 1 shows an equal number circuit of mass C according to the present invention, and the second
The diagram shows the bias circuit (6) used in the MMIG in Figure 1.
Among the elements in FIGS. 1 and 2, which show plan views of the patterns, the same elements as those in the conventional MMIG of FIGS.

すなわら、(1)は能動回路部である例えばGaAs 
FETて、そのソースは接地され、トレインは出力端子
(2)に接続され、ゲートは整合回路(3)を経てゲー
ト入力端子(4)に接続されている。ゲート入力端子(
4)はまた整合回路(5)を経てFET(1)のゲート
にバイアス′1[圧を印加するためのバイアス回路(6
)に接続されている。バイアス回路(6)は、例えば半
絶縁性GaAs基板(図示せず)上に形成した導電層か
らなる抵抗(9)と、該抵抗(9)の一端に接続された
マイクロストリップ線路からなるオーブンスタフ(19
)と、」二記抵抗(9)の他端に接続された平行平板型
キャパシタ(10)とにより構成されている。オーブン
スター(19)は小容量のキャパシタとして作用し、そ
の容量値はオーブンスターj (+9)を構成するマイ
クロストリップ線路のインピーダンス値と、その電気長
とによって正確に決定することかてきる。オーブンスタ
ブ(19)の非オーブン側の接続端(13)は整合回路
(5)に接続されている。一方、平行平板型キャパシタ
(10)は下地’+jj、極(91)、絶縁膜(92)
、および上地電極(93)からなり、下地電極(91)
はバイアス電源端子(+1)に接続され、hJ′l!電
極(93)は接地されている。
In other words, (1) is an active circuit section such as GaAs.
The source of the FET is grounded, the train is connected to the output terminal (2), and the gate is connected to the gate input terminal (4) via a matching circuit (3). Gate input terminal (
4) is also connected to a bias circuit (6) for applying a bias '1 [pressure] to the gate of FET (1) via a matching circuit (5).
)It is connected to the. The bias circuit (6) includes, for example, a resistor (9) made of a conductive layer formed on a semi-insulating GaAs substrate (not shown), and an oven staff made of a microstrip line connected to one end of the resistor (9). (19
), and a parallel plate capacitor (10) connected to the other end of the resistor (9). The oven star (19) acts as a small capacitor, and its capacitance value can be accurately determined by the impedance value of the microstrip line constituting the oven star j (+9) and its electrical length. The non-oven side connecting end (13) of the oven stub (19) is connected to the matching circuit (5). On the other hand, the parallel plate capacitor (10) has a base '+jj, a pole (91), and an insulating film (92).
, and a top electrode (93), which includes a bottom electrode (91).
is connected to the bias power supply terminal (+1), and hJ′l! The electrode (93) is grounded.

この発明のMMIGにおいては、抵抗(9)の一端に接
続された小容量のキャパシタの容量値をオーブンスタフ
(19)により極めて正確に設定することが一つ− できるから、該オープンスタツ(19)による小容量キ
ャパシタと、抵抗(9)、およびキャパシタ(10)と
からなる鑓波回路を所望の特性を呈するように構成する
ことかてきる。従って、接続端(13)からバイアス回
路(6)側を見た動作周波数帯域における電力反射係数
か1に極めて近い値になるように設計することかでき、
マイクロ波の漏洩を防止して発振か生ずるのを有効に防
止することかできる。
In the MMIG of the present invention, the capacitance value of the small capacitor connected to one end of the resistor (9) can be set extremely accurately using the oven stuff (19). ), a resistor (9), and a capacitor (10) can be configured to exhibit desired characteristics. Therefore, the power reflection coefficient in the operating frequency band when looking from the connection end (13) to the bias circuit (6) side can be designed to have a value extremely close to 1.
It is possible to effectively prevent microwave leakage and oscillation.

なお、を記の実施例ては、FET (1)のゲートにバ
イアス電圧を印加するためのバイアス回路(6)につい
て説明したか、トレイン電圧印加用、あるいはタイオー
ト等を含むMMIGの能動回路用のバイアス電圧を供給
するためのバイアス回路としても使用することがてきる
。また、上記実施例てはGa八へ基板を使用した例を示
したか、他の■−v族、II−Vl族化合物半導体基板
、Si基板を使用した装置にも適用てきることは言う迄
もない。
In addition, in the embodiment described above, the bias circuit (6) for applying a bias voltage to the gate of the FET (1) is explained, or it is used for applying a train voltage or for an active circuit of MMIG including a tie-out. It can also be used as a bias circuit for supplying a bias voltage. Although the above embodiments are examples using Ga8 substrates, it goes without saying that they can also be applied to devices using other ■-V group, II-Vl group compound semiconductor substrates, and Si substrates. do not have.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明のMMIGでは、バイアス回路
(6)として基板4二に導電層よりなる抵抗(9)を形
成し、その一方の端部に小容量キャパシタを構成するマ
イクロストリップ線路よりなるオープンスタツを接続し
、他方の端部に平行モ板型キャパシタを接続して構成さ
れたものを使用しているのて、特にL記小官聞キャパシ
タの容量値を精度よく設定することかてき1発振の防止
、バイアス回路でのマイクロ波の反射防1F効果か向上
し、低雑音、高利得のMMI(:を実現することかてき
る。
As described above, in the MMIG of the present invention, a resistor (9) made of a conductive layer is formed on the substrate 42 as a bias circuit (6), and a microstrip line forming a small capacitance capacitor is formed at one end of the resistor (9). Since we are using a capacitor constructed by connecting an open capacitor and a parallel plate type capacitor to the other end, it is especially important to set the capacitance value of the L capacitor accurately. It is possible to prevent 1F oscillation and improve the 1F effect of preventing microwave reflection in the bias circuit, making it possible to realize a low-noise, high-gain MMI (:).

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明のモノリシック・マイクロ波集積回路
の一実施例のL要部の等価回路を示す図、第2図は第1
図に示すこの発明のモノリシック・マイクロ波集積回路
の一実施例て使用されるバイアス回路の一例の平面図、
第3図は従来のモノリシック・マイクロ波集積回路の−
・例の主要部の等価回路を示す図、第4図は第3図に示
す従来のそノリシック・マイクロ波集積回路て使用され
るバイアス回路の平面図である。 (1)・・・・FF、T  (情動回路)、(6)・・
・・バイアス回路、(9)・・・・抵抗、(lO)・・
・・平行平板型キャパシタ、(19)・・・・マイクロ
ストリップ線路よりなるオーブンスタツ、(91)・・
・・第1の金属膜、(92)・・・・・・絶縁膜、(9
3)・・・・第2の金属膜。 Il’jl  図 代  理  人 大 石 増 雄
FIG. 1 is a diagram showing an equivalent circuit of the L main part of an embodiment of the monolithic microwave integrated circuit of the present invention, and FIG.
A plan view of an example of a bias circuit used in an embodiment of the monolithic microwave integrated circuit of the present invention shown in FIG.
Figure 3 shows a conventional monolithic microwave integrated circuit.
・A diagram showing an equivalent circuit of the main part of the example. FIG. 4 is a plan view of a bias circuit used in the conventional monolithic microwave integrated circuit shown in FIG. (1)...FF, T (emotional circuit), (6)...
...Bias circuit, (9)...Resistance, (lO)...
・・Parallel plate capacitor, (19)・・Oven stud made of microstrip line, (91)・・・
...First metal film, (92)...Insulating film, (9
3)...Second metal film. Il'jl Tsuyo Osamu Hitoshi Masuo

Claims (1)

【特許請求の範囲】[Claims] (1)基板上に形成された能動回路と、該能動回路にバ
イアス電圧を供給するバイアス回路とを具備し、上記バ
イアス回路は、上記基板上に形成した導電層からなる抵
抗と、該抵抗の一端に接続され、小容量キャパシタとし
て作用するマイクロストリップ線路よりなるオープンス
タブと、上記抵抗の他端に接続され、上記基板上に形成
された第1の金属膜と、該第1の金属膜上に絶縁膜を介
して形成された第2の金属膜とからなる平行平板型キャ
パシタとからなることを特徴とするモノリシック・マイ
クロ波集積回路。
(1) Comprising an active circuit formed on a substrate and a bias circuit supplying a bias voltage to the active circuit, the bias circuit includes a resistor made of a conductive layer formed on the substrate, and a resistor of the resistor. an open stub made of a microstrip line connected to one end and acting as a small capacitance capacitor; a first metal film connected to the other end of the resistor and formed on the substrate; and a second metal film formed through an insulating film.
JP33361689A 1989-12-21 1989-12-21 Monolithic microwave integrated circuit device Pending JPH03192801A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33361689A JPH03192801A (en) 1989-12-21 1989-12-21 Monolithic microwave integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33361689A JPH03192801A (en) 1989-12-21 1989-12-21 Monolithic microwave integrated circuit device

Publications (1)

Publication Number Publication Date
JPH03192801A true JPH03192801A (en) 1991-08-22

Family

ID=18268045

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33361689A Pending JPH03192801A (en) 1989-12-21 1989-12-21 Monolithic microwave integrated circuit device

Country Status (1)

Country Link
JP (1) JPH03192801A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5451905A (en) * 1993-05-18 1995-09-19 U.S. Philips Corporation Microwave semiconductor device comprising stabilizing means
WO1998006174A1 (en) * 1996-08-05 1998-02-12 Mitsubishi Denki Kabushiki Kaisha High-frequency integrated circuit for high-frequency radio transmitter-receiver suppressed in influence of high-frequency power leakage
EP0940878A1 (en) * 1998-03-06 1999-09-08 Nec Corporation Short-stub matching circuit
JP2000223501A (en) * 1999-01-28 2000-08-11 Nec Corp Semiconductor integrated circuit and its manufacture
JP2008005128A (en) * 2006-06-21 2008-01-10 Mitsubishi Electric Corp Microwave amplifier

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62109410A (en) * 1985-11-07 1987-05-20 Mitsubishi Electric Corp Bias circuit for microwave amplifier
JPS62241401A (en) * 1986-04-14 1987-10-22 Matsushita Electric Ind Co Ltd Filter circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62109410A (en) * 1985-11-07 1987-05-20 Mitsubishi Electric Corp Bias circuit for microwave amplifier
JPS62241401A (en) * 1986-04-14 1987-10-22 Matsushita Electric Ind Co Ltd Filter circuit

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5451905A (en) * 1993-05-18 1995-09-19 U.S. Philips Corporation Microwave semiconductor device comprising stabilizing means
WO1998006174A1 (en) * 1996-08-05 1998-02-12 Mitsubishi Denki Kabushiki Kaisha High-frequency integrated circuit for high-frequency radio transmitter-receiver suppressed in influence of high-frequency power leakage
GB2331879A (en) * 1996-08-05 1999-06-02 Mitsubishi Electric Corp High frequency intergrated circuit for high-frequency radio transmitter-receiver suppressed in influence of high-frequency power leakage
GB2331879B (en) * 1996-08-05 2001-03-28 Mitsubishi Electric Corp Radio-frequency integrated circuit for a radio-frequency wireless transmitter-receiver with reduced influence by radio-frequency power leakage
US6308047B1 (en) 1996-08-05 2001-10-23 Mitsubishi Denki Kabushiki Kaisha Radio-frequency integrated circuit for a radio-frequency wireless transmitter-receiver with reduced influence by radio-frequency power leakage
EP0940878A1 (en) * 1998-03-06 1999-09-08 Nec Corporation Short-stub matching circuit
US6239670B1 (en) 1998-03-06 2001-05-29 Nec Corporation Short-stub matching circuit
JP2000223501A (en) * 1999-01-28 2000-08-11 Nec Corp Semiconductor integrated circuit and its manufacture
JP2008005128A (en) * 2006-06-21 2008-01-10 Mitsubishi Electric Corp Microwave amplifier
JP4641285B2 (en) * 2006-06-21 2011-03-02 三菱電機株式会社 Microwave amplifier

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