JPS5811746B2 - Ultra high frequency transistor amplifier - Google Patents

Ultra high frequency transistor amplifier

Info

Publication number
JPS5811746B2
JPS5811746B2 JP51129887A JP12988776A JPS5811746B2 JP S5811746 B2 JPS5811746 B2 JP S5811746B2 JP 51129887 A JP51129887 A JP 51129887A JP 12988776 A JP12988776 A JP 12988776A JP S5811746 B2 JPS5811746 B2 JP S5811746B2
Authority
JP
Japan
Prior art keywords
high frequency
thin plate
dielectric thin
frequency transistor
ultra
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP51129887A
Other languages
Japanese (ja)
Other versions
JPS5354472A (en
Inventor
加藤英彦
海琳正隆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP51129887A priority Critical patent/JPS5811746B2/en
Publication of JPS5354472A publication Critical patent/JPS5354472A/en
Publication of JPS5811746B2 publication Critical patent/JPS5811746B2/en
Expired legal-status Critical Current

Links

Description

【発明の詳細な説明】 本発明は超高周波帯のトランジスタ増幅器に関し、とく
にそのUHF帯FET低雑音増幅器の構造に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an ultra-high frequency band transistor amplifier, and particularly to the structure of the UHF band FET low noise amplifier.

最近1ミクロン程度のゲート幅を持つ非常に高性能のG
aAsFET(フィールドエフェクトトランジスタ)が
開発され、超高周波において従来のトンネルダイオード
増幅器に近い低雑音性と従来。
Recently, very high performance G with a gate width of about 1 micron has been developed.
The aAsFET (Field Effect Transistor) has been developed and has low noise characteristics similar to conventional tunnel diode amplifiers at ultra-high frequencies.

のバイポーラトランジスタより大きな出力特性、混変調
特性を持つ増幅器が開発されつつある。
Amplifiers with greater output characteristics and intermodulation characteristics than bipolar transistors are being developed.

しかし従来は主にIGHz帯以上の超高周波帯用のもの
であって0.4〜0.8GHz帯等のUHF帯では実用
に供せられていない。
However, conventional devices have mainly been used for ultra-high frequency bands above the IGHz band, and have not been put to practical use in the UHF band such as the 0.4 to 0.8 GHz band.

その理由はFETの入出力インピーダンスがUHF帯に
低下すると非常に高くなり広帯域な整合回路の構成が困
難になるからであった。
The reason for this is that when the input/output impedance of the FET drops to the UHF band, it becomes extremely high, making it difficult to construct a broadband matching circuit.

例えば1ミクロンゲートGaAsFET(28に85、
日本電気製)の650MHzにおける入出力インピーダ
ンスの1例はそれぞれ7Ω−j475Ω、320Ω−j
190Ωであって、システムの線路特性インピーダンス
50Ωの数倍も高い。
For example, 1 micron gate GaAsFET (28 to 85,
An example of the input and output impedance at 650MHz for NEC Corporation is 7Ω-j475Ω and 320Ω-j, respectively.
It is 190Ω, which is several times higher than the system line characteristic impedance of 50Ω.

この場合には50nH(650MHzにて+j200Ω
)程度の大きなインダクタ素子、IBF(650MHz
にて−j250Ω)程度のキャパシタあるいは数100
Ω程度の特性インピーダンスを有するストリップ線路を
用いて回路を構成しないと広帯域増幅器は得られない。
In this case, 50nH (+j200Ω at 650MHz
) large inductor element, IBF (650MHz
-j250Ω) capacitor or several hundred
A wideband amplifier cannot be obtained unless the circuit is constructed using a strip line having a characteristic impedance of about Ω.

従来のマイクロ波ICで用いられるマイクロストリップ
線路回路は高性能、安価で実用性に富むがアルミナ、ガ
ラステフロン等の比誘電率が1より大きな基板をそのま
ま用いているので本質的に高インピーダンス回路には不
適当である。
Microstrip line circuits used in conventional microwave ICs are high-performance, inexpensive, and highly practical, but because they use substrates with dielectric constants greater than 1, such as alumina and glass Teflon, they are essentially high-impedance circuits. is inappropriate.

また分布線路はUHF帯においてかなり大型となる欠点
も有する。
Distributed lines also have the disadvantage of being quite large in the UHF band.

一方整合回路を個別集中定数素子で構成すれば小型化で
きるが量産性が無くkる。
On the other hand, if the matching circuit is composed of individual lumped constant elements, the size can be reduced, but mass production is not possible.

また実際上通常の50nH程度のインダクタンスのコイ
ルは自て共振周波数がUHF帯にあって使用できず、と
くにこの自て共振周波数を上昇させるために大幅な小型
細線化を計れば、損失が増大し、FETの低雑音性を失
う。
In addition, in practice, a coil with an inductance of about 50 nH cannot be used because its resonant frequency is in the UHF band, and especially if the wire is made significantly smaller and thinner in order to raise the resonant frequency, the loss will increase. , the low noise characteristics of the FET are lost.

本発明の目的は上記のような従来の問題点を解決し、量
産性に富むIC化の利点を失うことなくまた小型化でき
る集中定数素子を用いた高性能超高周波トランジスタ増
幅器を提供することにある。
The purpose of the present invention is to solve the above-mentioned conventional problems and provide a high-performance ultra-high frequency transistor amplifier using lumped constant elements that can be miniaturized without losing the advantages of integrated circuits that are highly mass-producible. be.

本発明によれば誘電体薄板上に超高周波トランジスタを
設けると共に該誘電体薄板および該誘電体薄板に設けら
れる導体膜とによって形成される導体膜集中定数回路に
より前記超高周波トランジスタに接続された入出力回路
を構成しかつ該誘電体薄板が接地導電板から一定の間隔
をおいてほぼ平行に支持短絡されていることを特徴とす
る超高周波トランジスタ増幅器が得られる。
According to the present invention, an ultra-high frequency transistor is provided on a dielectric thin plate, and an input circuit connected to the ultra-high frequency transistor by a conductive film lumped constant circuit formed by the dielectric thin plate and a conductive film provided on the dielectric thin plate. A very high frequency transistor amplifier is obtained, which constitutes an output circuit and is characterized in that the dielectric thin plate is supported and short-circuited substantially parallel to a grounded conductive plate at a constant distance.

以下本発明について一実施例を示す図面を用いて説明す
る。
The present invention will be explained below using drawings showing one embodiment.

第1図は本発明の第1の実施例を示す図でaはその上蓋
を取り除いたときの平面図、bはその線AA“に関する
断面図である。
FIG. 1 shows a first embodiment of the present invention, in which a is a plan view with the top cover removed, and b is a sectional view taken along line AA''.

第2図はこの実施例の入出力回路等価向路図である。FIG. 2 is an equivalent circuit diagram of the input/output circuit of this embodiment.

第1図において接地導体板1上に間隔dをおいて厚みt
なる誘電体薄板2が平行に支持されその中央部にトラン
ジスタすなわちFET3を配置しその前後に入出力整合
回路が形成されている。
In Fig. 1, a thickness t is placed on the ground conductor plate 1 at a distance d.
A dielectric thin plate 2 is supported in parallel, a transistor or FET 3 is arranged in the center thereof, and input/output matching circuits are formed in front and behind it.

接地導体板は縁部でケース体となっており入出力コネク
タ21,22、上蓋25が付けられる21゜22は入出
力同軸コネクタでありその中心導体23.24が回路に
接続され入出力端となっている。
The ground conductor plate has a case body at its edges, and 21° and 22 to which the input/output connectors 21 and 22 and the top cover 25 are attached are input/output coaxial connectors, whose center conductors 23 and 24 are connected to the circuit and serve as input/output ends. It has become.

入出力回路は第2図にその等価回路を示したように入力
側より5個の導体膜インダクタし1〜L、および4個の
導体膜キャパシタC1〜C4からなっている。
The input/output circuit consists of five conductive film inductors 1-L and four conductive film capacitors C1-C4 from the input side, as shown in the equivalent circuit in FIG.

キャパシタC6はRF短絡用の外付はキャパシタである
The capacitor C6 is an external capacitor for RF shorting.

トランジスタ入出力端子すなわちゲート31およびドレ
イン端子32はキャパシタC2,C3に接続され、まだ
トランジスタの高周波接地電極(この場合ソース電極)
はソース用電極33にそのまま固定接続されこれに連続
してなるソースバイアス端子17およびインダクタし、
の終端より連続するドレインバイアス端子18よりバイ
アスが付加される。
The transistor input/output terminals, namely the gate 31 and the drain terminal 32, are connected to the capacitors C2 and C3, and are still connected to the high frequency ground electrode (source electrode in this case) of the transistor.
is fixedly connected to the source electrode 33 and is connected to the source bias terminal 17 and the inductor,
A bias is applied from the drain bias terminal 18 which is continuous from the terminal end.

ソース用電極33およびインダクタL5の終端はそれぞ
れRFショート用キャパシタC5により高周波的に接地
されている。
The ends of the source electrode 33 and the inductor L5 are each grounded at high frequency by an RF short capacitor C5.

FETのゲートはこの場合インダクタL2により直流的
に接地されバイアスの帰路となっている。
In this case, the gate of the FET is DC grounded by the inductor L2 and serves as a bias return path.

誘電体薄板2上の表面および裏面にはそれぞれ接地用導
体膜11および12が形成されてそれらはbに示すよう
に誘電体薄板2の縁端部側面を通して接続され、これら
は導電体薄板2を固定する20の止めねじで接地導体板
1にそのまま圧着されている。
Grounding conductive films 11 and 12 are formed on the front and back surfaces of the dielectric thin plate 2, respectively, and are connected through the edge side of the dielectric thin plate 2 as shown in b. It is crimped to the ground conductor plate 1 with 20 fixing screws.

第1図から分るようにこの実施例においてはインダクタ
し1〜L5は誘電体薄板2の片面の細長い導体膜例えば
16よりなっている。
As can be seen from FIG. 1, in this embodiment, the inductors 1 to L5 are made of elongated conductor films, for example 16, on one side of the dielectric thin plate 2.

この導体膜の幅Wを1rr、その接地導体板からの距離
t+dを5mmとしたときこのインダクタ導体膜の接地
に対するインピーダンスは約220Ωとなりこの長さ1
0mm当り約7nHの値が得られる。
When the width W of this conductor film is 1rr and the distance t+d from the ground conductor plate is 5 mm, the impedance of this inductor conductor film to the ground is approximately 220Ω, and this length 1
A value of approximately 7 nH per 0 mm is obtained.

しかもこのような空中に支持された導体膜インダクタ上
の高周波伝播波長はほとんど空中の伝播波長に等しいの
で、例えば40nH長さ約40mmのインダクタは65
0MHz波長約490mmの1/1o以下でありほぼ集
中定数と考えられる。
Moreover, the high frequency propagation wavelength on such a conductor film inductor supported in the air is almost equal to the propagation wavelength in the air, so for example, an inductor of 40nH and approximately 40mm in length is 65
It is less than 1/1o of the 0 MHz wavelength of about 490 mm, and is considered to be almost a lumped constant.

また幅約1rrであればそのQ値も約1000となる。Further, if the width is about 1rr, the Q value will also be about 1000.

一方整合回路中の導体膜キャパシタC1〜C4は誘電体
薄板2を挾んだ単純な構造になっていて例えばC1の場
合誘電体薄板表面に矩形導体膜13.15が形成され、
それに対向した裏面の導体膜14との間で2個直列のキ
ャパシタを形成している。
On the other hand, the conductive film capacitors C1 to C4 in the matching circuit have a simple structure in which a dielectric thin plate 2 is sandwiched between them.For example, in the case of C1, a rectangular conductive film 13.15 is formed on the surface of the dielectric thin plate.
Two capacitors connected in series are formed between the conductor film 14 on the opposite back surface.

テフロンガラス等の誘電体薄板を用いた高周波プリント
板を用いれば上記のような集中定数り。
If you use a high-frequency printed circuit board that uses a dielectric thin plate such as Teflon glass, you will get the lumped constants mentioned above.

Cが非常に安価にしかも導体膜のパターン形成のみで容
易に得られる。
C can be obtained at a very low cost and easily by simply patterning a conductor film.

テフロンガラスの場合比誘電率約2.6であるので、こ
の厚み1=0.8mmとすれば1pFのキャパシタが約
34mm2の導体パターンのエツチングのみで簡単に得
られる。
In the case of Teflon glass, the dielectric constant is about 2.6, so if this thickness 1=0.8 mm, a 1 pF capacitor can be easily obtained by etching a conductor pattern of about 34 mm2.

高インピーダンス回路はこのように非常に小さな容量で
済むので上記の単純な構造の導体膜キャパシタが適して
いる。
Since a high impedance circuit requires only a very small capacitance, the conductor film capacitor with the above-mentioned simple structure is suitable.

UHF帯のQ値も数1000以上が見込まれる。The Q value of the UHF band is also expected to be several thousand or more.

以上のように本発明によれば高周波プリント板のような
非常に安価な材料を用いしかもUHF)ランジスタ増幅
器に必要な高インピーダンス回路が非常に高い性能で、
かつ小形集中定数的に得られる。
As described above, according to the present invention, a very inexpensive material such as a high frequency printed board is used, and the high impedance circuit required for a UHF (UHF) transistor amplifier has very high performance.
And it can be obtained as a small lumped constant.

しかも製作法も量産性に富み、安価な増幅器が得られる
Moreover, the manufacturing method is suitable for mass production, and inexpensive amplifiers can be obtained.

またプリント板技術でスルーホールを得ることは容易で
あるので、第3図の第2の実施例のような一層の高性能
化を計ることもできる。
Furthermore, since it is easy to obtain through holes using printed board technology, it is also possible to achieve even higher performance as in the second embodiment shown in FIG.

第3図は第2の実施例の一部分を示す図で、aはRFシ
ョート用キャパシタC5として単板形のセラミックキャ
パシタを用いその上にトランジスタ3が乗り、全体がス
ルホール50を通して裏面の接地用導体膜12に接続さ
れたソース用電極33上に固着されている。
FIG. 3 is a diagram showing a part of the second embodiment, in which a is a single-plate ceramic capacitor as the RF shorting capacitor C5, a transistor 3 is mounted on it, and the whole is connected to a grounding conductor on the back side through a through hole 50. It is fixed on the source electrode 33 connected to the membrane 12.

3′はトランジスタの接地端子である。さらにこの場合
接地支持導体1′が誘電体薄板2を中央部で支持しかつ
接地用導体膜12を直接接地導体板に短絡するために用
いられている。
3' is the ground terminal of the transistor. Furthermore, in this case, a grounding support conductor 1' is used to support the dielectric thin plate 2 in the center and to short-circuit the grounding conductor film 12 directly to the grounding conductor plate.

このようなスルーホール構造により接地部分の不要イン
ダクタンスの少いRF接地が可能となる。
Such a through-hole structure enables RF grounding with less unnecessary inductance in the grounding portion.

またbに示したようにスルホール50を用いると導体膜
インダクタ19をスパイラル状に形成して他面の導体膜
リード19′に接続することが可能で、導体膜インダク
タの小形化ができる。
Further, as shown in FIG. 5B, if the through hole 50 is used, the conductor film inductor 19 can be formed in a spiral shape and connected to the conductor film lead 19' on the other side, and the conductor film inductor can be made smaller.

この場合インダクタに直列のキャパシタが必要ならば図
のスルーホールをなくすればよい。
In this case, if a capacitor in series with the inductor is required, the through hole shown in the figure can be eliminated.

誘電体薄板としては前記のテフロンガラス、テフロン単
独、ポリオレフィン、等高周波プリント板以外にさらに
低周周波であれば通常のエポキシ、メラミン、ポリエス
テル、フェノール樹脂等のプリント板でもよく、また石
英、アルミナセラミック等の無機誘電体でもよい。
As the dielectric thin plate, in addition to the above-mentioned Teflon glass, Teflon alone, polyolefin, etc. high frequency printed boards, for lower frequencies, ordinary printed boards such as epoxy, melamine, polyester, phenol resin, etc. may be used, and quartz, alumina ceramic, etc. Inorganic dielectric materials such as

これらは比誘電率が大きいが、本願のように空中に支持
されている場合にはあまり問題とならない。
Although these have a large dielectric constant, this does not pose much of a problem when they are supported in the air as in the present application.

導体膜としてはプリント板の場合銅膜であるが必要に応
じ金メツキコーティングが必要であり、その信金、銀、
クロム−金、チタン−白金−金膜等が使用される。
The conductor film is a copper film in the case of printed boards, but a gold plating coating is required if necessary.
Chromium-gold, titanium-platinum-gold films, etc. are used.

本願は主としてUHF帯低雑音FET増幅を目的として
いるが、本願の原理がUHF帯バイポーラトランジスタ
増幅器あるいは非常に高インピーダンスの入出力回路を
必要とするUHFSHFSフサ器等にも応用できること
はもちろんである。
Although this application is primarily aimed at UHF band low-noise FET amplification, it goes without saying that the principles of this application can also be applied to UHF band bipolar transistor amplifiers or UHF SHFS amplifiers that require very high impedance input/output circuits.

【図面の簡単な説明】[Brief explanation of drawings]

第1図aはL蓋を取り除いたときの第1の実施例を示す
平面図、bはそのAA’に関する断面図、第2図はその
等価回路図である。 図において、1は接地導体板、2は誘電体薄板、3はト
ランジスタ、L1〜L、は導体膜インダクタ、01〜C
4は導体膜キャパシタ、C5はRFショート用キャパシ
タ21,22は入出力コネクタ、12゜13は接地用導
体膜、20は止めねじ、17はソースバイアス端子、1
8はドレインバイアス端子、25は上蓋を示す。 第3図は第2の実施例を示す部分断面図aおよび部分平
面図すであり、1′は接地支持導体、50はスルーホー
ルを示す。
FIG. 1a is a plan view showing the first embodiment with the L lid removed, FIG. 1b is a cross-sectional view along AA', and FIG. 2 is an equivalent circuit diagram thereof. In the figure, 1 is a ground conductor plate, 2 is a dielectric thin plate, 3 is a transistor, L1 to L are conductor film inductors, and 01 to C
4 is a conductive film capacitor, C5 is an RF short capacitor 21, 22 is an input/output connector, 12° 13 is a grounding conductive film, 20 is a set screw, 17 is a source bias terminal, 1
8 is a drain bias terminal, and 25 is an upper lid. FIG. 3 is a partial sectional view a and a partial plan view showing the second embodiment, in which 1' indicates a grounding support conductor, and 50 indicates a through hole.

Claims (1)

【特許請求の範囲】[Claims] 1 誘電体薄板上に超高周波トランジスタを設けると共
に該誘電体薄板および該誘電体薄板に設けられる導体膜
とによって形成される導体膜集中定数回路により前記超
高周波トランジスタに接続された入出力整合回路を構成
しかつ該誘電体薄板が接地導電板から一定の間隔をおい
てはソ平行に支持短絡されていることを特徴とする超高
周波トランジスタ増幅器。
1. An ultra-high frequency transistor is provided on a dielectric thin plate, and an input/output matching circuit is connected to the ultra-high frequency transistor by a conductive film lumped constant circuit formed by the dielectric thin plate and a conductive film provided on the dielectric thin plate. 1. An ultra-high frequency transistor amplifier characterized in that the thin dielectric plate is supported and short-circuited in parallel with a ground conductive plate at a constant distance.
JP51129887A 1976-10-27 1976-10-27 Ultra high frequency transistor amplifier Expired JPS5811746B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP51129887A JPS5811746B2 (en) 1976-10-27 1976-10-27 Ultra high frequency transistor amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP51129887A JPS5811746B2 (en) 1976-10-27 1976-10-27 Ultra high frequency transistor amplifier

Publications (2)

Publication Number Publication Date
JPS5354472A JPS5354472A (en) 1978-05-17
JPS5811746B2 true JPS5811746B2 (en) 1983-03-04

Family

ID=15020788

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51129887A Expired JPS5811746B2 (en) 1976-10-27 1976-10-27 Ultra high frequency transistor amplifier

Country Status (1)

Country Link
JP (1) JPS5811746B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5890810A (en) * 1981-11-26 1983-05-30 Alps Electric Co Ltd Microwave circuit device
JPS58135114U (en) * 1982-03-08 1983-09-10 株式会社東芝 microwave fet amplifier
JPS6092829U (en) * 1983-11-30 1985-06-25 アルプス電気株式会社 Microwave transistor mounting structure
JPH0287802A (en) * 1988-09-26 1990-03-28 Nec Corp Extrahigh frequency amplifier

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS514885A (en) * 1974-06-29 1976-01-16 Tokyo Shibaura Electric Co Keikohatsukokanno seizohoho

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS514885A (en) * 1974-06-29 1976-01-16 Tokyo Shibaura Electric Co Keikohatsukokanno seizohoho

Also Published As

Publication number Publication date
JPS5354472A (en) 1978-05-17

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