JPH01273404A - High frequency semiconductor device - Google Patents
High frequency semiconductor deviceInfo
- Publication number
- JPH01273404A JPH01273404A JP10468788A JP10468788A JPH01273404A JP H01273404 A JPH01273404 A JP H01273404A JP 10468788 A JP10468788 A JP 10468788A JP 10468788 A JP10468788 A JP 10468788A JP H01273404 A JPH01273404 A JP H01273404A
- Authority
- JP
- Japan
- Prior art keywords
- input
- output
- matching circuit
- fet
- high frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 15
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 26
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract description 4
- 239000000919 ceramic Substances 0.000 abstract description 4
- 230000005669 field effect Effects 0.000 abstract description 2
- 239000006185 dispersion Substances 0.000 abstract 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 23
- 239000000758 substrate Substances 0.000 description 11
- 238000005476 soldering Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Abstract
Description
【発明の詳細な説明】
〔産業上の利用公費〕
この発明は、高い周波数で動作する高周波半導体デバイ
スの入出力整合に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Utilization Public Funds] The present invention relates to input/output matching of high frequency semiconductor devices operating at high frequencies.
第4図(a)、 (b)は従来の高周波半導体デバイス
を示す正面図及び側面図である。図において、(1)は
アルミナセラミックス等よりなるパッケージ本体、(2
)はアルミナセラミックス又は金属板よりなるパッケー
ジキャップ、(3)〜(5)は金属板に金メツキ等施さ
れて作られている半導体デバイスの電極リードであり、
(3)はソース電極リード、(4)はゲート電極リード
、(5)はドレイン電極リードである。FIGS. 4(a) and 4(b) are a front view and a side view of a conventional high-frequency semiconductor device. In the figure, (1) is a package body made of alumina ceramics, etc.;
) is a package cap made of alumina ceramics or a metal plate, (3) to (5) are electrode leads of a semiconductor device made of a metal plate plated with gold, etc.
(3) is a source electrode lead, (4) is a gate electrode lead, and (5) is a drain electrode lead.
第4図で示した高周波帯で用いられているガリウム砒素
電界効果トランジスタ(以下、GaAsFETという。The gallium arsenide field effect transistor (hereinafter referred to as GaAsFET) used in the high frequency band shown in FIG.
)で高周波増幅器を作る場合、GaAs FETの入
力インピーダンス及び出力インピーダンスと電源インピ
ーダンス及び負荷インピーダンスを整合させる為、整合
回路パターンの形成された第5図に示した増幅器プリン
ト基板にGaAs FETを半田付している。), in order to match the input impedance and output impedance of the GaAs FET with the power source impedance and load impedance, the GaAs FET is soldered to the amplifier printed circuit board shown in Figure 5 on which a matching circuit pattern has been formed. ing.
第5図において、(6)はテフロン等の低誘電損失の誘
電体基板、(7)〜(9)は誘電体基板(6)上に熱圧
着等で付けられている11r4wAをエツチングして作
成した高周波増幅回路パターンであり、(7)は入力整
合回路パターン、(8)は出力整合回路パターン、(9
)はソース電極接地パターンである。なお、ソース接地
パターンは、誘電体基板(6)の裏面全体に付けられて
いる銅薄膜とスルーホールを介して導通している。第6
図は、第5図の増幅回路パターンの形成された誘電体基
板に、GaAs FETを半田付したGaAs F
ET高周波増幅器の外形を示したものである。In Fig. 5, (6) is a dielectric substrate with low dielectric loss such as Teflon, and (7) to (9) are made by etching 11r4wA attached to the dielectric substrate (6) by thermocompression etc. (7) is the input matching circuit pattern, (8) is the output matching circuit pattern, and (9) is the high frequency amplifier circuit pattern.
) is the source electrode grounding pattern. Note that the source ground pattern is electrically connected to the copper thin film attached to the entire back surface of the dielectric substrate (6) via a through hole. 6th
The figure shows a GaAs FET with a GaAs FET soldered to a dielectric substrate on which the amplifier circuit pattern shown in Fig. 5 is formed.
This figure shows the outline of the ET high-frequency amplifier.
第6図の高周波増幅器においては、GaAsFETのゲ
ート電極リード(4)にオープンスタブで構成した入力
整合回路パターンが接続しているので、GaAs F
ETのゲートに入る入力信号電力は、反射による損失が
なく、すべての電力がGaAs FETに人も増幅さ
れろ。一方、GaAs FETで増幅されてドレイン
から出る出力信号電力は、ドレイン電極(5)が出力整
合回路パターンに接続しているので、反射による損失が
なく、すべての電力が外部負荷に出ていく。つまり、G
aAs FETに入出力整合回路パターンが接続し・
ているので、信号電力は効率よく増幅される。In the high frequency amplifier shown in Fig. 6, the input matching circuit pattern composed of an open stub is connected to the gate electrode lead (4) of the GaAs FET.
The input signal power entering the gate of the ET has no loss due to reflection, and all power is amplified by the GaAs FET. On the other hand, since the drain electrode (5) is connected to the output matching circuit pattern, the output signal power amplified by the GaAs FET and output from the drain is not lost due to reflection, and all the power is output to the external load. In other words, G
The input/output matching circuit pattern is connected to the aAs FET.
Therefore, the signal power is efficiently amplified.
しかし、従来のGaAs FET増幅器は、以上述べ
たように入出力整合回路パターンが形成されている誘電
体基板にGaAs FETを半田付して構成していた
ので、下記の課題があった。However, since the conventional GaAs FET amplifier was constructed by soldering the GaAs FET to a dielectric substrate on which the input/output matching circuit pattern was formed as described above, there were the following problems.
(11G a A s F E T増幅器の整合周波
数は、主としてGaAs FETと入力整合回路及び
出力整合回路のオープンスタブまでの距gi a 1及
び1、によって決まるが、高い周波数ではわずかの距離
のずれで整合周波数がずれてしまう。例えば、ゲート幅
300μmのGaAs FETの場合、整合周波数を
12GHzとした場合、0.1 mmのずれで500
M Hz程度周波数がずれてしまう。(The matching frequency of the 11G a As FET amplifier is mainly determined by the distance gia 1 and 1 between the GaAs FET and the open stubs of the input matching circuit and output matching circuit, but at high frequencies, a slight distance deviation The matching frequency will shift. For example, in the case of a GaAs FET with a gate width of 300 μm, if the matching frequency is 12 GHz, a shift of 0.1 mm will cause a shift of 500 μm.
The frequency shifts by about MHz.
ところが、GaAs FETを誘電体基板上の整合回
路パターンに半田付する場合、精度よく決められた位置
にアセンブリすることが困難であり、アセンブリの位置
ずれの為、整合周波数がずれる。However, when soldering a GaAs FET to a matching circuit pattern on a dielectric substrate, it is difficult to assemble it at a precisely determined position, and the matching frequency shifts due to positional deviation of the assembly.
(2)高い周波数で動作するGaAs FETの場合
、構造パラメータや製造フローの差により、高層、波パ
ラメータ (例えばSパラメータ)が異なる。(2) In the case of GaAs FETs that operate at high frequencies, the high-rise and wave parameters (eg, S-parameters) differ due to differences in structural parameters and manufacturing flow.
従って、異なる型名のFETを使用する場合、その都度
史用するFETで設計された入出力整合回路パターンを
有する増幅回路の誘電体基板を準備する必要があり、非
常に煩雑である。Therefore, when FETs with different model names are used, it is necessary to prepare a dielectric substrate of an amplifier circuit having an input/output matching circuit pattern designed for each FET to be used, which is very complicated.
この発明は上記のような課題を解決するためになされた
もので、デバイスの取付位置にかかわらず設計通りの特
性が得られるとともに、高周波回路基板の設計が簡単に
できる高周波半導体デバイスを得ることを目的とする。This invention was made in order to solve the above-mentioned problems, and aims to provide a high-frequency semiconductor device that can obtain the designed characteristics regardless of the mounting position of the device and that can easily design a high-frequency circuit board. purpose.
この発明に係るマイクロ波半導体装置は、GaAs
FETのゲート電極リード及びドレイン電極リードに入
出力整合用のオープンスタブを取付けたものである。The microwave semiconductor device according to the present invention is made of GaAs.
Open stubs for input/output matching are attached to the gate electrode lead and drain electrode lead of the FET.
この発明におけるGaAs、FETでは、入出力電極リ
ードに整合回路が付いているので、アセンブリ位置によ
る整合周波数のずれがないとともに、ユーザで整合回路
を設計しなくても良い。In the GaAs FET of the present invention, a matching circuit is attached to the input/output electrode leads, so there is no shift in matching frequency depending on the assembly position, and there is no need for the user to design a matching circuit.
以下、この発明を図について説明する。第1図(a)
、 (b)はこの発明の一実施例による高周波半導体デ
バイスを示す正面図及び側面図である。図において、
(10)はオープンスタブの付いたゲート電極リード、
(11)はオープンスタブの付いたドレイン電極リード
である。The invention will now be explained with reference to the drawings. Figure 1(a)
, (b) are a front view and a side view showing a high frequency semiconductor device according to an embodiment of the present invention. In the figure,
(10) is a gate electrode lead with an open stub;
(11) is a drain electrode lead with an open stub.
この発明のGaAs FETを用いた高周波帯の増幅
器の構成は、第2図に示すような50Ωの入力線路(1
2)と50Ωの出力線路(13)のパターニングされた
誘電体基板(6)に、この発明のGaAsFETを半田
付することでなされる。第3図はこの発明の高周波半導
体デバイス、いわば用いた増幅器外形図であり、この発
明の増幅器においても、従来の増幅器と同様、GaAs
FETの入力電極側に入力整合回路が、出力電極側
に出力整合回路が取付られているので、信号電力の反射
が無く効率的な増幅特性が得られる。The configuration of a high frequency band amplifier using the GaAs FET of this invention is as shown in FIG.
2) and the patterned dielectric substrate (6) of the 50Ω output line (13), by soldering the GaAsFET of the present invention. FIG. 3 is an outline diagram of the high-frequency semiconductor device of this invention, so to speak, an amplifier used.
Since the input matching circuit is attached to the input electrode side of the FET and the output matching circuit is attached to the output electrode side, there is no reflection of signal power and efficient amplification characteristics can be obtained.
ところが、この発明のGaAs FETでは、入出力
整合@路がGaAs FETの本体のゲート電極リー
ド及びドレイン電極リードに付いているので、従来のG
aAs FETを用いた場合に比較して
(1)誘電体基板上にGaAs FETを取付る位置
によらず、設計通りの入出力整合回路が構成できるので
、アセンブリ位置のバラツキによる特性バラツキが発生
しなくなる。However, in the GaAs FET of the present invention, the input/output matching circuit is attached to the gate electrode lead and drain electrode lead of the main body of the GaAs FET, so the conventional G
Compared to the case of using aAs FETs, (1) the input/output matching circuit can be configured as designed regardless of the position where the GaAs FET is mounted on the dielectric substrate, so there are no variations in characteristics due to variations in assembly position; It disappears.
(2)異なったタイプのGaAs FETをアセンブ
リする場合でも、GaAs FET自身に整合回路が
付いているので、誘電体基板は50Ωの入出カストリッ
プラインがパターニングされたもの1種類のみ準備する
だけで高周波増幅器が構成できる。(2) Even when assembling different types of GaAs FETs, since the GaAs FET itself is equipped with a matching circuit, only one type of dielectric substrate with patterned input and output strip lines of 50Ω is required to handle high frequencies. Amplifiers can be configured.
という利点がある。There is an advantage.
なお上記実施例ではGaAs FETのゲート電極及
びドレイン電極に整合回路を設けたものを示したが、シ
リコンバイポーラトランジスタ等の他の高周波半導体デ
バイスの入出力電極に整合回路を設けてもよい。In the above embodiment, a matching circuit is provided at the gate electrode and drain electrode of a GaAs FET, but a matching circuit may be provided at the input/output electrode of another high frequency semiconductor device such as a silicon bipolar transistor.
また、上記実施例では高周波増幅回路の場合について説
明したが、高周波回路が発振回路の場合でも上記実施例
と同様の効果を奏する。Furthermore, although the above embodiments have been described with respect to the case of a high frequency amplifier circuit, the same effects as those of the above embodiments can be achieved even when the high frequency circuit is an oscillation circuit.
以上のように、この発明によれば、高周波半導体デバイ
スの入力及び出力側のリード電極に整合回路を設けてい
るので、デバイスの取付位置にかかわらず設計通りの特
性が得られるとともに、高周波回路基板の設計が非常に
簡単になるという効果がある。As described above, according to the present invention, matching circuits are provided on the input and output side lead electrodes of a high-frequency semiconductor device, so that designed characteristics can be obtained regardless of the mounting position of the device, and the high-frequency circuit board This has the effect of greatly simplifying the design.
第1図(a)、(b)はこの発明の一実施例による高周
波半導体デバイスを示す正面図及び側面図、第2図及び
第3図はこの発明の高周波半導体デバイスを用いた増幅
器のプリント基板外形図及び増幅器外形図、第4図(a
)、(b)は従来の高周波半導体デバイスを示す正面図
及び側面図、第5図及び第6図は従来の高周波半導体デ
バイスを用いた増幅器のプリント基板外形図及び増幅器
である。
(1)はパッケージ本体、(2)はキャップ、(3)は
ソースflsIiリード、(4)はゲート電極リード、
(5)はドレイン電極リード、(6)は誘電体基板、(
7)は入力整合回路パターン、(8)は出力整合回路パ
ターン、(9)はソース電極接地パターン、(10)は
オープンスタブの付いたゲート電極リード、(11)は
オープンスタブの付いたドレイン電極リードである。
なお、図中、同一符号は同一、又は相当部分を示す。1(a) and (b) are front and side views showing a high frequency semiconductor device according to an embodiment of the present invention, and FIGS. 2 and 3 are printed circuit boards of an amplifier using the high frequency semiconductor device of the present invention. Outline drawing and amplifier outline drawing, Figure 4 (a
) and (b) are a front view and a side view showing a conventional high frequency semiconductor device, and FIGS. 5 and 6 are a printed circuit board outline diagram and an amplifier using the conventional high frequency semiconductor device. (1) is the package body, (2) is the cap, (3) is the source flsIi lead, (4) is the gate electrode lead,
(5) is the drain electrode lead, (6) is the dielectric substrate, (
7) is the input matching circuit pattern, (8) is the output matching circuit pattern, (9) is the source electrode grounding pattern, (10) is the gate electrode lead with an open stub, and (11) is the drain electrode with an open stub. It is the lead. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
リードに出力整合回路を備えたことを特徴とする高周波
半導体デバイス。A high-frequency semiconductor device characterized in that an input matching circuit is provided on an electrode lead on the input side, and an output matching circuit is provided on an electrode lead on the output side.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10468788A JPH01273404A (en) | 1988-04-26 | 1988-04-26 | High frequency semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10468788A JPH01273404A (en) | 1988-04-26 | 1988-04-26 | High frequency semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01273404A true JPH01273404A (en) | 1989-11-01 |
Family
ID=14387379
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10468788A Pending JPH01273404A (en) | 1988-04-26 | 1988-04-26 | High frequency semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01273404A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04271160A (en) * | 1991-01-25 | 1992-09-28 | Mitsubishi Electric Corp | Microwave integrated circuit module |
JPH09270432A (en) * | 1996-03-29 | 1997-10-14 | Nec Corp | Field effect transistor |
JP2010219816A (en) * | 2009-03-16 | 2010-09-30 | Sony Corp | Semiconductor device, transmission system, method for manufacturing semiconductor device, and method for manufacturing transmission system |
US8125009B2 (en) | 2009-10-06 | 2012-02-28 | Mitsubishi Electric Corporation | Mounting circuit substrate |
JP2013235913A (en) * | 2012-05-08 | 2013-11-21 | Toshiba Corp | Package for high frequency semiconductor |
-
1988
- 1988-04-26 JP JP10468788A patent/JPH01273404A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04271160A (en) * | 1991-01-25 | 1992-09-28 | Mitsubishi Electric Corp | Microwave integrated circuit module |
JPH09270432A (en) * | 1996-03-29 | 1997-10-14 | Nec Corp | Field effect transistor |
JP2010219816A (en) * | 2009-03-16 | 2010-09-30 | Sony Corp | Semiconductor device, transmission system, method for manufacturing semiconductor device, and method for manufacturing transmission system |
US8125009B2 (en) | 2009-10-06 | 2012-02-28 | Mitsubishi Electric Corporation | Mounting circuit substrate |
JP2013235913A (en) * | 2012-05-08 | 2013-11-21 | Toshiba Corp | Package for high frequency semiconductor |
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