JPH0317646U - - Google Patents
Info
- Publication number
- JPH0317646U JPH0317646U JP7626389U JP7626389U JPH0317646U JP H0317646 U JPH0317646 U JP H0317646U JP 7626389 U JP7626389 U JP 7626389U JP 7626389 U JP7626389 U JP 7626389U JP H0317646 U JPH0317646 U JP H0317646U
- Authority
- JP
- Japan
- Prior art keywords
- ceramic substrate
- package
- semiconductor device
- fixed
- semiconductor circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 239000000919 ceramic Substances 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 5
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は本考案になる半導体装置用パツケージ
の一部截断縦断面図、第２図は従来の半導体装置
用パツケージの縦断面図である。
１１…セラミツク基板、１２…円錐孔、１３…
リードピン、１６…テーパ状フランジ部、１８…
リードピン頂部。
FIG. 1 is a partially cutaway longitudinal sectional view of a package for a semiconductor device according to the present invention, and FIG. 2 is a longitudinal sectional view of a conventional package for a semiconductor device. 11... Ceramic substrate, 12... Conical hole, 13...
Lead pin, 16...Tapered flange portion, 18...
Top of lead pin.
Claims (1)
導体回路をキヤツプで気密封止した半導体装置用
パツケージにおいて、前記セラミツク基板面に対
して垂直に所定数の円錐孔を所定の配列に設けた
セラミツク基板と、該セラミツク基板の円錐孔に
嵌合され固着されたテーパ状フランジ部を有する
リードピンとを備えたことを特徴とする半導体装
置用パツケージ。 A package for a semiconductor device in which a semiconductor circuit is fixed on a ceramic substrate and the semiconductor circuit is hermetically sealed with a cap, the ceramic substrate having a predetermined number of conical holes arranged in a predetermined arrangement perpendicular to the surface of the ceramic substrate; 1. A package for a semiconductor device, comprising a lead pin having a tapered flange portion that is fitted into and fixed to a conical hole of the ceramic substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7626389U JPH0741166Y2 (en) | 1989-06-30 | 1989-06-30 | Package for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7626389U JPH0741166Y2 (en) | 1989-06-30 | 1989-06-30 | Package for semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0317646U true JPH0317646U (en) | 1991-02-21 |
| JPH0741166Y2 JPH0741166Y2 (en) | 1995-09-20 |
Family
ID=31617568
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7626389U Expired - Lifetime JPH0741166Y2 (en) | 1989-06-30 | 1989-06-30 | Package for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0741166Y2 (en) |
-
1989
- 1989-06-30 JP JP7626389U patent/JPH0741166Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0741166Y2 (en) | 1995-09-20 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |